Introduction

Here it is, the next-generation Intel Core i9-12900K "Alder Lake," the tip of Intel's spear against AMD as it looks to regain its position as the top-performing PC processor maker. The 12th Generation of Intel's desktop processor series launches in the same year as its 11th Gen "Rocket Lake," showing just how eager the company is to compete with AMD, which had comprehensively beaten it with the Ryzen 5000 series. The new processors herald a new, larger CPU socket, the LGA1700, next-generation I/O, such as DDR5 memory and PCI-Express Gen 5 for graphics, and debut the Hybrid core architecture to the desktop segment. These are also the first desktop processors from Intel built on the Intel 7 (10 nm Enhanced SuperFin) node, a departure from close to six years of being on 14 nm! Technically, the i9-12900K we're reviewing today is a 16-core/24-thread processor, but there's a lot more to this core-count.



The "Alder Lake" silicon features two kinds of CPU cores—larger Performance cores, or P-cores, and smaller Efficiency cores, or E-cores. The "Golden Cove" P-cores offer a massive 28% IPC increase over the "Skylake" cores powering five generations of Core desktop processors (6th thru 10th), and an impressive 19% gain over the "Cypress Cove" cores from the 11th Gen "Rocket Lake." The "Gracemont" E-cores can at the right frequency and power match "Skylake" cores in performance while occupying a quarter of the die area and a fraction of the power of the P-cores. A combination of the two is how Intel has sneaked up behind the Ryzen 9 5950X "Zen 3" 16-core processor in its marketing slides. The Intel Thread Director is an on-silicon middleware that works at a low level with the operating system to ensure the right kind of workload is allocated with the right kind of CPU core.

The Core i9-12900K maxes out the "Alder Lake-S" (desktop) silicon, featuring all 8 "Golden Cove" P-cores and all 8 "Gracemont" E-cores. Each of the 8 P-cores features 1.25 MB of dedicated L2 cache. The 8 E-cores are split between two indivisible E-core Clusters of 4 cores, each sharing 2 MB of L2 cache. The 8 P-cores and 2 E-core clusters share 30 MB of L3 cache. The Intel UHD 770 integrated graphics is based on the same Xe LP graphics architecture powering the iGPU as on the 11th Gen "Rocket Lake," down to the same 32 execution unit count. There's just a minor iGPU frequency bump, up to 1.55 GHz from 1.30 GHz on the previous generation.

The two CPU core types each have their own clock speeds. The P-cores on the i9-12900K are clocked at 3.20 GHz, with 5.20 GHz maximum Turbo Boost frequency. The E-cores, on the other hand, are clocked at 2.40 GHz, with 3.90 GHz maximum Turbo frequency. Intel has retired the concept of TDP as it was no longer a reliable representative value of a processor's power or thermal characteristics. Instead, we have a more upfront declaration of the power bands these chips operate at. The "processor base power" is the typical load power draw, rated at 125 W. The "maximum boost power" is the maximum power drawn at boost frequency (stock), which is 241 W for the i9-12900K. The chip can be made to stick to maximum boost power indefinitely, and overclocking increases this value.

Intel is pricing the Core i9-12900K at roughly $600, which is interesting considering that is $50 more than the Ryzen 9 5900X, but $150 less than the Ryzen 9 5950X (launch price). It remains cheaper on paper compared to the current retail price of the 5950X. In its marketing slides, the company is extensively comparing the i9-12900K to AMD's top part, so the pricing can be termed aggressive. In this review, we show you if Intel's confidence is justified, and whether it managed to pull off a giant-slaying act against the Ryzen 9 5950X, a 16-core processor with all "P" cores.


Intel paper-launched the 12th Gen Core processor family on October 27, allowing us to post everything about the processor except performance testing, so we did a more comprehensive Preview Article on the "Alder Lake" microarchitecture. "Alder Lake-S" is the first desktop processor silicon built by Intel on its Intel 7 silicon fabrication node, formerly known as 10 nm Enhanced SuperFin. This node offers comparable transistor-density and power characteristics as 7 nm-class nodes by TSMC. The die measures approximately 200 mm², although it is noticeably smaller than the 14 nm "Rocket Lake-S" die.


The monolithic silicon features 8 "Golden Cove" P-cores and 8 "Gracemont" E-cores. The E-cores are spread across two 4-core "E-core Clusters." A bi-directional Ringbus and 30 MB of L3 cache connect the P-cores, and E-core clusters, with the Uncore (integrated northbridge) and iGPU. The chip features a dual-mode memory controller that supports 160-bit wide DDR5 (native support for DDR5-4800) or 128-bit wide DDR4 (native support for DDR4-3200). The Gen12 Xe LP iGPU is almost the same as on the "Rocket Lake-S" silicon, with only a minor speed-bump. The PCI-Express root complex is fascinating. The silicon puts out 16 Gen 5 lanes (32 Gbps per lane), which are allocated to the PEG slot on the motherboard, and 12 Gen 4 lanes (16 Gbps per lane), of which four drive a CPU-attached M.2 NVMe slot and eight serve as a physical layer of the DMI 4.0 x8 chipset bus (128 Gbps per direction bandwidth).


The "Golden Cove" performance core (P-core) features numerical increments to the decode unit, micro-op queue, and micro-op cache. The out-of-order (OoO) engine sees similar increments with 6-wide allocation and 12-wide execution ports, compared to 5-wide allocation and 10-wide execution ports for Cypress Cove. The execution stage sees the addition of a fifth execution port and ALU, FMA with FP16 support, and an updated fast adder (FADD). Similar improvements are made to the cache and memory sub-system. These add toward the 28% IPC uplift for this core. The E-core, on the other hand, is designed to provide a massive performance uplift from the previous-generation "Tremont" low-power microarchitecture, mainly to give it certain ISA capabilities found in larger cores, such as AVX2. The front-end is upgraded by a double-size 64 KB L1 instruction cache, more powerful branch-prediction unit, and two sets of triple out-of-order decoders. The out-of-order engine features a wide 256-entry OoO window and 17 execution ports for more parallelism. The execution stage sees a near 33% increase in both scalar and vector execution stages, as well as double the load store.


Intel Thread Director is a vital component that ensures the operating system doesn't see "Alder Lake" as a having the same kind of CPU cores, sending processing traffic uniformly to all cores. Instead, it gives the OS a degree of awareness of the Hybrid architecture and ensures certain kinds of tasks are allocated exclusively on P-cores, and others on E-cores. It also senses the nature of the processing workload (whether it's running in the foreground or background), and decides which kind of cores to tie it to. The OS scheduler by itself moves traffic between cores to meet certain power/thermal objectives, but Thread Director ensures this movement doesn't break the core-type hierarchy. Windows 11 is the recommended version of Windows for "Alder Lake" as it introduces the ability for software to inform the processor of the nature of its work, and the kind of cores it's comfortable getting processed by.


To eke out the best possible thermals from the 14 nm node it was stuck with, Intel pulled off some innovative ways to transfer heat between the silicon and cooling solution over the past couple of solutions. These innovations continue with "Alder Lake." The die and STIM are now thinner, and the copper IHS thicker. Among the new overclocking capabilities are the ability to tweak even the E-cores, DDR5 memory, new XMP 3.0 profiles for DDR5 memory, synthetic BCLK that ensures a base-clock overclock doesn't break sensitive clock domains that rely on it, and external clock generation, in addition to the processor's internal clock generator.


With the monolithic silicon gaining complexity, there are several new overclocking knobs and clock domains to maximize your overclock. The introduction of the E-core adds its own base-clock multiplier, called xE, which works separately from the core ratio of the P-cores, dubbed xP. The xG multiplier dictates iGPU frequency. xR dictates the frequency at which the Ringbus interconnect and L3 cache operate.

Intel Z690 Chipset

Intel is debuting its 12th Gen Core desktop processors in 2021 exclusively with only the unlocked "K" and "KF" variants, so it's only launching the companion Z690 chipset. The "locked" processor SKUs and value-ended chipsets are expected to join the product stack in 2022. The Z690 chipset is Intel's first client chipset with PCI-Express 4.0 downstream connectivity. It talks to the "Alder Lake-S" processor over the DMI 4.0 x8 chipset bus. Downstream PCIe connectivity includes 12x Gen 4 and 16x Gen 3 PCIe general-purpose lanes. The rest of its chipset-attached connectivity is the same as the Z590, including MIPI SoundWire support, NVMe RAID, 8-port SATA 6 Gbps, and recommended network interfaces that include 2.5 GbE and Wi-Fi 6E.

Unboxing and Photography

Our Core i9-12900K and i5-12600K samples came to us in a special press-only package, which is a jewel case that has a plastic scale-up model of the Intel "Alder Lake-S" die, and a really cool portrait of a lake behind.


The retail package is equally impressive. A paperboard box encloses a plastic canister resembling a silicon wafer. Inside, you'll find your processor and some documentation. There is no cooling solution included with the processor.


Here it is, the processor itself. It measures 37.5 mm x 45.0 mm and is a more rectangular-looking processor, much like the LGA1366 before it.


Intel Socket LGA1700 has an intuitive installation process that should be familiar from many past LGA sockets. Trouble is that it comes with a different cooler mount-hole spacing than LGA1200 and the five different Socket-H series sockets before it, so you'll need to search for a compatible cooler. Most cooler companies are handing out adapters, but these aren't available in all countries.

Test Setup

• All applications, games, and processors are tested with the drivers and hardware listed below—no performance results were recycled between test systems.
• All games and applications are tested using the same version.
• All games are set to their highest quality setting unless indicated otherwise.

Super Pi

SuperPi is one of the most popular benchmarks with overclockers and tweakers. It has been used in world-record competitions since forever. It is a purely single-threaded CPU test that calculates Pi to a large number of digits—32 million for our testing. Released in 1995, it only supports x86 floating-point instructions and thus makes for a good test for single-threaded legacy application performance.

wPrime

While SuperPi focuses on calculating Pi, wPrime tackles another mathematical problem: finding prime numbers. It uses Newton's Method for that. One of the design goals for wPrime was to engineer it so that it can make the best use of all cores and threads available on a processor.