The PCI-Express bus continues to be the most prominent system bus interconnect of this generation. It is so ubiquitous at moving ones and zeroes and yet so simple that other standards such as USB and Thunderbolt now use it at the physical level to let you plug in bandwidth-hungry external devices. Graphics cards continue to be the most bandwidth-intensive PCI-Express devices, and with increasing display resolutions and more in-game visual detail, PCI-Express bandwidth utilization of graphics cards is higher than ever. Both AMD and NVIDIA have launched new generations of GPUs primed for DirectX 12 and Vulkan. These APIs come with features such as virtual texturing (mega textures) that minimize GPU memory utilization at the expense of having to move data more frequently between the disk and memory.
We felt that it would be interesting to study how a contemporary high-end graphics card is utilizing the PCI-Express 3.0 x16 bus and how its performance is affected as we reduce the bus bandwidth by lowering the number of PCI-Express lanes available to it, and by falling back to older generations of PCI-Express, which affects the amount of data that can be pushed per PCI-Express lane. The last time we visited this question was exactly a year ago when we tested the AMD Radeon R9 Fury X in various PCI-Express modes. This year, we're testing the GeForce GTX 1080, the fastest graphics card that's readily available in all markets.
In this review, we are putting a GeForce GTX 1080 driven by the NVIDIA 375.70 WHQL software through our test bench, in full x16, x8, and x4 modes of PCI-Express gen 3.0, gen 2.0, and gen 1.1. This should tell you just how much the GPU is affected by bandwidth losses to fewer PCI-Express lanes and narrower older-generation PCI-Express lanes. The data should be particularly important to those weighing the impact of running two of these cards on a mainstream desktop platform (in which two PCI-Express x16 slots run at x8 bandwidth) as opposed to a high-end desktop platform, which provides full x16 bandwidth to the two cards, and that of PCI-Express gen 2.0 (older "Sandy Bridge" processors and the AMD FX platform).
We used adhesive tape to limit the number of PCI-Express lanes available to the graphics card, by physically blocking them off. The motherboard BIOS setup program lets us manually limit the PCI-Express bus to gen 2.0 and gen 1.1 bandwidths, from the gen 3.0 default.
Quite a few motherboards feature a third PCI-Express x16 slot that's electrical x4 and wired to the chipset instead of the CPU. We also tested the GTX 1080 on such a slot to check on the performance impact. This is particularly interesting because installing graphics cards into such slots could clog the DMI chipset bus.