Wednesday, June 28th 2017
Toshiba Develops World's First 4-bit Per Cell QLC NAND Flash Memory
Toshiba America Electronic Components, Inc. (TAEC) today announced the latest generation of its BiCS FLASH three-dimensional (3D) flash memory. The newest BiCS FLASH device features 4-bit-per-cell, quadruple-level cell (QLC) technology and is the first 3D flash memory device to do so. Toshiba's QLC technology enables larger (768 gigabit) die capacity than the company's third-generation 512Gb 3-bit-per-cell, triple-level cell (TLC), and pushes the boundaries of flash memory technology.
Toshiba's new QLC BiCS FLASH device features a 64-layer stacked cell structure and achieves the world's largest die capacity (768Gb/96GB). QLC flash memory also enables a 1.5-terabyte (TB) device with a 16-die stacked architecture in a single package - featuring the industry's largest capacity. This is a fifty percent increase in capacity per package when compared to Toshiba's earlier announcement of a 1TB device with a 16-die stacked architecture in a single package - which also offered the largest capacity in the industry at the time.
The technical challenges posed by QLC technology needed to be overcome, as increasing the number of bits-per-cell by one within the same electron count requires twice the accuracy of TLC technology. Toshiba has combined its advanced circuit design and leading 3D flash memory process technology to overcome this challenge, successfully creating the world's first QLC 3D flash memory.
The timing of this achievement is especially beneficial to datacenters. "The introduction of QLC technology sets the stage for solving many of the challenges facing datacenters today," noted Greg Wong, founder and principal analyst at Forward Insights. "For datacenters, QLC SSDs can be an excellent design choice for reducing power consumption and lowering footprint. Additionally, as the push for higher capacity HDDs leads to an increase in areal density and drives up the weight per successive generation, it has become common to see a 42U rack only half-filled due to exceeding maximum weight or power supply. Flash memory-based storage solutions weigh less and realize improved power efficiencies, enabling datacenters to achieve maximum rack capacity."
Toshiba Memory Corporation was among the first to produce 64-layer 256-gigabit (32GB) devices, and has continued to demonstrate its leadership position by advancing the development of its technology. Toshiba was the first company to publically discuss QLC technology (at last year's Flash Memory Summit) and it has long been a part of the company's roadmap strategy for high-density, smaller chip size flash memory solutions. The new QLC device is targeted to applications including enterprise and consumer SSDs, tablets and memory cards.
"From SLC to MLC and MLC to TLC, large technology shifts are often met by industry resistance and the introduction of QLC is no exception," noted Scott Nelson, senior vice president of TAEC's memory business unit. "There will always be demand for compelling storage solutions that bring higher densities and produce a favorable cost/performance equation - our QLC technology falls squarely into that sweet spot. History has proven us right in the past when it comes to our visionary flash memory roadmap, and we fully expect QLC BiCS FLASH to continue our industry-leading track record."
Samples of Toshiba's groundbreaking QLC device began shipping earlier in June to SSD and SSD controller vendors for evaluation and development purposes. Additionally, samples will be showcased at the 2017 Flash Memory Summit, taking place from August 7-10 in Santa Clara, California.
Toshiba's new QLC BiCS FLASH device features a 64-layer stacked cell structure and achieves the world's largest die capacity (768Gb/96GB). QLC flash memory also enables a 1.5-terabyte (TB) device with a 16-die stacked architecture in a single package - featuring the industry's largest capacity. This is a fifty percent increase in capacity per package when compared to Toshiba's earlier announcement of a 1TB device with a 16-die stacked architecture in a single package - which also offered the largest capacity in the industry at the time.
The timing of this achievement is especially beneficial to datacenters. "The introduction of QLC technology sets the stage for solving many of the challenges facing datacenters today," noted Greg Wong, founder and principal analyst at Forward Insights. "For datacenters, QLC SSDs can be an excellent design choice for reducing power consumption and lowering footprint. Additionally, as the push for higher capacity HDDs leads to an increase in areal density and drives up the weight per successive generation, it has become common to see a 42U rack only half-filled due to exceeding maximum weight or power supply. Flash memory-based storage solutions weigh less and realize improved power efficiencies, enabling datacenters to achieve maximum rack capacity."
Toshiba Memory Corporation was among the first to produce 64-layer 256-gigabit (32GB) devices, and has continued to demonstrate its leadership position by advancing the development of its technology. Toshiba was the first company to publically discuss QLC technology (at last year's Flash Memory Summit) and it has long been a part of the company's roadmap strategy for high-density, smaller chip size flash memory solutions. The new QLC device is targeted to applications including enterprise and consumer SSDs, tablets and memory cards.
"From SLC to MLC and MLC to TLC, large technology shifts are often met by industry resistance and the introduction of QLC is no exception," noted Scott Nelson, senior vice president of TAEC's memory business unit. "There will always be demand for compelling storage solutions that bring higher densities and produce a favorable cost/performance equation - our QLC technology falls squarely into that sweet spot. History has proven us right in the past when it comes to our visionary flash memory roadmap, and we fully expect QLC BiCS FLASH to continue our industry-leading track record."
Samples of Toshiba's groundbreaking QLC device began shipping earlier in June to SSD and SSD controller vendors for evaluation and development purposes. Additionally, samples will be showcased at the 2017 Flash Memory Summit, taking place from August 7-10 in Santa Clara, California.
14 Comments on Toshiba Develops World's First 4-bit Per Cell QLC NAND Flash Memory
I would hazard a guess that the cips still run at the same voltage, therefore the room for error on the voltage levels decrease dramatically. where MLC maybe has 3000 P/E cycles a TLC migth have 1000, what will the level be for QLC? Significantly less than TLC is my guess, unless Toshiba has worked some special magic.
www.tomshardware.com/news/qlc-nand-ssd-toshiba-facebook,32451.html
www.theregister.co.uk/2016/08/10/toshiba_100tb_qlc_ssd/
www.sandisk.com/about/media-center/press-releases/2009/2009-02-10-sandisk-announces-world’s-first-high-performance-4-bits-per-cell-(x4)-flash-memory-technology
www.sandisk.com/about/media-center/press-releases/2009/2009-10-13-sandisk-ships-world’s-first-flash-memory-cards-with-64-gigabit-x4-(4-bits-per-cell)-nand-flash-technology
Not to mention that QLC can allow for some firmware ... creativity. MLC emulation should be as easy (as if anything like this is easy) as telling the controller to treat every 4 voltage states as one, with some light ECC to make sense of any (rare) edge cases. SLC emulation would be even easier. Heck, you could even emulate TLC, although that seems rather unnecessary. The thing is: with current SSD capacities and prices, pseudo-SLC caches don't make that much sense outside of the limited forms they have today. But for a 2TB+ QLC SSD? I'd gladly have the ability to set 1/4 of its capacity as a fixed 256GB MLC buffer. With some clever software, this could even be a flexible, multi-tier system where the whole drive starts out as SLC or MLC, but gradually transitions to QLC as it fills up. Again, I'd gladly buy a 2TB drive that performed like an MLC drive for the first 300GB or more, but still had the ability to adapt as it filled up. Or one where I could give up some capacity to gain a locked buffer. This ought to help out with endurance too (although the "host writes" number would become meaningless if it stays in non-QLC mode most of the time - might it require a tiered system of "QLC host writes" and so on?).
Oh, and stick some Optane/QuantX in there and ditch the DRAM buffer. 16GB would be sweet, but even 8GB would be pretty nice.