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Share your AIDA 64 cache and memory benchmark here

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TheKelz

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Two channels DDR4 3200 should be around 50GB/sec max? 37 is slow.
That's what I think and I don't get what's going on. Yes I can mess with primary and secondary timings but to me stock XMP should be already getting at least 50k, if I'm not mistaken.
 
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Can anyone help? Why are my memory speeds so low?
I would guess 3300MHz on NB Frequency...
Here's 3600MHz dual channel kit at 1.35V :
cachemem.png
 
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That's Quad Channel score, you have half of that (Dual Channel).
 
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Excellent stock ram score
 
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Had some time to play around with my Micron B Die sticks today
cachemem CM MAX 4066 517.png
ZenTimings_Screenshot CB MAX 4066 517 .png


Still busy with testing managed to boot 4133 1:1:1 as well
ZenTimings_Screenshot 552ns.png
ZenTimings_Screenshot 552ns cb max.png


4200MT CL19 1:1:1
cachemem CB MAX 4200 0.96 1.2VSOC .png
ZenTimings_Screenshot CB MAX 2100 FCLK 59K Aida64.png
 
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dgianstefani

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Any suggestions on how I can boost these numbers would be greatly appreciated... the memory latency seems a little high.
1663723185388.png
 
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Seems to be a wall at 51.5ns. Got a little brave with the voltages but not pratical for daily or overall performance has Y-cruncher numbers are down by 5 secs compared to 3800 FCLK 1900.
Thanks to @Taraquin once again for the help. :toast: (I did manage to boot 4800MT 2:1)
cachemem 4200 CL14 515ns 61K.png
ZenTimings_Screenshot 4200 CL14 61K 515ns.png
ZenTimings_Screenshot 4800 Z.png


Any suggestions on how I can boost these numbers would be greatly appreciated... the memory latency seems a little high.
View attachment 262419
Most of you subtimings are on AUTO.
What RAM is this? post CPU-Z screenshot of SPD TAB.
 
Last edited:
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Most of you subtimings are on AUTO.
What RAM is this? post CPU-Z screenshot of SPD TAB.
How did you know?
Also, I don't know whether I should use it at 4000 with desynchronized Fclk/Uclk or keep the current changes.
1663799765012.png

Sorry for the late response
 
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How did you know?
Also, I don't know whether I should use it at 4000 with desynchronized Fclk/Uclk or keep the current changes.
View attachment 262530
Sorry for the late response
I would leave primary timings alone for now and only adjust the subtimings.
I would recommend you bump DIMM voltages to 1.4 - 1.45V. Stock XMP voltage is 1.35V and can cause problems when you try to lower sub timings.

RRDS 4
RRDL 6

tFAW 16 If the system does not boot with tfaw 16 change RRDS 5 and RRDL 7 and change TFAW to 20

WTRS 4
WTRL 12

TWR 16
RTP 8

These are safe values that should boot. On quad channel setup like yours I think it should work.
 
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I would leave primary timings alone for now and only adjust the subtimings.
I would recommend you bump DIMM voltages to 1.4 - 1.45V. Stock XMP voltage is 1.35V and can cause problems when you try to lower sub timings.

RRDS 4
RRDL 6

tFAW 16 If the system does not boot with tfaw 16 change RRDS 5 and RRDL 7 and change TFAW to 20

WTRS 4
WTRL 12

TWR 16
RTP 8

These are safe values that should boot. On quad channel setup like yours I think it should work.
Thanks a lot for the advice:)
I will try that out later today

edit: here are the results. I tested it with both synchronized speeds and 4000 memory.
1663902725974.png
1663902734363.png
 
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This is another Micron Kit I have Crucial Ballistix 3600 CL 16-18-18-38-58 (C9BLM) 16GB DR Micron Rev. E
Running ar 4133 CL16-19-19-44-63 1:1:1. Left CCD on Auto it will only boot with 1.2 CCD. This passes at least 5 cycles of TM5 1usmus.

cachemem CB 4133 CL16 56ns.png
ZenTimings_Screenshot 4133 56ns.png
 
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