Enthusiasts on the ChipHell forum scored an alleged image of AMD's upcoming "Strix Halo" mobile processor, and set out to create some highly plausible schematic slides. These are speculative. While "Strix Point" is the mobile processor that succeeds the current "Hawk Point" and "Phoenix" processors; "Strix Halo" is in a category of its own—to offer gaming experiences comparable to discrete GPUs in the ultraportable form-factor where powerful discrete GPUs are generally not possible. "Strix Halo" also goes head on against Apple's M3 Max and M3 Pro processors powering the latest crop of MacBook Pros. It has the same advantages as a single-chip solution, as the M3 Max.

The "Strix Halo" silicon is a chiplet-based processor, although very different from "Fire Range". The "Fire Range" processor is essentially a BGA version of the desktop "Granite Ridge" processor—it's the same combination of one or two "Zen 5" CCDs that talk to a client I/O die, and is meant for performance-thru-enthusiast segment notebooks. "Strix Halo," on the other hand, use the same one or two "Zen 5" CCDs, but with a large SoC die featuring an oversized iGPU, and 256-bit LPDDR5X memory controllers not found on the cIOD. This is key to what AMD is trying to achieve—CPU and graphics performance in the league of the M3 Pro and M3 Max at comparable PCB and power footprints.

Two of AMD's upcoming mobile processors that implement the "Zen 5" microarchitecture, "Strix Point" and "Fire Range," were spotted in shipping manifests. These are prototypes moving between AMD and its OEM partners. The manifest explicitly mentions a "Fire Range" 16-core processor sample with 55 W TDP, another "Fire Range" chip with an 8-core configuration and the same 55 W power; and a trio of "Strix Point" processors with a 28 W power design. Two of these are Ryzen 9 SKUs, and one of them is a Ryzen 7.

VideoCardz has the OPN codes for the samples being moved. The Ryzen 7 "Strix Point" sample bears 100-0000001335. One of the two Ryzen 9 "Strix Point" chips bears 100-000000994. The 16-core "Fire Range" is marked 100-000001028, while the 8-core "Fire Range" is 100-000001029. "Strix Point" will be AMD's most imporant mobile processor silicon, as this will be the one with a "Zen 5" CPU core count relevant to the notebook market, pack an RDNA 3+ iGPU, and that alleged 40 TOPS+ XDNA 2 NPU that can run Microsoft Copilot locally. A step up from this will be "Strix Halo," with a higher CPU core count, a much larger iGPU designed for performance-segment gaming. "Fire Range" is essentially a low Z-height BGA version of the "Granite Ridge" chiplet processor that has up to two "Zen 5" CCDs and an I/O die.

AMD is reportedly building its upcoming "Zen 5" and "Zen 5c" CPU Core Dies (CCDs) on two different foundry nodes, a report by Chinese publication UDN, claims. The Zen 5 CCD powering the upcoming Ryzen "Granite Ridge" desktop processors, "Fire Range" mobile processors, and EPYC "Turin" server processors, will be reportedly built on the 4 nm EUV foundry node, a slightly more advanced node than the current 5 nm EUV the company is building "Zen 4" CCDs on. The "Zen 5c" CCD, or the chiplet with purely "Zen 5c" cores in a high density configuration; on the other hand, will be built on an even more advanced 3 nm EUV foundry node, the report says. Both CCDs will go into mass production in Q2-2024, with product launches expected across the second half of the year.

The "Zen 5c" chiplet has a mammoth 32 cores spread across two CCXs of 16 cores, each. Each CCX has 16 cores sharing a 32 MB L3 cache. It is to cram these 32 cores, each with 1 MB of L2 cache; and a total of 64 MB of L3 cache, that AMD could be turning to the 3 nm foundry node. Another reason could be voltages. If "Zen 4c" is anything to go by, the "Zen 5c" core is a highly compacted variant of "Zen 5," which operates at a lower voltage band than its larger sibling, without any change in IPC or instruction sets. The decision to go with 3 nm could be a move aimed at increasing clock speeds at those lower voltages, in a bid to generationally improve performance using clock speeds, besides IPC and core count. The EPYC processor with "Zen 5c" chiplets will feature no more than six such large CCDs, for a maximum core count of 192. The regular "Zen 5" CCD has just 8 cores in a single CCX, with 32 MB of L3 cache shared among the cores; and TSV provision for 3D Vertical Cache, to increase the L3 cache in special variants.

AMD's next generation Ryzen mobile processor family is undergoing a significant re-positioning of IP within its product stack, as the company introduces the new "elite experience" segment. The "Fire Range" mobile processor is a direct successor to "Dragon Range" MCM, with two 8-core "Zen 5" chiplets. It is essentially a BGA package of the desktop "Granite Ridge" processor, and comes with up to 16 "Zen 5" cores, for flagship gaming notebooks and mobile workstations. A segment below the current "Dragon Range" is the current "Hawk Point" silicon, driving premium experiences. There is a rather large CPU performance gap between the two, as would be the case between the upcoming "Fire Range" and "Kraken Point," which is why AMD is creating the "elite experience" segment, and filling it with "Strix Halo" and "Strix Point," which will square off against Core Ultra 7 and Core Ultra 9 processors, as well as certain HX-segment 14th Gen Core mobile processors. "Strix Point" has a significant core-count increase to 12, along with a large iGPU. We've extensively covered "Strix Point" in our older article, but now we have more information on the elusive "Kraken Point."

"Kraken Point" is codename for AMD's next-generation monolithic mobile processor silicon being designed to power Ryzen processor SKUs competing against the bulk of Intel Core Ultra 5 and Core Ultra 7 SKUs. This chip will be built on a refined 4 nm EUV node by TSMC, and will be monolithic. Its most interesting aspect is the CPU complex. It reportedly features a combination of four regular "Zen 5" cores, and four "Zen 5c" low power cores. All eight cores will likely share a single CCX, which means they share a common L3 cache, which enables easy movement of threads between the two kinds of cores, without having to make round-trips to the DRAM.

With Windows 11 23H2 setting the stage for increased prevalence of AI in client PC use cases, the new hardware battleground between AMD and its rivals Intel, Apple, and Qualcomm, will be in equipping their mobile processors with sufficient AI acceleration performance. AMD already introduced accelerated AI with the current "Phoenix" processor that debuts Ryzen AI, and its Xilinx XDNA hardware backend that provides a performance of up to 16 TOPS. This will see a 2-3 fold increase with the company's 2024-25 mobile processor lineup, according to a roadmap leak by "Moore's Law is Dead."

At the very top of the pile, in a product segment called "ultimate compute," which consists of large gaming notebooks, mobile workstations, and desktop-replacements; the company's current Ryzen 7045 "Dragon Range" processor will continue throughout 2024. Essentially a non-socketed version of the desktop "Raphael" MCM, "Dragon Range" features up to two 5 nm "Zen 4" CCDs for up to 16 cores, and a 6 nm cIOD. This processor lacks any form of AI acceleration. In 2025, the processor will be succeeded with "Fire Range," a similar non-socketed, mobile-friendly MCM that's derived from "Granite Ridge," with up to two 4 nm "Zen 5" CCDs for up to 16 cores; and the 6 nm cIOD. What's interesting to note here, is that the quasi-roadmap makes no mention of AI acceleration for "Fire Range," which means "Granite Ridge" could miss out on Ryzen AI acceleration from the processor. Modern discrete GPUs from both NVIDIA and AMD support AI accelerators, so this must have been AMD's consideration to exclude an XDNA-based Ryzen AI accelerator on "Fire Range" and "Granite Ridge."