During MWC, Fujitsu partnered with networking equipment maker 1FINITY to unveil the first silicon wafers and an engineering sample of its "MONAKA" CPU. Scheduled for release in 2027, the initial Fujitsu MONAKA CPU utilizes the Armv9-A architecture and a 3D chiplet layout that combines a core die with separate SRAM and I/O dies. A single chip features 144 cores, and two-socket configurations can scale up to 288 cores per node. The platform supports 12-channel DDR5, PCIe 6.0 with CXL 3.0, and Arm SVE2 for AI and HPC workloads. Fujitsu has chosen TSMC to manufacture this chip using the 2 nm node, paired with Broadcom's 3.5D eXtreme Dimension System-in-Package (XDSiP) packaging architecture. This packaging allows MONAKA to become a 144-core design featuring four 36-core chiplets. These chiplets are stacked face-to-face with SRAM tiles through hybrid copper bonding, utilizing TSMC's N5 process for the cache layer.

In the pictures below, we can see the silicon complex in its early sample packaging, which shows a large central I/O die, HBM memory around the CPU, and the new packaging technology. Reportedly, this CPU has already reached a working version, with Broadcom shipping the CPU to Fujitsu in late February this year. After initial testing and early performance validation, Fujitsu plans to ship these processors to customers around summer, with mass shipping to commence in 2027. The company envisions this SoC as a powerhouse for AI inference, simulation, and large-scale data processing. It will sell these systems to external customers, who showed great interest in Fujitsu's A64FX when the Fugaku computer came online. Fugaku was the most powerful supercomputer back in 2020, achieving 415.53 PetaFLOPS of FP64 and an impressive HPL-AI score of 1.421 ExaFLOPS using lower FP16 precision. Hence, we expect the new MONAKA CPU to enable much greater speeds and some efficiency improvements as well.

Scaleway, Europe's leading cloud provider, and Fujitsu, a global leader in high performance computing, today announced a strategic collaboration to explore CPU-based AI inference as a sustainable and sovereign option for European organizations. By combining Fujitsu's advanced processor research with Scaleway's European cloud expertise, the two companies aim to evaluate new ways to support efficient, responsible and secure AI deployment at scale.

Europe's rapid adoption of AI has increased demand for infrastructures that reconcile performance, energy efficiency and data sovereignty. Many organizations now operate AI models continuously in production and require predictable performance, controlled operating costs and a reduced environmental footprint. CPU-based architectures are particularly well suited to these requirements as they offer stable performance, efficient energy use and simple integration within existing environments. MONAKA has been designed for this purpose and to complement the AI systems already used within Europe.

Fujitsu has shared new details on its upcoming Arm-based Monaka processors during its Technology Update 2025 event. Monaka is planned as the company's next major datacenter CPU line, with the first chips arriving in 2027 on a 2 nm process. The initial Fujitsu Monaka CPU uses the Armv9-A architecture and a 3D chiplet layout combining a core die with separate SRAM and I/O dies. A single chip carries 144 cores, with two-socket configurations scaling to 288 cores per node. The platform supports 12-channel DDR5, PCIe 6.0 with CXL 3.0, and Arm SVE2 for AI and HPC workloads. Fujitsu is positioning it as a high-efficiency part aimed at AI inference, simulation, and large-scale data processing.

From there, the roadmap moves into more specialized designs. Targeted for late 2029, Monaka-X is a CPU-only built on a 1.4 nm class process. Fujitsu says it will be the first server CPU to implement Arm SME (Scalable Matrix Extension). The chip uses a 3D many-core layout tightly coupled with a GPU and includes hardware confidential-computing features as standard. The next CPU will be Monaka-X with NPU planned for the second half of 2030. This variant adds an on-package NPU aimed at mid-sized LLMs. Fujitsu is exploring a reconfigurable engine plus a dedicated quantization accelerator. Arriving in 2031, Monaka-XX is described as a full CPU-NPU fusion chip, again planned to be built on 1.4 nm or newer nodes. Overall, the roadmap shows Fujitsu pushing deeper into high-core-count Arm servers with increasing AI acceleration built directly into the platform.

Fujitsu has previewed its next-generation Monaka processor, a 144-core powerhouse for data center. Satoshi Matsuoka of the RIKEN Center for Computational Science showcased the mechanical sample on social media platform X. The Monaka processor is developed in collaboration with Broadcom and employs an innovative 3.5D eXtreme Dimension System-in-Package architecture featuring four 36-core chiplets manufactured using TSMC's N2 process. These chiplets are stacked face-to-face with SRAM tiles through hybrid copper bonding, utilizing TSMC's N5 process for the cache layer. A distinguishing feature of the Monaka design is its approach to memory architecture. Rather than incorporating HBM, Fujitsu has opted for pure cache dies below compute logic in combination with DDR5 DRAM compatibility, potentially leveraging advanced modules like MR-DIMM and MCR-DIMM.

The processor's I/O die supports cutting-edge interfaces, including DDR5 memory, PCIe 6.0, and CXL 3.0 for seamless integration with modern data center infrastructure. Security in the design is taken care of with the implementation of Armv9-A's Confidential Computing Architecture for enhanced workload isolation. Fujitsu has set ambitious goals for the Monaka processor. The company aims to achieve twice the energy efficiency of current x86 processors by 2027 while maintaining air cooling capabilities. The processor aims to do AI and HPC with the Arm SVE 2 support, which enables vector lengths up to 2048 bits. Scheduled for release during Fujitsu's fiscal year 2027 (April 2026 to March 2027), the Monaka processor is shaping up as a competitor to AMD's EPYC and Intel's Xeon processors.