Super Micro Computer, Inc., an AI, Enterprise, Storage, and 5G/Edge Total IT Solution Provider featuring Data Center Building Block Solutions (DCBBS), today announced its next-generation H15 server portfolio powered by 6th Gen AMD EPYC 9006 Series CPUs, optimized for next generation GPUs including AMD Instinct, and connected by AMD Pensando networking. With up to 256 cores and 512 threads, H15 systems meet the growing compute demands of cloud, enterprise, storage, high-performance computing (HPC), and agentic AI workloads. With breakthrough 1.7x generational CPU performance improvement1, expanded memory and I/O bandwidth, and industry-leading compute density, customers are now able to run more concurrent AI agents, accelerate enterprise applications, and maximize host-node performance while operating within existing power envelopes.

"The latest AMD powered additions to our DCBBS family deliver the next generation of AI infrastructure, optimized for high performance, rapid scalability, and peak efficiency," said Vik Malyala, Chief Business Officer at Supermicro. "Backed by our global services team, resilient U.S. supply chain, and consistent investment in US AI innovation, we continue to help customers deploy and scale AI with confidence."

Enterprises, cloud providers, and research organizations need AI infrastructure that delivers results fast, not just parts to assemble. Today, AMD is introducing AMD Pensando Pollara 400 AI NIC-Ready Server Platforms: a growing ecosystem of server systems from leading partners that come preconfigured with the AMD Pensando Pollara 400 AI Network Interface Card to deliver high-performance, Ethernet-based AI networking out of the box for both the front-end and back-end. By combining proven server designs, powerful AMD compute, and Pollara 400's fully programmable 400G Ethernet, these platforms help organizations stand up scalable AI clusters faster and with greater confidence.

AMD Pensando Pollara 400 AI NIC-Ready Server Platforms brings together servers from leading partners with the AMD Pensando Pollara 400 AI NIC to easily power the communication cycles required for the unique demand of AI workloads. These platforms give customers a consistent AI networking foundation across a broad ecosystem of server designs. Partners can offer dense GPU training nodes, high-throughput inference servers, that can often combine AMD EPYC Server CPUs, AMD Instinct GPU accelerators, and AMD Pensando Pollara 400 AI NIC-based Ethernet fabrics. Unlike other AI NICs, the AMD Pensando Pollara 400 AI NIC is fully hardware and software programmable, meaning the AI NIC can be updated without a hardware overhaul as transport and congestion-control algorithms evolve. This flexibility allows the same server platform to be tuned over time for new AI workloads, updated business priorities, and topologies.

Giga Computing, a subsidiary of GIGABYTE and an industry leader in accelerated computing servers and advanced cooling technologies, today announced participation in the first ever OCP APAC Summit. At GIGABYTE booth #S01, Giga Computing will highlight a broad portfolio of OCP-based solutions, including three newly launched solutions designed to meet the growing demands of modern data centers.

Among the featured innovations is the GIGABYTE TO86-ZX1-AA03, a high-performance, accelerated computing server that integrates AMD CPUs & GPUs. Complementing the flagship system are two flexible compute nodes, the GIGABYTE TO25-ZU4 and TO25-ZU5, both supporting AMD CPUs and offering versatile networking and storage options.

AMD at its 2025 Advancing AI event name-dropped its two next generations of EPYC server processors to succeed the current EPYC "Turin" powered by Zen 5 microarchitecture. 2026 will see AMD debut the Zen 6 microarchitecture, and its main workhorse for the server segment will be EPYC "Venice." This processor will likely see a generational increase in CPU core counts, increased IPC from the full-sized Zen 6 cores, support for newer ISA, and an updated I/O package. AMD is looking to pack "Venice" with up to 256 CPU cores per package.

AMD is looking to increase the CPU core count per CCD (CPU complex die) with "Zen 6." The company plans to build these CCDs on the 2 nm TSMC N2 process node. The sIOD (server I/O die) of "Venice" implements PCI-Express Gen 6 for a generational doubling in bandwidth to GPUs, SSDs, and NICs. AMD is also claiming memory bandwidth as high as 1.6 TB/s. There are a couple of ways they can go about achieving this, either by increasing the memory clock speeds, or giving the processor a 16-channel DDR5 memory interface, up from the current 12-channel DDR5. The company could also add support for multichannel DIMM standards, such as MR-DIMM and MCR-DIMMs. All said and done, AMD is claiming a 70% increase in multithreaded performance over the current EPYC "Turin," which we assume is comparing the highest performing part to its next-gen successor.

To effectively train and deploy generative AI, large language models, or agentic AI, it's crucial to build parallel computing infrastructure that offers the best performance to meet the demands of AI/ML workloads but also offers the kind of flexibility that the future of AI demands. A key aspect for consideration is the ability to scale-out the intra-node GPU-GPU communication network in the data center.

At AMD, we believe in preserving customer choice by providing customers with easily scalable solutions that work across an open ecosystem, reducing total cost of ownership—without sacrificing performance. Remaining true to that ethos, last October, we announced the upcoming release of the new AMD Pensando Pollara 400 AI NIC. Today we're excited to share the industry's first fully programmable AI NIC designed with developing Ultra Ethernet Consortium (UEC) standards and features is available for purchase now. So, how has the Pensando Pollara 400 AI NIC been uniquely designed to accelerate AI workloads at scale?