The U.S. Department of Energy's (DOE's) National Nuclear Security Administration (NNSA) selected next-generation Intel Xeon Scalable processors (code-named "Sapphire Rapids") to power the supercomputers used within NNSA's Life Extension Program for mission-critical efforts in stockpile stewardship. The NNSA's Lawrence Livermore National Laboratory awarded a subcontract to Dell Technologies to supply the Intel-powered computing systems that will be deployed at the NNSA's Tri-Labs (Lawrence Livermore National Laboratory, Los Alamos National Laboratory and Sandia National Laboratories).

Today's news supports the NNSA's Advanced Simulation and Computing (ASC) program operated at the NNSA's Tri-Labs. The Commodity Technology Systems contract (CTS-2) awarded today will enable these three national laboratories to build more powerful, energy-efficient computing systems that will focus on performing extensive modeling and simulation capabilities in support of NNSA's stockpile stewardship program.

Intel has been working on a technology that will improve the lives of all users that have an Intel-based processor in their system. According to the recent round of patches for the Linux kernel, Intel's engineers have been working on a feature called Intel Seamless Update, which promises to bring updating of system firmware without a need to reboot. First of all, it is important to note that firmware upgrades have been stuck at requiring reboot in order to apply patches. This has caused many systems to be down and to slow down the infrastructure by a wide margin, as these updates can last up to several minutes, where the system is rebooting and can not be used.

Intel has presented an idea of creating a technology that will update system firmware, such as UEFI, in the run time. That means that the system will be able to apply firmware patches, without ever needing a reboot, minimizing downtime. This is especially valuable for customers with very high service level agreements (SLAs) around downtime, meaning that almost 100% uptime (not possible to be 100% generally speaking) is required for these systems. An example of this would be medical server infrastructure, which has to constantly be available for access. Using this technology, systems such as these could update their firmware and be online non-stop, without maybe ever needing to reboot. The said feature is supposed to arrive in time for the launch alongside Intel "Sapphire Rapids" Xeon processors.

TYAN, an industry-leading server platform design manufacturer and a MiTAC Computing Technology Corporation subsidiary, today introduced a new Intel Xeon E-2300 processor-based server motherboard to the market. The new product is designed to offer enhanced performance, greater PCIe support and faster memory speeds for entry-level servers in data centers and prevailing Multi-access Edge Computing (MEC) servers in 5G networks.

"TYAN's Tempest CX S5560 server motherboard based on Intel Xeon E-2300 processor is optimized for cloudand edge computing applications. By utilizing Intel's features of increased DDR4 speeds, double M.2 slots, and PCIe 4.0 capabilities, TYAN's customers can get outstanding performance and maintain their competitiveness with cost-effective benefit", said Danny Hsu, Vice President of MiTAC Computing Technology Corporation's Server Infrastructure Business Unit.

Intel today released the Xeon E-2300 series enterprise processors for entry level servers, based on the 14 nm "Rocket Lake-E" silicon. These are slightly different from the Xeon W-1300 series processors targeting workstations. The E-2300 has a more server-relevant feature-set, and is designed for high uptime. You get ECC memory support, as well as vPro, SGX, and MPX (memory encryption). You still get only client-relevant AVX-512 instructions found in 11th Gen Core processors, as well as DLBoost AI acceleration.

The "Rocket Lake-E" silicon comes with up to 8 "Cypress Cove" CPU cores, each with 512 KB of dedicated L2 cache, and 16 MB of shared L3 cache. The processor features a 2-channel DDR4 memory interface that supports up to 128 GB of DDR4-3200 memory. It puts out 20 PCI-Express 4.0 lanes that can be segmented in a number of ways; as well as the Intel C250 series chipset puts out 24 PCI-Express 3.0 lanes. Chips in this series come with TDP of up to 95 W.

Tachyum Inc. today announced that it has successfully executed the Linux boot process on the field-programmable gate array (FPGA) prototype of its Prodigy Universal Processor, in 2 months after taking delivery of the IO motherboard from manufacturing. This achievement proves the stability of the Prodigy emulation system and allows the company to move forward with additional testing before advancing to tape out.

Tachyum engineers were able to perform the Linux boot, execute a short user-mode program and shutdown the system on the fully functional FPGA emulation system. Not only does this successful test prove that the basic processor is stable, but interrupts, exceptions, timing, and system-mode transitions are, as well. This is a key milestone, which dramatically reduces risk, as booting and running large and complex pieces of software like Linux reliably on the Tachyum FPGA processor prototype shows that verification and hardware stability are past the most difficult turning point, and it is now obvious that verification and testing should successfully complete in the coming months. Designers are now shifting their attention to debug and verification processes, running hundreds of trillions of test cycles over the next few months, and running large scale user mode applications with compatibility testing to get the processor to production quality.

Intel's upcoming Xeon "Sapphire Rapids" processor features a memory interface topology that closely resembles that of first-generation AMD EPYC "Rome," thanks to the multi-chip module design of the processor. Back in 2017, Intel's competing "Skylake-SP" Xeon processors were based on monolithic dies. Despite being spread across multiple memory controller tiles, the 6-channel DDR4 memory interface was depicted by Intel as an advantage over EPYC "Rome." AMD's first "Zen" based enterprise processor was a multi-chip module of four 14 nm, 8-core "Zeppelin" dies, each with a 2-channel DDR4 memory interface that added up to the processor's 8-channel I/O. Much like "Sapphire Rapids," a CPU core from any of the four dies had access to memory and I/O controlled by any other die, as the four were networked over the Infinity Fabric interconnect in a configuration that essentially resembled "4P on a stick."

With "Sapphire Rapids," Intel is taking a largely similar approach—it has four compute tiles (dies) instead of a monolithic die, which Intel says helps with scalability in both directions; and each of the four compute tiles has a 2-channel DDR5 or 1024-bit HBM memory interface, which add up to the processor's 8-channel DDR5 total I/O. Intel says that CPU cores from each tile has equal access to memory, last-level cache, and I/O controlled by another die. Inter-tile communication is handled by EMIB physical media (55 micron bump-pitch wiring). UPI 2.0 makes up the inter-socket interconnect. Each of the four compute tiles has 24 UPI 2.0 links that operate at 16 GT/s. Intel didn't detail how memory is presented to the operating system, or the NUMA hierarchy, however much of Intel's engineering effort appears to be focused on making this disjointed memory I/O work as if "Sapphire Rapids" were a monolithic die. The company claims "consistent low-latency, high cross-sectional bandwidth across the SoC."

Intel today announced AWS customers can access the latest 3rd Gen Intel Xeon Scalable processors via the new Amazon Elastic Compute Cloud (Amazon EC2) M6i instances. Optimized for high-performance, general-purpose compute, the latest Intel-powered Amazon EC2 instances provide customers increased flexibility and more choices when running their Intel-powered infrastructure within the AWS cloud. Today's news is a further continuation of Intel and AWS' close collaboration, giving customers scalable compute instances in the cloud for almost 15 years.

"Our latest 3rd Gen Intel Xeon Scalable processors are our highest performance data center CPU and provide AWS customers an excellent platform to run their most critical business applications. We look forward to continuing our long-term collaboration with AWS to deploy industry-leading technologies within AWS' cloud infrastructure." -Sandra Rivera, Intel executive vice president and general manager, Datacenter and AI Group.

TerraMaster, a professional brand that specializes in providing innovative storage products for home, businesses and enterprises, launches the U12 rackmount enterprise cloud storage server equipped with a powerful quad-core Intel Xeon processor.TheTerraMaster U12 is a 12-bay networked storage server with high scalability. The U12 is designed to meet the requirements of enterprise virtualizations, data-intensive applications, and service continuity.

The new TerraMaster U12 Series rackmount storage server is the ideal solution for business cloud storage servers, providing high-speed data storage for multiple sharing users. The latest TerraMaster U12 rackmount server features an upgraded processor, up to a quad-core Intel Xeon, and 8 GB of DDR4 memory that's upgradeable to 64 GB maximum. The rackmount server also comes with two PCIe X16 Gen3 slots offering upgrade options such as 10 GbE NIC cards and RAID cards. Also, users can configure and upgrade the CPU and memory to enhance performance as required.

Intel has recently unveiled that their technology powered the 8K 60 FPS Tokyo Olympics broadcast which was available to select customers in Japan. The games were recorded in 8K at 60 FPS with 4:2:2 Chroma subsampling and 10-bit HDR which resulted in a bitrate of 48 Gbps. This uncompressed stream was then encoded on servers each featuring quad 28 core Xeon 8380H processors and 384 GB of ram into two HEVC distribution streams at 250 Mbps and 50-100 Mbps bitrates. These streams were then distributed to users over the internet where the 8K stream could be decoded and displayed on an 8K TV over HDMI 2.1. Intel used a workstation PC with an 18-core Xeon W-2295 and 64 GB of ram to decode and play the video stream on the TV. This 8K service was only made available to select NHK subscribers in Japan while most international broadcasts offered a maximum resolution of 4K.

EK, the leading liquid cooling gear manufacturer, today announces the availability of two high-performance liquid cooling solutions for the Intel Xeon W-3300 processor family, optimized for advanced workstation professionals in a single-socket LGA 4189 solution. A kit is also available, offering enterprise-grade components and tools to build the whole loop to effectively cool the socket LGA 4189 Intel processors.

EK is no stranger to the demanding needs of heavily threaded, I/O intensive workloads across Architecture, Engineering and Construction, Media and Entertainment, and Artificial Intelligence and Machine Learning industries. The EK-Pro QDC Kit P360 LGA 4189 bundles the EK-Pro CPU Water Block, a 360 mm radiator, and enterprise-grade water loop parts. It is designed to cool the most powerful of Intel Xeon W-3300 processors, which offer up to 38 cores and 76 threads with Intel Hyper-Threading Technology, up to 64 CPU PCIe Gen 4.0 lanes, up to 4.0 GHz with Intel Turbo Boost 2.0 technology, and are rated up to 270 W of power.

The leading global motherboard, manufacturer, ASRock, is proud to announce its Intel C621A powered workstation motherboards, the C621A WS, this motherboard is able to pair with the latest Xeon W-3300 processors, giving ultimate performance for almost every application such as content creating, rendering machine and high-end workstation.

The ASRock C621A WS is a platform solely built for workstation application from ground up, the 4 PCIe 4.0 x16, 3 PCIe 4.0 x8 on this motherboard supports up to 4 dual-slot GPU/FPGA cards, perfect for Deep learning workstation, Visual computing such as 3D design and creation. The motherboard has 8 DIMM slots running at 1 DIMM per channel mode giving ultimate stability and performance, supporting DDR4 RDIMM, LRDIMM, and Intel Optane Persistent Memory in order to maximize the system capability.

Intel today launched its newest generation Intel Xeon W-3300 processors, available today from its system integrator partners. Built for advanced workstation professionals, Intel Xeon W-3300 processors offer uncompromised performance, expanded platform capabilities, and enterprise-grade security and reliability in a single-socket solution.

Intel Xeon W-3300 processors are intelligently engineered to push the boundaries of performance, with a new processor core architecture that transforms for what expert workstation users can accomplish on a workstation.

The Intel Xeon W-3300 processors are designed for next-gen professional applications with heavily threaded, input/output-intensive workloads. Use cases stretch across artificial intelligence (AI), architecture, engineering, construction (AEC), and media and entertainment (M&E). With a new processor core architecture to transform efficiency and advanced technologies to support data integrity, Intel Xeon W-3300 processors are equipped to deliver uncompromising workstation performance.

Noctua today presented four CPU coolers and a separate mounting kit for Intel's LGA4189 platform. The new NH-U14S DX-4189, NH-U12S DX-4189, NH-U9 DX-4189 and NH-D9 DX-4189 4U are ideal for creating whisper-quiet high-end workstations using Intel's just-announced Ice Lake-64L based W3300 series Xeon processors for LGA4189. In addition to the new DX-4189 coolers, the NM-i4189 mounting kit allows Noctua DX-3647 and TR4-SP3 series coolers to be installed on LGA4189.

"DX line CPU coolers have become a default choice in premium grade quiet cooling solutions for Intel Xeon processors", says Roland Mossig (Noctua CEO). "The latest revision for LGA4189 comprises 14, 12 and two 9 cm models, covering anything from spacious workstation cases to 4U rack-mount servers."

Intel Corporation today revealed one of the most detailed process and packaging technology roadmaps the company has ever provided, showcasing a series of foundational innovations that will power products through 2025 and beyond. In addition to announcing RibbonFET, its first new transistor architecture in more than a decade, and PowerVia, an industry-first new backside power delivery method, the company highlighted its planned swift adoption of next-generation extreme ultraviolet lithography (EUV), referred to as High Numerical Aperture (High NA) EUV. Intel is positioned to receive the first High NA EUV production tool in the industry.

"Building on Intel's unquestioned leadership in advanced packaging, we are accelerating our innovation roadmap to ensure we are on a clear path to process performance leadership by 2025," Intel CEO Pat Gelsinger said during the global "Intel Accelerated" webcast. "We are leveraging our unparalleled pipeline of innovation to deliver technology advances from the transistor up to the system level. Until the periodic table is exhausted, we will be relentless in our pursuit of Moore's Law and our path to innovate with the magic of silicon."

Intel Corporation today reported second-quarter 2021 financial results. "There's never been a more exciting time to be in the semiconductor industry. The digitization of everything continues to accelerate, creating a vast growth opportunity for us and our customers across core and emerging business areas. With our scale and renewed focus on both innovation and execution, we are uniquely positioned to capitalize on this opportunity, which I believe is merely the beginning of what will be a decade of sustained growth across the industry," said Pat Gelsinger, Intel CEO. "Our second-quarter results show that our momentum is building, our execution is improving, and customers continue to choose us for leadership products."

Lenovo today announced the next generation of its family of entry-level desktop workstations - the ThinkStation P350 Tower, Small Form Factor (SFF) and Tiny. This trio of workstations hosts a technology upgrade - each one is equipped with support for PCIe Gen 4 for faster access to cutting-edge storage technologies, as well as enhanced professional graphics support. This latest generation of desktop workstations becomes Lenovo's most powerful entry-level offering and delivers a complete package of size options that can scale across a variety of industries and their respective workflows. From engineering and architecture, to finance, STEM/higher education and medical, these new desktop workstations offer versatile, flexible and ISV-certified performance at whatever size is best suited for users' needs and working environment.

Built with the latest high-performance Intel Core or Xeon processors with support up to 11th Gen Intel Core or Intel Xeon W processors, the ThinkStation P350 Tower and SFF are tailored for mission-critical tasks that require superior reliability and powerful performance. Both the Tower and SFF also offer NVIDIA RTX professional graphics, with the Tower now able to support up to the NVIDIA RTX A5000 graphics card. In addition to the 500 W power supply, the tower chassis now boasts a new 750 W PSU option - enabling high-end GPU users with the power needed to tackle sophisticated workflows. The ThinkStation P350 Tiny is the industry's smallest workstation at less than 1L and offers uncompromising performance within a form factor 96% smaller than a traditional desktop. Powered by 11th Gen Intel Core processors, it is uniquely qualified for enabling OEM solutions, and can be used as a host for like-local remote workstation power.

Intel is slowly preparing to launch its 4th generation of Xeon Scalable processors, with it being the first arrival of the 10 nm designs to the server market. Codenamed Sapphire Rapids, these processors are expected to bring much-needed IPC and platform improvements so Intel can keep up with AMD's EPYC processors. Today, we are getting some first performance results as well as some information about a specific 20 core, 40 threaded Intel Xeon Sapphire Rapids SKU. In a leaked Geekbench 4 submission, the latest Xeon processor was tested and we get to see even more details about the processor.

Featuring 20 cores and 40 threads, the CPU has a base clock speed of 1.5 GHz. It features as much as 40 MB of L2 cache and 75 MB of L3 cache spread across the die. The system was tested on an Intel reference platform called VulcanCity, with this configuration carrying 32 GB of DDR5 memory. The reported results of the benchmarks that this processor went through are not very impressive. These numbers are easily beaten by AMD Ryzen 9 5950X, however, this is only an engineering sample with low clock speed and it could be possible that Geekbench is not optimized to run on this processor. You can check out some of the performance numbers below, and see the submitted results here.

Intel's Lisa Spelman, corporate vice president and general manager of the Xeon and Memory Group at Intel Corporation, has yesterday published a blog post talking about Intel's next-generation server platform codenamed Sapphire Rapids. The SPR platform is Intel's biggest step-up in the server processor space, and it is the exact CPU that will power the Aurora exascale supercomputer. Besides improvements to the CPU microarchitecture, the platform itself is bringing many benefits with it as well. It will use the latest industry protocols like DDR5 and PCIe 5.0. This is making a strong combination designed even for exascale supercomputers to be powered by this processor. However, the availability of this CPU was a bit of a mystery until yesterday. Below, you can see the quote from Ms. Lisa Spelman about the availability of said processors.

Lisa SpelmanDemand for Sapphire Rapids continues to grow as customers learn more about the benefits of the platform. Given the breadth of enhancements in Sapphire Rapids, we are incorporating additional validation time prior to the production release, which will streamline the deployment process for our customers and partners. Based on this, we now expect Sapphire Rapids to be in production in the first quarter of 2022, with ramp beginning in the second quarter of 2022.

Intel today, in its 2021 International Supercomputing Conference presentation, revealed that certain next-generation Xeon "Sapphire Rapids" SKUs come with on-package high-bandwidth memory (HBM). Given the context of its presentation, these could be special SKUs designed for high-density HPC setups, in which the processor package includes certain amount of "PMEM" (package memory), besides the processor's 8-channel DDR5 memory interface.

The size of the HBM PMEM, and its position in the memory hierarchy, were detailed, too. Given its high-density applications, PMEM may not serve as a victim cache for the processor, but rather be capable of serving as main memory, with none of the DDR5 DRAM channels populated with DIMMs. On machines with DIMMs, the PMEM will serve as a victim cache for the processor's on-die last-level cache, accelerating the memory I/O. "The next-generation of Intel Xeon Scalable processors (code-named "Sapphire Rapids) will offer integrated High Bandwidth Memory (HBM), providing a dramatic boost in memory bandwidth and a significant performance improvement for HPC applications that operate memory bandwidth-sensitive workloads. Users can power through workloads using just High Bandwidth Memory or in combination with DDR5," says Intel.

At the 2021 International Supercomputing Conference (ISC) Intel is showcasing how the company is extending its lead in high performance computing (HPC) with a range of technology disclosures, partnerships and customer adoptions. Intel processors are the most widely deployed compute architecture in the world's supercomputers, enabling global medical discoveries and scientific breakthroughs. Intel is announcing advances in its Xeon processor for HPC and AI as well as innovations in memory, software, exascale-class storage, and networking technologies for a range of HPC use cases.

"To maximize HPC performance we must leverage all the computer resources and technology advancements available to us," said Trish Damkroger, vice president and general manager of High Performance Computing at Intel. "Intel is the driving force behind the industry's move toward exascale computing, and the advancements we're delivering with our CPUs, XPUs, oneAPI Toolkits, exascale-class DAOS storage, and high-speed networking are pushing us closer toward that realization."

Intel CEO Pat Gelsinger announced the addition of two new technology leaders to its executive leadership team, as well as several changes to Intel business units. Current Intel executives Sandra Rivera and Raja Koduri will each take on new senior leadership roles, and technology industry veterans Nick McKeown and Greg Lavender will join the company.

"Since re-joining Intel, I have been impressed with the depth of talent and incredible innovation throughout the company, but we must move faster to fulfill our ambitions," said Gelsinger. "By putting Sandra, Raja, Nick and Greg - with their decades of technology expertise - at the forefront of some of our most essential work, we will sharpen our focus and execution, accelerate innovation, and unleash the deep well of talent across the company."

Today as part of its MWC 2021 virtual event, Intel showcased multiple groundbreaking network deployments powered by its technology and unveiled the Intel Network Platform. It also announced new additions to its leading product portfolio for 5G and edge, reaffirming its position as the leading network silicon provider. The company confirmed its leadership in virtual radio access network (vRAN), noting nearly all commercial vRAN deployments are running on Intel technology. In the years ahead, it sees global vRAN base station deployments scale, from hundreds to "hundreds of thousands," and eventually millions.

"Network transformation is critical to unleash the possibilities of 5G and maximize the rise of the edge to create new and better business outcomes for our customers across the globe. As the leading network silicon provider, we have been driving this shift to virtualizing the core to access to edge, and implementing edge computing capabilities with our decade of experience, to power our society's digital revolution," said Dan Rodriguez, Intel corporate vice president, Network Platforms Group.

Thanks to the information coming from Yuuki_Ans, a person which has been leaking information about Intel's upcoming 4th generation Xeon Scalable processors codenamed Sapphire Rapids, we have the first die shots of the Sapphire Rapids processor and its delidded internals to look at. After performing the delidding process and sanding down the metal layers of the dies, the leaker has been able to take a few pictures of the dies present on the processor. As the Sapphire Rapids processor uses multi-chip modules (MCM) approach to building CPUs, the design is supposed to provide better yields for Intel and give the 10 nm dies better usability if defects happen.

In the die shots, we see that there are four dies side by side, with each die featuring 15 cores. That would amount to 60 cores present in the system, however, not all of the 60 cores are enabled. The top SKU is supposed to feature 56 cores, meaning that there would be at least four cores disabled across the configuration. This gives Intel flexibility to deliver plenty of processors, whatever the yields look like. The leaked CPU is an early engineering sample design with a low frequency of 1.3 GHz, which should improve in the final design. Notably, as Sapphire Rapids has SKUs that use in-package HBM2E memory, we don't know if the die configuration will look different from the one pictured down below.

Marvell today announced its new Bravera SC5 controller family, bringing unprecedented performance, best-in-class efficiency, and leading security features to address ever-expanding workloads in the cloud. The massive amount of data to be processed in cloud data centers is driving demand for faster and higher bandwidth storage in these environments. Marvell's Bravera SC5 SSD controllers address the critical requirements for scalable, containerized cloud storage infrastructure. By enabling the highest performing flash storage solutions, Marvell's controllers are poised to be the foundation for data centers that offer ultra-low latency, real-time applications while also providing cost-optimized, cloud-scale capacity.

As the industry's first SSD controllers to support PCIe 5.0 and NVMe 1.4b, Marvell's Bravera SC5 doubles the performance compared to PCIe 4.0 SSDs. This contributes to accelerated workloads and reduced latency, dramatically improving the user experience. In order to meet cloud service providers' stringent security requirements to ensure users' data is safe and protected, the controllers offer FIPS-compliant root of trust (RoT), AES 256-bit encryption and multi-key revocation. The new controllers are the first with a hardware-based Elastic SLA Enforcer to assure quality of service (QoS) and provide metering capabilities per customer to increase overall storage efficiency and utilization while lowering total cost of ownership (TCO).

Intel's upcoming Xeon "Sapphire Rapids" processors which debut in the second half of 2021, will feature up to 80 "Golden Cove" CPU cores, and not the previously rumored "Willow Cove." This was clarified by an Intel developer in a Linux Kernel code e-mail chain. "Golden Cove" CPU cores are more advanced than the "Willow Cove" cores found in current-generation Intel products, such as the client "Tiger Lake" processors. Intel stated that "Golden Cove" introduces an IPC gain over "Willow Cove" (expressed as "ST perf"), increased AI inference performance from an updated GNI component, "network and 5G perf," which is possibly some form of network stack acceleration, and additional security features.

Over in the client segment, the 12th Gen Core "Alder Lake" processor debuts a client variant of "Golden Cove." The "Alder Lake-S" silicon features eight "Golden Cove" cores serving as the "big" performance cores, next to eight "little" low-power "Gracemont" cores. The client- and server implementations of "Golden Cove" could differ mainly in the ISA, with the client chip receiving a slightly skimmed AVX-512 and DLBoost instruction-sets, with only client-relevant instructions. The server variant, in addition being optimized for a high core-count multi-core topology; could feature a more substantial AVX-512 and DLBoost implementation relevant for HPC use-cases.