AMD Zen 6 Technical Deep Dive 84

AMD Zen 6 Technical Deep Dive

Conclusion »

The Roadmap


AMD showed a four-generation server roadmap on a two-year cadence:

GenerationCodenameCoresYearKey Features
5th GenTurinZen 5 / Zen 5c2024Wider and deeper compute, re-optimized cache hierarchy, full 512-bit AI vectors
6th GenVeniceZen 6 / Zen 6c2026First to 2 nm and 512 threads, first x86 to PCIe Gen 6, first to JEDEC MRDIMM
7th GenFlorenceZen 7 / Zen 7c2028Next gen process node, next gen memory with MRDIMM and LPDDR, ACE AI Compute Extensions
8th GenRavennaZen 8 family2030In development

The interesting entry is "ACE: AI Compute Extensions" against Zen 7 in 2028. AMD gave no detail, but a named compute extension block sitting on a CPU roadmap suggests something more substantial than another vector instruction set. The Helion rack roadmap tracks alongside it, with Helion Gen 2 on Florence in 2028 and Gen 3 on Ravenna in 2030.

Availability

  • Venice 9006 SP7: Shipping now
  • Venice 9006 SP8: 1H 2027
  • Venice-X 9006X SP7: 2H 2027
  • Verano 9006 LP: 2H 2027

Microsoft Azure is first to market, announcing a preview of HDv2 built on dual 256-core Venice sockets, with claimed 1.8x performance on a 1.3 TB SparkETL data processing run against the closest contemporary alternative. Azure also announced HXv2 on Venice-X for silicon design and technical computing, and ND MI455X v7 Helios servers.
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