Thursday, April 2nd 2026
AMD Details Upcoming Zen 6 PQOS Extensions: Advanced Bandwidth and Privilege Controls
Imagine you're a web hosting vendor leasing out specific number of CPU cores of a large core-count processor. You'd want to specify QoS limits on the shared L3 cache performance for those cores, so they don't hamper performance of other tenants. AMD this week released a technical document detailing the Platform Quality of Service (PQOS) ISA extensions for its next-generation Zen 6 microarchitecture. These ISA enhancements provide sysadmins and cloud providers with greater control over processor and memory subsystem performance. The latest document outlines three primary additions to the Zen 6 PQOS feature set, Global Bandwidth Enforcement (GLBE), Global Slow Bandwidth Enforcement (GLSBE), and Privilege-Level Zero Association (PLZA). These features are designed to scale performance management across complex multicore environments by allowing software to regulate bandwidth and execution privileges more effectively across expansive groups of logical processors. The development shows that AMD is steering toward a more closely collaborative hardware QoS solution for its multicore processors.
A highlight of the Zen 6 PQOS updates is the implementation of Global Bandwidth Enforcement (GLBE), which allows system software to specify L3 external bandwidth limits for groups of cores that span across multiple traditional QoS Domains. By grouping these into a unified "GLBE Control Domain," AMD enables a competitively shared bandwidth ceiling for specific Classes of Service (CoS). This upgrades older architectures that only provided L3 external bandwidth enforcement on a strictly per-domain granularity. Next up, AMD introduced Global Slow Bandwidth Enforcement (GLSBE), a parallel feature that applies the exact same multi-domain bandwidth limiting principles to system memory explicitly designated as "Slow Memory." Both GLBE and GLSBE provide granular controls via specific model-specific registers.
Rounding out the Zen 6 microarchitecture updates is Privilege-Level Zero Association (PLZA), a unique performance and security monitoring feature that grants hardware the ability to automatically associate highly privileged execution with a specific CoS or Resource Monitoring Identifier (RMID). Historically, AMD PQOS mechanisms tied these identifiers to each logical processor on a standard per-thread basis. PLZA, however, empowers the system to actively override this thread-level association whenever a logical processor executes at Privilege Level Zero (CPL=0). This ensures that system software, such as the host OS kernel or a hypervisor running with AMD SVM enabled can utilize tailored resource limits regardless of the thread's standard user-level configuration.
Source:
AMD
A highlight of the Zen 6 PQOS updates is the implementation of Global Bandwidth Enforcement (GLBE), which allows system software to specify L3 external bandwidth limits for groups of cores that span across multiple traditional QoS Domains. By grouping these into a unified "GLBE Control Domain," AMD enables a competitively shared bandwidth ceiling for specific Classes of Service (CoS). This upgrades older architectures that only provided L3 external bandwidth enforcement on a strictly per-domain granularity. Next up, AMD introduced Global Slow Bandwidth Enforcement (GLSBE), a parallel feature that applies the exact same multi-domain bandwidth limiting principles to system memory explicitly designated as "Slow Memory." Both GLBE and GLSBE provide granular controls via specific model-specific registers.
15 Comments on AMD Details Upcoming Zen 6 PQOS Extensions: Advanced Bandwidth and Privilege Controls
extra functionality takes most likely space and transistor count which increases power consumption and makes the hardware more expensive. very bad for the environment.
This means it’s better for the environment as fewer resources need to be wasted doing it in software.
Or having to spin up an entire new server.
Heck,I think shielding the OS like say windows from other tasks wouldn’t be bad an idea either.
I can see it being welcomed by the entire industry
Nearly EVERY Datacenter/Hyperscaler will want these. Linux/Windows Server etc will like it as it increases the ability to isolate VMs from each other more etc
i wait for the next errata that a cve was found.
note: some want 450 watt intel cpu heatres like igors lab wrongly claimed by measuring also the motherboard, the dram and the nvme in total. anyone else want low power consumption in idle for cpu, chipset and graphics and during workloads.
it's a good thing security is part of the hardware, considering one guy using claude was able to modify a bios to run an unsupported chip.
There is no telling what a well funded team of hackers will be able to do when they have the knowledge of the world at their finger tips
AMD made a very good decision to implement these security technologies now, as it's super important that these security advancements evolve with each new generation of CPUs. However, I think AMD is deliberately holding back other technologies that could greatly improve application performance (new instructions, for example) and is planning to release them only from the Zen7 generation onwards, to force people to buy future AM6 socket motherboards.
I sincerely hope that AMD stops treating consumers like fools and that the AM6 socket chipsets don't have such reduced I/O, like the AM5 chipsets, and that we can use ALL the motherboard connectors without some connectors being automatically disabled when others are already in use.
...Not being serious there obviously, we all have our tolerances in nerd town.Probably because the tech this article focuses on has nothing to do with home users...I know you intended this as an insult but honestly it's not a bad idea... we need more trees.
Seriously speaking, QoS on the chip like this will likely help to save energy and keep both costs, and environmental impacts down... so there's no reason to complain about this, at all.Why on earth would you think that because they wrote one specific article about an enterprise feature? Consumer stuff is coming too, trust me. It does every. single. time.
You can get an x870e board pay a lot for it and have all the bells and whistles the platform can offer.
It’s not worth it imho, and nothing to do with am5 and nothing about am6 will make that go away.
What I wish could happen would be the ability to get into the HEDT platform without having to fork out 11ty billion pounts as its the best part of $2-3k dollars in the current market to get into it.
The current jump from Consumer to HEDT is too much and I can imagine there would be quite a few people if you could get a board and CPU for $1-1.5k
What I would love to get the theoretical numbers would be something like a 4 CCD with 4 cores each part with all of them using 2 links to the IO die.
I hope manufacturers will gain a lot of experience making HBM in large volumes so the price drops to affordable levels and it can be paired with cpu's reducing the need to have boards with thousands of traces for all it's memory channels