Intel has once again confirmed its product roadmap for the next generation of graphics IP, despite rumors that there might not be anything new after the launch of the Xe3P. According to a new presentation from Intel's Anil Nanduri, Vice President of GTM & Product Management AI Accelerators, responsible for data center AI accelerators, Intel will have a dedicated graphics portfolio after the recently introduced "Crescent Island." Labeled as "Xe Next," the next generation of GPU IP is still under development and currently without an official name. It is expected to follow the rollout of the Xe3P-based "Crescent Island" inference-focused GPUs. With "Xe Next," the data center lineup is seemingly expanding into two production lines: inference-focused "Crescent Island" GPUs and the long-awaited "Jaguar Shores" GPU for AI training and HPC workloads.

For AI training and HPC workloads, Intel's "Jaguar Shores" design is reportedly being finalized and will be completed by the middle of this year, with production starting shortly after. Assuming a perfect design, we could see Intel's "Jaguar Shores" GPU late this year or early 2027. It will likely involve a mix of Intel's internal production in collaboration with TSMC or Intel's pure 18A design, assuming yields are manageable. We have already seen that Intel confirmed HBM4 memory will be used in these accelerators, and SK hynix appears to be the main partner supplying Intel with this memory. As a rack-scale design, Intel will compete with NVIDIA and AMD in the highest-margin business.

Intel Foundry has published a short video demonstration of its advanced packaging technologies, demoing silicon scaling beyond reticle limits of 830 mm². According to the video, Intel's Foveros 3D and EMIB-T interconnect can scale silicon to 12x reticle size, packaging up to 16 compute dies paired with 24 HBM5 memory modules in a single package. All of this will leverage Intel's 18A—including 18A-P and 18A-PT—and 14A nodes that the company is preparing for mass production and external customers.

The approach involves a sophisticated layering technique where base dies, manufactured using the 18A-PT process, incorporate backside power delivery to enhance logic density and reliability. These base dies house SRAM structures similar to Intel's "Clearwater Forest" architecture. They serve as foundations for compute tiles built on the advanced 14A/14A-E nodes, which feature second-generation RibbonFET transistors and PowerDirect technology. Foveros Direct 3D enables vertical stacking through ultra-fine pitch hybrid bonding, while EMIB-T incorporates through-silicon vias to facilitate higher bandwidth connections between chiplets. This combination achieves scalability beyond reticle limits and will support all HBM standard, including HBM4, HBM5, and future versions.

Intel is reportedly in talks with Taiwanese ASIC design house Alchip over the development of its next AI accelerator family, codenamed "Jaguar Shores." The design could be wrapped up by the first half of 2026, and be Intel's first solid footing in datacenter AI hardware after years of playing catch-up. Additionally it also comes at the time as the company shifts to a faster, more regular cadence for AI product refreshes. If the timeline holds, Jaguar Shores will be one of the clearest tests yet of whether Team Blue can stand as a meaningful challenge to the well-established players like NVIDIA, AMD, and countless other ASIC designers.

Under the deal being discussed, Alchip would not simply be a contractor but a deep engineering partner, taking on tasks from RTL integration and extensive verification to advanced packaging and system-level validation, while leaving wafer fabrication to leading foundries. Intel will be supplying IP and system requirements, while Alchip will be supplying custom ASIC execution. This could shorten development cycles and reduce risk. For Intel, outsourcing those heavy-lift engineering stages makes sense as it lets the company focus on architecture and software while leveraging Alchip's experience getting complex AI designs from spec to silicon.

Intel has apparently started a slow deprecation phase of its "Ponte Vecchio" Data Center GPU Max and "Arctic Sound" Data Center GPU Flex series. According to the changelog in the Intel XPU Manager—a free and open-source tool for monitoring and managing Intel data center GPUs—version 1.3.3 deprecates Data Center GPU Flex Series and Data Center GPU Max Series. Owners of these GPUs are now advised to stick with the older version 1.2.42 for maximum feature support, and not update to the latest release. There are several reasons why this is happening, and a part of the suspicion is that Intel is preparing for "Jaguar Shores" AI accelerator transition, even as its has been only two years since its Data Center GPU Flex/Max series have launched.

Built on the Xe-HPC microarchitecture using Intel's 10 process, Ponte Vecchio is a massive chip, measuring about 1,280 mm² and containing roughly 100 billion transistors. It features 16,384 shading units, 1,024 tensor cores, and has a peak TDP of up to 600 W per card. The Max 1100, 1350, and 1550 SKUs, which offer 48 to 128 GB of memory, once made the design appealing for specialized HPC and AI applications. However, its large scale results in high costs, significant power consumption, and integration challenges. Intel's "Arctic Sound," also based on the Generation 12.5 GPU microarchitecture and manufactured on the Intel 10 node, is a much smaller chip, measuring around 190 mm² with about 8 billion transistors, 8,192 shading units, and 128 ROPs, and has a TDP close to 500 W. The Arctic Sound 1T, 2T, and M SKUs are compact 16 GB designs aimed at midrange data center tasks, with the GPU first appearing in 2021.

During the Intel AI Summit in Seoul, South Korea, Intel teased its upcoming product portfolio, featuring next-generation memory technologies. Being in Seoul, memory makers like SK Hynix are Intel's main partners for these products. Teased at the summit is Intel's upcoming AI accelerator, called "Jaguar Shores," which utilizes the next-generation HBM4 memory, offering 2.0 TB/s of bandwidth per module across 2,048 IO pins. SK Hynix plans to support this accelerator with its memory, ensuring that Intel's big data center-grade AI accelerator is equipped with the fastest memory on the market. Since the "Falcon Shores" accelerator is only intended for testing with external customers, we don't have an exact baseline to compare to, and Jaguar Shores specifications are scarce.

Next up, Intel confirmed that its upcoming seventh-generation "Diamond Rapids" Xeon processors will use the second generation of MRDIMMs (Multiplexer Rank Dual Inline Memory Modules), an upgrade from the first-generation MRDIMMs used in the Xeon 6 family. The upgrade to MRDIMMs Gen 2 will allow Intel to push transfer rates to 12,800 MT/s, up from 8,800 MT/s in Xeon 6 with MRDIMMs Gen 1. Alongside this 45% speed bump in raw transfer rates, the memory channels are jumping to 16, up from 12 in the current generation, yielding an additional bandwidth boost. Given that MRDIMMs operate by connecting more memory ranks using a multiplexer, and that these modules buffer data and commands, the increased data transfer rate comes without any additional signal degradation. As Intel is expected to pack more cores, this will be an essential piece in the toolbox to feed them and keep those cores busy on the Oak Stream platform, based on the LGA9324 socket.

Intel shared some news and updates about its upcoming CPU architectures during the Q4 earnings call. Intel confirmed that "Panther Lake", its next major CPU, is set to be released in late 2025. "Panther Lake" will use Intel's latest 18A manufacturing process and might be part of the Core Ultra 300 series. "Panther Lake" is rumored to combine next-generation "Cougar Cove" P-cores with existing "Skymont" E-cores both in the Compute complex, and in the SoC tile as low-power island E-cores. However, Intel hasn't confirmed if it will be available for desktop systems.

The following CPU architecture, "Nova Lake", is set to debut in 2026. Unlike "Panther Lake", we know "Nova Lake" will work on desktop computers. This suggests desktop users might need to wait until 2026 for an upgrade unless Intel surprises us with a desktop version of "Panther Lake" or an alternative option.

Intel's ambitious plan to challenge AMD and NVIDIA in the AI accelerator market may still be a little questionable, according to recent comments from interim co-CEO Michelle Johnston Holthaus at the Barclays 22nd Annual Global Technology Conference. The company's "Falcon Shores" project, which aims to merge Gaudi AI capabilities with Intel's data center GPU technology for HPC workloads, received surprising commentary from Holthaus. "We really need to think about how we go from Gaudi to our first generation of Falcon Shores, which is a GPU," she stated, before acknowledging potential limitations. "And I'll tell you right now, is it going to be wonderful? No, but it is a good first step."

Intel's pragmatic approach to AI hardware development was further highlighted when Holthaus addressed the company's product strategy. Rather than completely overhauling their development pipeline, she emphasized the value of iterative progress: "If you just stop everything and you go back to doing like all new product, products take a really long time to come to market. And so, you know, you're two years to three years out from having something." The co-CEO advocated for a more agile approach, stating, "I'd rather have something that I can do in smaller volume, learn, iterate, and get better so that we can get there." She acknowledged the enduring nature of AI market opportunities, particularly noting the current focus on training while highlighting the potential in other areas: "Obviously, AI is not going away. Obviously training is, you know, the focus today, but there's inference opportunities in other places where there will be different needs from a hardware perspective."

Intel has prepared "Jaguar Shores," its "next-next" generation AI and HPC accelerator, successor to its upcoming "Falcon Shores" GPU. Revealed during a technical workshop at the SC2024 conference, the chip was unveiled by Intel's Habana Labs division, albeit unintentionally. This announcement positions Jaguar Shores as the successor to Falcon Shores, which is scheduled to launch next year. While details about Jaguar Shores remain sparse, its designation suggests it could be a general-purpose GPU (GPGPU) aimed at both AI training, inferencing, and HPC tasks. Intel's strategy aligns with its push to incorporate advanced manufacturing nodes, such as the 18A process featuring RibbonFET and backside power delivery, which promise significant efficiency gains, so we can expect to see upcoming AI accelerators incorporating these technologies.

Intel's AI chip lineup has faced numerous challenges, including shifting plans for Falcon Shores, which has transitioned from a CPU-GPU hybrid to a standalone GPU, and cancellation of Ponte Vecchio. Despite financial constraints and job cuts, Intel has maintained its focus on developing cutting-edge AI solutions. "We continuously evaluate our roadmap to ensure it aligns with the evolving needs of our customers. While we don't have any new updates to share, we are committed to providing superior enterprise AI solutions across our CPU and accelerator/GPU portfolio." an Intel spokesperson stated. The announcement of Jaguar Shores shows Intel's determination to remain competitive. However, the company faces steep competition. NVIDIA and AMD continue to set benchmarks with performant designs, while Intel has struggled to capture a significant share of the AI training market. The company's Gaudi lineup ends with third generation, and Gaudi IP will get integrated into Falcon Shores.