RiVAI Technologies, a Shenzhen-based semiconductor firm founded in 2018, unveiled this first fully domestic high-performance RISC-V server processor designed for compute-intensive applications. The Lingyu CPU features 32 general-purpose computing cores working alongside eight specialized intelligent computing cores (LPUs) in a heterogeneous "one-core, dual architecture" design. It aims for performance comparable to current x86 server processors, with the chip implementing optimized data pathways and enhanced pipelining mechanisms to maintain high clock frequencies under computational load. The architecture specifically targets maximum throughput for parallel processing workloads typical in data center environments. The chip aims to serve HPC clusters, all-flash storage arrays, and AI large language model inference operations.

Since its inception, RiVAI has accumulated 37 RISC-V-related patents and established partnerships with over 50 industry collaborators, including academic research relationships. Professor David Patterson, a RISC-V architecture pioneer, provides technical guidance to the company's development efforts. The processor's dual-architecture approach enables dynamic workload distribution between conventional processing tasks and specialized computational operations, potentially improving performance-per-watt metrics compared to traditional single-architecture designs. The Lingyu launch significantly advances China's semiconductor self-sufficiency strategy, potentially accelerating RISC-V ecosystem development while providing Chinese data centers with domestically engineered high-performance computing solutions, ultimately bypassing x86 and Arm solutions.

When Microsoft first introduced the Copilot+ program alongside its renewed push for Windows-on-Arm laptops, the AI-powered assistant features were mostly limited to Snapdragon X-powered devices. In addition to the inclusion of these features on Intel and AMD systems, Microsoft is also announcing Voice Access, a new accessibility feature that will first launch on Qualcomm Snapdragon systems and make their way to Intel- and AMD-powered systems. These new updates come by way of the March 27 Preview update titled KB505365. However, there is still no mention of an AMD and Intel launch for the much maligned Recall feature that Microsoft was testing late last year and recalled due to privacy concerns.

According to the latest Windows Experience Blog post, users of AMD- and Intel-powered PCs will now be able to access features, like Live Captions, Cocreator, Restyle Image, and Image Creator more broadly across the line-up of Copilot+ PCs with Intel Core Ultra 200V and AMD Ryzen AI 300 CPUs. Live Captions is officially pitched as an accessibility feature, meanwhile Restyle Image and Image Creator are AI-powered image editing and generation features, and Cocreator lies somewhere in between as a text-to-image tool that is meant to augment drawing in Paint. Cocreator will be rolling out as of the announcement, and Restyle Image and Image Creator will be available in the Photos app on Intel and AMD systems. As for Voice Access, Microsoft claims that it will allow users to be more flexible with their language when using speech to navigate their PCs, as opposed to "learning complex steps, commands and syntax that voice access previously required" for voice navigation on PC. Voice Access will initially be limited to Snapdragon X PCs, but it will roll out to AMD and Intel Copilot+ PCs later this year.

Qualcomm's Snapdragon X platform is hitting more road obstacles as the platform matures. First, it was low sales in the third quarter of 2024, and now it is the latest flag from the world's largest online retailer—Amazon. According to Windows Central, Amazon has flagged Microsoft's Surface Laptop 7 AI PC with the "Frequently Returned Item" flag. Being pretty much self-explanatory, the flag marks items "with the highest return rates for their product category." Presumably, Amazon's algorithm has weighted out return rates of AI PCs, and it turns out that Qualcomm Snapdragon X-powered Surface Laptop 7 has not stuck with consumers for long. Amazon's return policy allows product returns 30 days after receiving an item, and it seems like customers aren't pleased with it.

However, the laptop currently maintains a 4.2/5-star rating based on 360 ratings. 12% of these are one-star and 71% are five-star ratings. A sudden spike in returns may be boosted by Microsoft updating the Surface Laptop 7 with an Intel Core Ultra series of processors, so customers are returning their Arm-based laptops for x86 variants. We need more data to make further conclusions. As a reminder, despite sequential growth of 180% in Q3 2024, Snapdragon X-powered devices represent less than 1.5% of the Windows market, according to research from Canalys. Qualcomm sold around 720,000 Snapdragon X devices, accounting for only 0.8% of all PCs sold in Q3 2024. We are waiting for new data to compare to the rest of the ecosystem.

According to the International Data Corporation (IDC) Worldwide Quarterly Server Tracker, the server market reached a record $77.3 billion dollars in revenue during the last quarter of the year. This quarter showed the second highest growth rate since 2019 with a year-over-year increase of 91% in vendor revenue. Revenue generated from x86 servers increased 59.9% in 2024Q4 to $54.8 billion while Non-x86 servers increased 262.1% year over year to $22.5 billion.

Revenue for servers with an embedded GPU in the fourth quarter of 2024 grew 192.6% year-over-year and for the full year 2024, more than half of the server market revenue came from servers with an embedded GPU. NVIDIA continues dominating the server GPU space with over 90% of the total shipments with and embedded GPU in 2024Q4. The fast pace at which hyperscalers and cloud service providers have been adopting servers with embedded GPUs has fueled the server market growth which has more than doubled in size since 2020 with revenue of $235.7 billion dollars for the full year 2024.

In something of a surprise, Epic Games today announced that it is working with Qualcomm to integrate support for the Qualcomm Snapdragon X CPUs into Easy Anti-Cheat, officially adding Fortnite to the list of games that are available for Windows on Arm. According to the post announcing the upcoming change to EAC, support for Windows on Arm in Fortnite will arrive before the end of 2025. Until the EAC update arrives, EAC will block Windows on Arm players from playing games like Fortnite because Windows on Arm devices use Prism emulation and translation to run x86 apps on Arm hardware. At the time of writing, the unofficial Windows on Arm app compatibility tracker lists a total of 675 apps as compatible with the Arm SoCs, 121 of which are games. This is compared to 17,955 games that are verified or playable on the Steam Deck via Valve's Proton translation layer, according to ProtonDB.

Expanding support for EAC to Windows on Arm could also allow games like Apex Legends and Fall Guys to run on Arm devices. This news comes in spite of the slow adoption of Windows on Arm devices, which Epic Games CEO, Tim Sweeney infamously quoted as the reason for not supporting the Steam Deck or Linux as a platform. "If we only had a few more programmers. It's the Linux problem. I love the Steam Deck hardware. Valve has done an amazing job there; I wish they would get to tens of millions of users, at which point it would actually make sense to support it." However, market share for Windows on Arm still appears to fall short of the market share Linux commands in the desktop OS space.

Google security researchers have published comprehensive details on "EntrySign," a significant vulnerability affecting all AMD Zen processors through Zen 4. The flaw allows attackers with local administrator privileges to install custom microcode updates on affected CPUs, bypassing AMD's cryptographic verification system. The vulnerability stems from AMD's use of AES-CMAC as a hash function in its signature verification process—a critical cryptographic error. CMAC is designed as a message authentication code, not a secure hash function. The researchers discovered that AMD had been using a published example key from NIST documentation since Zen 1, allowing them to forge signatures and deploy arbitrary microcode modifications. These modifications can alter CPU behavior at the most fundamental level, enabling sophisticated attacks that persist until the next system reboot.

Google's security team has released "zentool," an open-source jailbreak toolkit allowing researchers to create, sign, and deploy custom microcode patches on vulnerable processors. The toolkit includes capabilities for microcode disassembly, patch authoring with limited assembly support, and cryptographic signing functions. As a proof-of-concept, the researchers demonstrated modifying the RDRAND instruction to consistently return predetermined values, effectively compromising the CPU's random number generation. AMD has issued microcode updates that replace the compromised validation routine with a custom secure hash function. The company's patches also leverage the AMD Secure Processor to update the validation routine before x86 cores can process potentially tampered microcode. While the attack requires local administrator access and doesn't persist through power cycles, it poses significant risks to confidential computing environments using technologies like SEV-SNP and DRTM. The researchers noted their findings could enable further CPU security research beyond exploit development, potentially allowing the implementation of new security features similar to those developed for Intel processors through similar techniques.

The European Commission has paid Intel €515.55 million ($536 million) in interest following the partial annulment of a 2009 antitrust fine. The payment comes after the General Court of the European Union overturned most of the original €1.06 billion penalty in 2022, leaving only €376 million of the fine intact. The court's ruling found significant flaws in the Commission's economic analysis of Intel's market practices between 2002 and 2007. At issue were Intel's volume-based rebates to computer manufacturers, which the Commission had claimed prevented fair competition with AMD in the x86 processor market. The General Court determined that regulators failed to adequately demonstrate the anti-competitive effects of these pricing strategies. EU antitrust commissioner Teresa Ribera confirmed the interest payment, which reimburses Intel for capital held by regulators during the 13-year legal proceedings.

The case began in 2009, with the Commission ruling that Intel had used its market position to restrict competitor access through targeted rebate programs in years prior. Intel challenged this decision in 2014, leading to multiple appeals before the 2022 judgment. The resolution establishes new parameters for proving anti-competitive behavior in the EU's tech sector oversight. The court's emphasis on rigorous economic analysis impacts ongoing and future competition cases, particularly regarding evaluating complex pricing mechanisms in the technology sector. The payment concludes one of the EU's longest-running competition law cases, though Intel continues to face regulatory scrutiny in multiple jurisdictions. The case's outcome has prompted discussion about the Commission's approach to economic evidence in competition proceedings and the duration of EU antitrust investigations. At the time of financial issues, more than half a billion US Dollars will help Intel resolve internal crises significantly.

Parallels has announced the introduction of x86 emulation support in Parallels Desktop 20.2.0 for Apple Silicon Macs. This new feature enables users to run x86-based virtual machines on their M-series Mac computers, addressing a longstanding limitation since Apple's transition to its custom Arm-based processors. The early technology preview allows users to run Windows 10, Windows 11 (with some restrictions), Windows Server 2019/2022, and various Linux distributions through a proprietary emulation engine. This development particularly benefits developers and users who need to run 32-bit Windows applications or prefer x86-64 Linux virtual machines as an alternative to Apple Rosetta-based solutions.

However, Parallels is transparent about the current limitations of this preview release. Performance is notably slow, with Windows boot times ranging from 2 to 7 minutes, and overall system responsiveness remains low. The emulation only supports 64-bit operating systems, though it can run 32-bit applications. Additionally, USB device support is not available, and users must rely on Apple's hypervisor as the Parallels hypervisor isn't compatible. Despite these constraints, the release is a crucial step forward in bridging the compatibility gap for Apple Silicon Mac users so legacy software can still be used. The feature has been implemented with the option to start virtual machines hidden in the user interface to manage expectations, as it is still imperfect.

We first announced Raspberry Pi 5 back in the autumn of 2023, with just two choices of memory density: 4 GB and 8 GB. Last summer, we released the 2 GB variant, aimed at cost-sensitive applications. And today we're launching its bigger sibling, the 16 GB variant, priced at $120.

Why 16 GB, and why now?
We're continually surprised by the uses that people find for our hardware. Many of these fit into 8 GB (or even 2 GB) of SDRAM, but the threefold step up in performance between Raspberry Pi 4 and Raspberry Pi 5 opens up use cases like large language models and computational fluid dynamics, which benefit from having more storage per core. And while Raspberry Pi OS has been tuned to have low base memory requirements, heavyweight distributions like Ubuntu benefit from additional memory capacity for desktop use cases. The optimized D0 stepping of the Broadcom BCM2712 application processor includes support for memories larger than 8 GB. And our friends at Micron were able to offer us a single package containing eight of their 16Gbit LPDDR4X die, making a 16 GB product feasible for the first time.

According to recently discovered shipping manifests, Intel is developing a new processor series codenamed "Wildcat Lake," potentially succeeding their entry-level "Intel Processor" lineup based on Alder Lake-N. The documents, revealed by x86deadandback, suggest a 2025 launch timeline for these chips targeting lightweight laptops and mini-PCs. The shipping records from October 30 mention CPU reball equipment compatible with BGA 1516 sockets, measuring 35 x 25 mm, indicating early validation testing is underway. These processors are expected to be manufactured using Intel's advanced 18A process technology, sharing the same manufacturing node as the upcoming Panther Lake series. Early technical specifications of Wildcat Lake point to a hybrid architecture combining next-generation "Cougar Cove" performance cores with "Darkmont" low-power efficiency (LPE) cores in a 2P+4LPE configuration.

This design appears to separate the core clusters, departing from traditional shared ring bus arrangements, similar to the approach taken in Intel's Lunar Lake and Arrow Lake processors. While Wildcat Lake's exact position in Intel's product stack remains unclear, it could serve as a modernized replacement for the what were Pentium and Celeron processor families. These chips traditionally power devices like Chromebooks, embedded systems, and home servers, with the new series potentially offering significant performance improvements for these market segments. The processor is expected to operate in the sub-double-digit TDP power envelope, positioning it below the more powerful Lunar Lake series. Graphics capabilities will likely be more modest than Lunar Lake's Xe2 architecture, aligning with its entry-level market positioning.

Intel has announced it will not proceed with X86S, an experimental instruction set architecture that aims to simplify its processor design by removing legacy support for older 32-bit and 16-bit operating modes. The decision comes after gathering feedback from the technology ecosystem on a draft specification that was released for evaluation. The x86, and its 64-bit x86-64 we use today, is a giant cluster of specifications that contains so many instructions rarely anyone can say with precision how many are there. All of this stems from the era of original 8086 processor, which has its own 16-bit instructions. Later on we transitioned to 32, then 64-bit systems with all have brought their own specific instructions. Adding support for processing of vector, matrix, and other data types has increased the ISA specification so much that no one outside a few select engineers at Intel (and AMD) understands in full. From that x86S idea was born to solve the issue of supporting legacy systems and legacy code, and moving on to the x86S ISA, where "S" stands for simplified.

The X86S proposal included several notable modifications, such as eliminating support for rings 1 and 2 in the processor's protection model, removing 16-bit addressing capabilities, and discontinuing legacy interrupt controller support. These changes would have potentially reduced hardware complexity and modernized the platform's architecture. A key feature of the proposed design was a simplified boot process that would have allowed processors to start directly in 64-bit mode, eliminating the current requirement for systems to boot through various legacy modes before reaching 64-bit operation. The architecture also promised improvements in handling modern features like 5-level paging. "Intel will continue to maintain its longstanding commitment to software compatibility," the company stated in the official document on its website, acknowledging that the x86S dream is over.

TechPowerUp today released the latest update to TechPowerUp GPU-Z, the graphics sub-system information and monitoring utility for PC gamers and enthusiasts. Version 2.61.0 adds support for the new Intel Arc B580 and B570 "Battlemage" graphics cards. Preliminary support is also added for AMD "Navi 48" RDNA 4. This is also the first version of GPU-Z to support detection of Qualcomm Adreno 540, 630, 640, and 642L. GPU-Z is an x86 application, although you can run it on Windows on Arm platforms, where the operating system's emulation allows GPU-Z to detect the underlying hardware.

Among the other GPUs we've added support for, include the iGPU of the AMD Ryzen 7 9800X3D, NVIDIA H100 80 GB HBM3, A4000H, A800 40 GB Active, RTX 5880 Ada, and Tesla K40st. We've also added PCI vendor detection for ONIX, the new Intel Arc board partner, and Shangke. A crash on some AMD Ryzen systems with older drivers, an installed discrete GPU, and disabled iGPU, has been fixed. Grab GPU-Z from the link below.

DOWNLOAD: TechPowerUp GPU-Z 2.61.0

In an interesting exchange about product stance between Intel's interim co-CEO Michelle Johnston Holthaus and Qualcomm, both have offered conflicting statements about the market performance of Arm-based PCs. The dispute centers on customer satisfaction and return rates for PCs powered by Qualcomm's Snapdragon X processors. During the Barclays 22nd Annual Global Technology Conference, Holthaus claimed that retailers are experiencing high return rates for Arm PCs, mainly citing software compatibility issues. According to her, customers are finding that typical applications don't work as expected on these devices. "I mean, if you look at the return rate for Arm PCs, you go talk to any retailer, their number one concern is, wow, I get a large percentage of these back. Because you go to set them up, and the things that we just expect don't work," said Holthaus.

"Our devices continue to have greater than 4+ stars across consumer reviews and our products have received numerous accolades across the industry including awards from Fast Company, TechRadar, and many consumer publications. Our device return rates are within industry norm," said Qualcomm representative for CRN. Qualcomm projects that up to 50% of laptops will transition to non-x86 platforms within five years, signaling their confidence in Arm-based solutions. While software compatibility remains a challenge for Arm PCs, with not all Windows applications fully supported, Qualcomm and Microsoft have implemented an emulation layer to address these limitations. Holthaus acknowledged that Apple's successful transition to Arm-based processors has helped pave the way for broader Arm adoption in the PC market. "Apple did a lot of that heavy lift for Arm to make that ubiquitous with their iOS and their whole walled garden stack. So I'm not going to say Arm will get more, I'm sure, than it gets today. But there are certainly, I think, some real barriers to getting there," noted Holthaus.

Advantech, a leading provider of AIoT platforms and services, proudly unveils its latest AI acceleration modules: the EAI-1200 and EAI-3300, powered by Hailo-8 AI processors. These modules deliver AI performance of up to 52 TOPS while achieving more than 12 times the power efficiency of comparable AI modules and GPU cards. Designed in standard M.2 and PCIe form factors, the EAI-1200 and EAI-3300 can be seamlessly integrated with diverse x86 and Arm-based platforms, enabling quick upgrades of existing systems and boards to incorporate AI capabilities. With these AI acceleration modules, developers can run inference efficiently on the Hailo-8 NPU while handling application processing primarily on the CPU, optimizing resource allocation. The modules are paired with user-friendly software toolkits, including the Edge AI SDK for seamless integration with HailoRT, the Dataflow Compiler for converting existing models, and TAPPAS, which offers pre-trained application examples. These features accelerate the development of edge-based vision AI applications.

EAI-1200 M.2 AI Module: Accelerating Development for Vision AI Security
The EAI-1200 is an M.2 AI module powered by a single Hailo-8 VPU, delivering up to 26 TOPS of computing performance while consuming approximately 5 watts of power. An optional heatsink supports operation in temperatures ranging from -40 to 65°C, ensuring easy integration. This cost-effective module is especially designed to bundle with Advantech's systems and boards, such as the ARK-1221L, AIR-150, and AFE-R770, enhancing AI applications including baggage screening, workforce safety, and autonomous mobile robots (AMR).

HighPoint Technologies, a leader in advanced PCIe Switch and RAID AIC, Adapter and Storage Enclosure solutions, has announced an extensive line of M.2 and E1.S RAID AICs engineered to accommodate high-performance GPU-centric workloads. Designed for enterprise and datacenter class computing environments, HighPoint NVMe RAID AICs deliver class-leading performance and unmatched scalability, enabling modern x86/AMD and Arm platforms to support 4 to 16 NVMe SSDs via a single PCIe Gen 4 or Gen 5 x16 slot. State-of-the-art PCIe Switching Architecture and flexible RAID technology enable administrators to custom tailor M.2 and E1.S storage configurations for a broad range of data-intensive applications, and seamlessly scale or expand existing storage configurations to meet the needs of evolving workflows.

Unprecedented Storage Density
HighPoint NVMe AICs have established a new milestone for M.2 NVMe storage. HighPoint's revolutionary Dual-Width AIC architecture enables a single PCIe Gen 4 or Gen 5 x16 slot to directly host up to 16 M.2 NVMe SSDs, and 128 TB of storage capacity, at speeds up to 28 GB/s; a truly unprecedented advancement in compact, single-device storage expansion solutions. State-of-the art PCIe switching technology and advanced cooling systems maximize transfer throughput and ensure M.2 configurations operate at peak efficiency by halting the performance sapping threat of thermal throttling in its tracks.

The RPCS3 team has announced the successful implementation of arm64 architecture support for their PlayStation 3 emulator. This development enables the popular emulator to run on a broader range of devices, including Apple Silicon machines, Windows-on-Arm, and even some smaller Arm-based SBC systems like the Raspberry Pi 5. The journey to arm64 support began in late 2021, following the release of Apple's M1 processors, with initial efforts focused on Linux platforms. After overcoming numerous technical hurdles, the development team, led by core developer Nekotekina and graphics specialist kd-11, achieved a working implementation by mid-2024. One of the primary challenges involved adapting the emulator's just-in-time (JIT) compiler for arm64 systems.

The team developed a solution using LLVM's intermediate representation (IR) transformer, which allows the emulator to generate code once for x86-64 and then transform it for arm64 platforms. This approach eliminated the need to maintain separate codebases for different architectures. A particular technical challenge emerged from the difference in memory management between x86 and arm64 systems. While the PlayStation 3 and traditional x86 systems use 4 KB memory pages, modern arm64 platforms typically operate with 16 KB pages. Though this larger page size can improve memory performance in native applications, it presented unique challenges for emulating the PS3's graphics systems, particularly when handling smaller textures and buffers. While the emulator now runs on arm64 devices, performance varies significantly depending on the hardware. Simple applications and homebrew software show promising results, but more demanding commercial games may require substantial computational power beyond what current affordable Arm devices can provide.

A significant fix has been submitted to the Linux kernel 6.13-rc1 that addresses prolonged boot times affecting older AMD processors, specifically targeting "Zen 1" and "Zen 2" architectures. The issue, which has been present for approximately 18 months, could cause boot delays ranging from several seconds to multiple minutes in extreme cases. The problem was discovered by a Nokia engineer who reported inconsistent boot delays across multiple AMD EPYC servers. The most severe instances showed the initial unpacking process taking several minutes longer than expected, though not all boots were affected. Investigation revealed that the root cause stemmed from a kernel modification implemented in June 2023, specifically related to CPU microcode update handling.

The technical issue was identified as a missing step in the boot process: Zen 1 and Zen 2 processors require the patch buffer mapping to be flushed from the Translation Lookaside Buffer (TLB) after applying CPU microcode updates during startup. The fix, submitted as part of the "x86/urgent" material ahead of the Linux 6.13-rc1 release, implements the necessary TLB flush for affected AMD Ryzen and EPYC systems. This addition eliminates what developers described as "unnecessary and unnatural delays" in the boot process. While the solution will be included in the upcoming Linux 6.13 kernel release, plans are in place to back-port the fix to stable kernel versions to help cover most Linux users on older Zen architectures.

Intel has prepared "Jaguar Shores," its "next-next" generation AI and HPC accelerator, successor to its upcoming "Falcon Shores" GPU. Revealed during a technical workshop at the SC2024 conference, the chip was unveiled by Intel's Habana Labs division, albeit unintentionally. This announcement positions Jaguar Shores as the successor to Falcon Shores, which is scheduled to launch next year. While details about Jaguar Shores remain sparse, its designation suggests it could be a general-purpose GPU (GPGPU) aimed at both AI training, inferencing, and HPC tasks. Intel's strategy aligns with its push to incorporate advanced manufacturing nodes, such as the 18A process featuring RibbonFET and backside power delivery, which promise significant efficiency gains, so we can expect to see upcoming AI accelerators incorporating these technologies.

Intel's AI chip lineup has faced numerous challenges, including shifting plans for Falcon Shores, which has transitioned from a CPU-GPU hybrid to a standalone GPU, and cancellation of Ponte Vecchio. Despite financial constraints and job cuts, Intel has maintained its focus on developing cutting-edge AI solutions. "We continuously evaluate our roadmap to ensure it aligns with the evolving needs of our customers. While we don't have any new updates to share, we are committed to providing superior enterprise AI solutions across our CPU and accelerator/GPU portfolio." an Intel spokesperson stated. The announcement of Jaguar Shores shows Intel's determination to remain competitive. However, the company faces steep competition. NVIDIA and AMD continue to set benchmarks with performant designs, while Intel has struggled to capture a significant share of the AI training market. The company's Gaudi lineup ends with third generation, and Gaudi IP will get integrated into Falcon Shores.

RISC-V is an industry standard instruction set architecture (ISA) born in UC Berkeley. RISC-V is the fifth iteration in the lineage of historic RISC processors. The core value of the RISC-V ISA is the freedom of usage it offers. Any organization can leverage the ISA to design the best possible core for their specific needs, with no regional restrictions or licensing costs. It attracts a massive ecosystem of developers and companies building systems using the RISC-V ISA. To support these efforts and grow the ecosystem, the brains behind RISC decided to form RISC-V International—a non-profit foundation that governs the ISA and guides the ecosystem.

We had the privilege of talking with Andrea Gallo, Vice President of Technology at RISC-V International. Andrea oversees the technological advancement of RISC-V, collaborating with vendors and institutions to overcome challenges and expand its global presence. Andrea's career in technology spans several influential roles at major companies. Before joining RISC-V International, he worked at Linaro, where he pioneered Arm data center engineering initiatives, later overseeing diverse technological sectors as Vice President of Segment Groups, and ultimately managing crucial business development activities as executive Vice President. During his earlier tenure as a Fellow at ST-Ericsson, he focused on smartphone and application processor technology, and at STMicroelectronics he optimized hardware-software architectures and established international development teams.

AVX-512 was proposed by Intel more than a decade ago—in 2013 to be precise. A decade later, the implementation of this instruction set on CPU cores remains wildly spotty—Intel implemented it first on an HPC accelerator, then its Xeon server processors, then its client processors, before realizing that hardware hasn't caught up with the technology to execute AVX-512 instructions in an energy-efficient manner, before deprecating it on the client. AMD implemented it just a couple of years ago with Zen 4 with a dual-pumped 256-bit FPU on 5 nm, before finally implementing a true 512-bit FPU on 4 nm. AVX-512 is a microcosm of what's wrong with the x86 ecosystem.

There are only two x86 CPU core vendors, the IP owner Intel, and its only surviving licensee capable of contemporary CPU cores, AMD. Any new additions to the ISA introduced by either of the two have to go through the grind of their duopolistic competition before software vendors could assume that there's a uniform install base to implement something new. x86 is a net-loser of this, and Arm is a net-winner. Arm Holdings makes no hardware of its own, except continuously developing the Arm machine architecture, and a first-party set of reference-design CPU cores that any licensee can implement. Arm's great march began with tiny embedded devices, before its explosion into client computing with smartphone SoCs. There are now Arm-based server processors, and the architecture is making inroads to the last market that x86 holds sway over—the PC. Apple's M-series processors compete with all segments of PC processors—right from the 7 W class, to the HEDT/workstation class. Qualcomm entered this space with its Snapdragon Elite family, and now Dell believes NVIDIA will take a swing at client processors in 2025. Then there's RISC-V. Intel finally did something it should have done two decades ago—set up a multi-brand Ecosystem Advisory Group. Here's what it is, and more importantly, what it's not.

While Apple laptops have never really been the first stop for PC gaming, Linux is slowly shaping up to be an excellent gaming platform, largely thanks to open-source development efforts as well as work from the likes of AMD and NVIDIA, who have both put significant work into their respective Linux drivers in recent years. This makes efforts like the Asahi Linux Project all the more intriguing. Asahi Linux is a project that aims to bring Linux to Apple Silicon Macs—a task that has proven rather difficult, thanks to the intricacies of developing a bespoke GPU driver for Apple's custom ARM GPUs. In a recent blog post, the graphics developer behind the Asahi Linux Project showed off a number of AAA games, albeit older titles, running on an Apple M1 processor on the latest Asahi Linux build.

To run the games on Apple Silicon, Asahi Linux uses a "game playing toolkit," which relies on a number of custom graphics drivers and emulators, including tools from Valve's Proton translation layer, which ironically was also the foundation for Apple's Game Porting Toolkit. Asahi uses FEX to emulate x86 on ARM, Wine as a translation layer for Windows apps, and DXVK and vkd3d-proton for DirectX-Vulkan translation. In the blog post, the Asahi developer claims that the alpha is capable of running games like Control, The Witcher 3, and Cyberpunk 2077 at playable frame rates. Unfortunately, 60 FPS is not yet attainable in the majority of new high-fidelity games, there are a number of indie titles that run quite well on Asahi Linux, including Hollow Knight, Ghostrunner, and Portal 2.

Intel has released version 1.2 of its X86S architecture specification. The X86S project, first announced last year, aims to modernize the x86 architecture that has been the heart of PCs since the late 1970s. Over the decades, Intel and AMD have continually expanded x86's capabilities, resulting in a complex instruction set that Intel now sees as partially outdated. The latest specification primarily focuses on removing legacy features, particularly 16-bit and 32-bit support. This radical departure from x86's long-standing commitment to backward compatibility aligns with the simplification of x86. While the specification does mention a "32-bit compatibility mode," we are yet to how would 32-bit apps run. This ambiguity raises questions about how X86S might handle existing 32-bit applications, which, despite declining relevance, still play a role in many computing environments.

The potential transition to X86S comes at a time when the industry is already moving away from 32-bit support. However, the proposed changes are subject to controversy. The x86 architecture's strength has long been its extensive legacy support, allowing older software to run on modern hardware. A move to X86S could disrupt this ecosystem, particularly for users relying on older applications. Furthermore, introducing X86S raises questions about the future relationship between Intel and AMD, the two primary x86 CPU designers. While Intel leads the initiative, AMD's role in the potential transition remains uncertain, given its significant contributions to the current x86-64 standard.

As AI continues to revolutionize industries, enterprises are increasingly in need of infrastructure that is both cost-effective and available for rapid development and deployment. To meet this demand head-on, Intel today launched Xeon 6 with Performance-cores (P-cores) and Gaudi 3 AI accelerators, bolstering the company's commitment to deliver powerful AI systems with optimal performance per watt and lower total cost of ownership (TCO).

"Demand for AI is leading to a massive transformation in the data center, and the industry is asking for choice in hardware, software and developer tools," said Justin Hotard, Intel executive vice president and general manager of the Data Center and Artificial Intelligence Group. "With our launch of Xeon 6 with P-cores and Gaudi 3 AI accelerators, Intel is enabling an open ecosystem that allows our customers to implement all of their workloads with greater performance, efficiency and security."

This is not an April fool, as Qualcomm has apparently approached Intel with a takeover bid, according to the Wall Street Journal. The news follows earlier rumours about Qualcomm having eyed the opportunity to buy parts of Intel's client PC business, especially the parts related to chip design. Now it looks like Qualcomm has decided it might as well give it a go and take over Intel entirely, if the WSJ's sources can be trusted. It's still early days though and no official offers appear to have been proposed by Qualcomm so far and it doesn't appear to be a hostile takeover offer at this point in time. As such, this could turn out to be nothing, or we could see a huge change in the chip market if something comes of it.

It's worth keeping in mind that Intel's share price has dropped by around 57 percent so far this year—not taking into account today's small jump for Intel—and Qualcomm's market cap stands at over twice that of Intel's at 188 vs 93 billion US dollars. Even if Intel was to agree to a takeover offer from Qualcomm, there are several antitrust hurdles in multiple countries to get around for the two giants as well. This is despite the two not being direct competitors, but with Qualcomm recently having entered the Windows laptop market, the two are at least competing for some market share there. It's also unclear what Qualcomm would do with Intel's x86 legacy if it acquired Intel, as Qualcomm might not be interested in keeping it, at least not on the consumer side of its business. Time will tell if this is just some advanced speculation or a serious consideration by Qualcomm.

Microsoft's Direct3D and HLSL teams have unveiled plans to integrate SPIR-V support into DirectX 12 with the upcoming release of Shader Model 7. This significant transition marks a new era in GPU programmability, as it aims to unify the intermediate representation for graphical-shader stages and compute kernels. SPIR-V, an open standard intermediate representation for graphics and compute shaders, will replace the proprietary DirectX Intermediate Language (DXIL) as the shader interchange format for DirectX 12. The adoption of SPIR-V is expected to ease development processes across multiple GPU runtime environments. By embracing this open standard, Microsoft aims to enhance HLSL's position as the premier language for compiling graphics and compute shaders across various devices and APIs. This transition is part of a multi-year development process, during which Microsoft will work closely with The Khronos Group and the LLVM Project. The company has joined Khronos' SPIR and Vulkan working groups to ensure smooth collaboration and rapid feature adoption.

While the transition will take several years, Microsoft is providing early notice to allow developers and partners to plan accordingly. The company will offer translation tools between SPIR-V and DXIL to facilitate a gradual transition for both application and driver developers. For those not familiar with graphics development, graphics APIs ship with virtual instruction set architectures (ISA) that abstracts standard hardware features at a higher level. As GPUs don't follow the same ISA as CPUs (x86, Arm, RISC-V), this virtual ISA is needed to define some generics in the GPU architecture and allow various APIs like DirectX and Vulkan to run. Instead of focusing support on several formats like DXIL, Microsoft is embracing the open SPIR-V standard, which will become de facto for API developers in the future, allowing focus on more features instead of constantly replicating each other's functions. While DXIL is used mainly for gaming environments, SPIR-V has adoption in high-performance computing as well, with OpenCL and SYCL. Gaming presence is also there with Vulkan API, and we expect to see SPIR-V join DirectX 12 games.