Unlike Intel, which has implemented hybrid CPU cores across its product stack, AMD continues to make traditional multicore processors, and refuses to level even the chips that contain regular and high-density versions of its "Zen 4" cores as "hybrid."

AMD does sell chips with mix of full fat and efficiency oriented C chips.

Maybe it's just me but I think naming this conference "Hot Chips" is a bit unfortunate. And yes, I know it's been around for years. I also cannot come up with a better name right now, not that it matters.

ChaitanyaAMD does sell chips with mix of full fat and efficiency oriented C chips.

As far as I can tell the 4C cores just have SMT and some cache removed, they're still very much Zen 4 cores with nearly identical IPC.

ChaitanyaAMD does sell chips with mix of full fat and efficiency oriented C chips.

Not in the same way as Intel does.

AMD chips are the same microarchitecture with just a physical space optimisation and reduction of cache.
Intel is a different archtetcure between E core and P Core which did and can lead to weird interactions with certain software.

“…AMD continues to make traditional multicore processors, and refuses to level even the chips…”

I think you meant ‘label’ not ‘level’.

azraelMaybe it's just me but I think naming this conference "Hot Chips" is a bit unfortunate. And yes, I know it's been around for years. I also cannot come up with a better name right now, not that it matters.

How about ‘Chips that Matter’?

Panther_SeraphinNot in the same way as Intel does.

AMD chips are the same microarchitecture with just a physical space optimisation and reduction of cache.
Intel is a different archtetcure between E core and P Core which did and can lead to weird interactions with certain software.

Wasn't one of the reasons for Windows 11 that a new scheduler was needed that could handle Intel's new heterogeneous architecture?

DavenHow about ‘Chips that Matter’?

I see what you did there... :p

azraelWasn't one of the reasons for Windows 11 that a new scheduler was needed that could handle Intel's new heterogeneous architecture?

Not directly but things like VMware Workstation has a real tendancy to crash out VMs due to the way it tries to shift vms running from P to E Cores and vice versa.

the Scheduler was there so that things that needed performance (games, video encoding etc) were pushed onto the P cores but if you didnt need that performance/were only running background tasks it would push things to E cores and power down the P cores aggressively to save power etc. Most of this was meant to be done in the hardware scheduler built into the CPU directly and all windows was doing was supplying info regarding the app and if it was a background task etc.

AMD is hoping consumers will be like Seagulls all over these Hot Chips.

As long as Zen 5 steps up on the IO die especially the memory controller aspect itll be a hell of a step up.

Panther_SeraphinAs long as Zen 5 steps up on the IO die especially the memory controller aspect itll be a hell of a step up.

IO die is basically same as for Zen 4, just supports faster memory out of the box. You'll have to wait for Zen 6 apparently.

Minus InfinityIO die is basically same as for Zen 4, just supports faster memory out of the box. You'll have to wait for Zen 6 apparently.

Not good if confirmed, when the IO die - or more specifically the IF infrastructure of the IOD and the CCD, as well as the internal data path of the IOD, caps maximum memory bandwidth. I think the maximum theoretical number is 64GB/s at 2000MHz FCLK, proportional, no matter how fast the memory is running on memory controller side.

This - sequential RAM read bandwidth - mattered for AI workloads, which is apparently the newest thing everyone is capitalizing on. Lunar Lake is apparently going after that with its LPDDR5X-on-package design.

EDIT: To illustrate the problem, my current system does LLM inference on CPU at an indicated 60GB/s, while the system I upgraded from, an AMD Cezanne-based setup with DDR4-3200, did it at around 43GB/s. The performance improvement is noticeable, but at first less than expected. If I set my RAM to JEDEC speed with default FCLK(DDR5-4800, 1600MHz FCLK, same as the Cezanne), then there's ~zero improvement.

For every token generated, an LLM would need to iterate through the entire active model weight once, and those are several GB minimum for models of useful performance. It's going to be a problem, if powerful client-side AI ever works out for the general consumer.

Not all AI workloads are LLM, but LLM and Transformer-based models in other modalities are the stars of the current AI boom.

azraelMaybe it's just me but I think naming this conference "Hot Chips" is a bit unfortunate. And yes, I know it's been around for years. I also cannot come up with a better name right now, not that it matters.

Unfortunate is not the right word. This is a natural consequence of natural processes - Moore's law is dead, processes optimisation stagnation, and corresponding exponential manufacturing costs increases, which means in the future there won't be new chips, at all. The question is when.

A better name would be "Innovation & Chips", "New Chips", "Modern Chips", "Fast Chips", or whatever else, but not literally "hot".

Can't wait to see benchmarks of this new range of chips, they look attractive on paper, but reality is another kettle of fish as usual.

ARFUnfortunate is not the right word. This is a natural consequence of natural processes - Moore's law is dead, processes optimisation stagnation, and corresponding exponential manufacturing costs increases, which means in the future there won't be new chips, at all. The question is when.

A better name would be "Innovation & Chips", "New Chips", "Modern Chips", "Fast Chips", or whatever else, but not literally "hot".

Given it's all about AI now, I'm surprised it hasn't been renamed to Smart or Intelligent Chips.

We have a brand of beer in Australia called Minimum Chips, which I quite like.