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NVIDIA TU117S

Default
TU117S
N18S-G5
N18S-G5
SM Diagram
SM Diagram
NVIDIA's TU117S GPU uses the Turing architecture and is made using a 12 nm production process at TSMC. With a die size of 200 mm² and a transistor count of 4,700 million it is a medium-sized chip. TU117S supports DirectX 12 (Feature Level 12_1). For GPU compute applications, OpenCL version 3.0 and CUDA 7.5 can be used. It features 896 shading units, 56 texture mapping units and 32 ROPs.
Further reading: Turing Architecture Whitepaper

Graphics Processor

Released
Aug 15th, 2020
GPU Name
TU117S
Codename
NV167
Architecture
Turing
Foundry
TSMC
Process Type
12FFN FinFET
Process Size
12 nm
Transistors
4,700 million
Density
23.5M / mm²
Die Size
200 mm²

Graphics Features

DirectX
12 (12_1)
OpenGL
4.6
OpenCL
3.0
Vulkan
1.3
CUDA
7.5
Shader Model
6.7
WDDM
3.1
NVENC
No Support
NVDEC
No Support
PureVideo HD
VP10
VDPAU
Feature Set J

Render Config

Shading Units
896
TMUs
56
ROPs
32
SM Count
14
FP16 Units
2048
FP64 Units
32
TPCs
7
GPCs
2
Tex L1 Cache
32 KB per SM
L1 Cache
64 KB per SM
L2 Cache
512 KB
Max. TDP
31 W

All Turing GPUs

NVIDIA GPU Architecture History

Graphics cards using the NVIDIA TU117S GPU

Name Chip Memory Shaders TMUs ROPs Base Clock Boost Clock Memory Clock
NVIDIA GeForce MX450 30.5W 10Gbps
N18S-G5 2 GB 896 56 32 1395 MHz 1575 MHz 1250 MHz
NVIDIA GeForce MX450 12W
N18S-LP 2 GB 896 56 32 720 MHz 930 MHz 1250 MHz
NVIDIA GeForce MX450 30.5W 8Gbps
N18S-G5 2 GB 896 56 32 1035 MHz 1275 MHz 2000 MHz

TU117S GPU Notes

NVENC: No Support
NVDEC: No Support
PureVideo HD: VP10
VDPAU: Feature Set J
May 16th, 2024 16:00 EDT change timezone

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