Wednesday, August 13th 2025

TSMC Phases Out 6-Inch Wafer Production, Encourages Customers to Move to Gigafabs

TSMC will retire its smallest wafer line and reorganize several legacy fabs in Hsinchu as part of a cost and efficiency drive. TSMC plans to discontinue production on 6-inch 150 mm wafers within two years and consolidate its 8-inch 200 mm capacity, enabling machines and staff to operate more efficiently. The company has begun winding down its gallium nitride foundry services, which relied on some 200 millimeter lines, and will repurpose the affected buildings for other production or research purposes. Taiwanese media identify Fab 2 and Fab 5 among the sites expected to stop regular production by 2027. TSMC says it will work with customers to migrate production to nearby 200 millimeter facilities and to encourage longer-term moves to larger 300 millimeter processes in its gigafabs, where volume economics are stronger.

The business reasoning is very simple. Smaller wafers yield far fewer dies per cycle and cannot match the economics of modern nodes designed for AI and other high-performance markets. By consolidating older lines, the company can free capital and talent to expand advanced node capacity and increase utilization at larger fabs, including the long-operating Fab 12 and the new construction across the street. Some 200 mm factories will absorb displaced work, depending on their equipment and customers' decisions. For suppliers and product teams, the change means negotiated ramp schedules, possible redeployment of tools, and a shorter runway for products based on 150 mm platforms.
Sources: Focus Taiwan, via ComputerBase
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12 Comments on TSMC Phases Out 6-Inch Wafer Production, Encourages Customers to Move to Gigafabs

#1
Nhonho
I really don't understand why 450 mm wafer fabs don't already exist. They would significantly reduce chip manufacturing costs and time.
Posted on Reply
#2
close
NhonhoI really don't understand why 450 mm wafer fabs don't already exist. They would significantly reduce chip manufacturing costs and time.
Mostly because of those famous "guy holding silicon wafer" marketing pictures. You'd always have to wonder "is that a really large wafer or just a smaller guy?". Then you have to start putting objects for reference in the picture... It gets tricky really fast.

But really, it's probably because of the transition costs, on top of the usual technical challenges, both for the ones developing the technologies around fabrication on 450mm wafers and for the ones using them. Most fabs wouldn't see all the benefits, but they'd still have to pay for it. The limited demand makes it less economically feasible for anyone involved, even the top players.
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#4
kondamin
closeMostly because of those famous "guy holding silicon wafer" marketing pictures. You'd always have to wonder "is that a really large wafer or just a smaller guy?". Then you have to start putting objects for reference in the picture... It gets tricky really fast.

But really, it's probably because of the transition costs, on top of the usual technical challenges, both for the ones developing the technologies around fabrication on 450mm wafers and for the ones using them. Most fabs wouldn't see all the benefits, but they'd still have to pay for it. The limited demand makes it less economically feasible for anyone involved, even the top players.
In this ai economy those lines would be filled up the moment they are announced.
Intel should have forced it trough even if they were the only ones using it
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#5
truthsayer
NhonhoI really don't understand why 450 mm wafer fabs don't already exist. They would significantly reduce chip manufacturing costs and time.
I really don't understand why people still say things like "why doesn't anyone in industry X just do Y?" without realizing the answer is "you are hopelessly naive".

450mm wafers will not "significantly reduce chip manufacturing costs and time":
- TSMC's wafer costs have doubled for 7nm, and will double again for 2nm, but the increase is almost entirely lithography related. The proportion of costs that'd be reduced by 450mm wafers is tiny compared to when we moved to 300mm wafer 30 years ago.
- Also, High-NA EUV halves the reticle limit vs EUV, this means a 450mm wafer will take 4.5x longer per mask step vs a 300mm wafer on EUV. Everything just eats into the benefits of 450mm wafers.
- Beyond litho, chips now go through a lot of advanced packaging steps. Nvidia and AMD's AI accelerators are bottlenecked by TSMC's packaging capacity, not their wafer capacity, moving to 450mm wafers will not change this.

Things are simply different compared to the 300mm wafer transition in 1994, litho is way way harder, High-NA EUV also eats into the economics of 450mm wafers, advanced packaging is now the bottleneck not wafer capacity. 450mm wafers offer little benefits to everyone besides (maybe) the Chinese.
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#6
Space Lynx
Astronaut
Pets4Ever6" isn't big enough anymore

WHAT! CHAT! I CANT
Posted on Reply
#7
freeagent
I came to say the exact same thing..

Posted on Reply
#8
kondamin
truthsayerThings are simply different compared to the 300mm wafer transition in 1994, litho is way way harder, High-NA EUV also eats into the economics of 450mm wafers, advanced packaging is now the bottleneck not wafer capacity. 450mm wafers offer little benefits to everyone besides (maybe) the Chinese.
The industry took a different path and there would have been different approaches to solving things as other issues would have arisen.

It’s also a bit silly to compare the current lack of advanced packaging facilities to what is needed to build a next generation lithography plant.
Heck just imagine having a functional 450mm plant spamming out 20nm interposers
Posted on Reply
#9
Simon.J
Not expert but in the light of lithography are there any updates on Gallium nitride (GaN) wafers and the adoption by the big players?

Cause if looking alone at physical properties GaN It would make sense for the TCMS to adapt this technology, or am I wrong with assumptions?
Thanks
Posted on Reply
#10
kondamin
Simon.JNot expert but in the light of lithography are there any updates on Gallium nitride (GaN) wafers and the adoption by the big players?

Cause if looking alone at physical properties GaN It would make sense for the TCMS to adapt this technology, or am I wrong with assumptions?
Thanks
TSMC is tossing that technology out as the margins are small and the competition is fierce, an article was posted here i think last week
Posted on Reply
#11
Unregistered
NhonhoI really don't understand why 450 mm wafer fabs don't already exist. They would significantly reduce chip manufacturing costs and time.
You can't, for further purification at this width it's very hard to heat your silicon at it's core with induction coils .
So for this reason you won't see stuff like 500mm or even 650.
#12
kondamin
IntelJustDieYou can't, for further purification at this width it's very hard to heat your silicon at it's core with induction coils .
So for this reason you won't see stuff like 500mm or even 650.
THé boules weren’t the problem, they had those a long time ago. the problem is that it requires the entire industry to change to bigger machines for everything.
And the only one capable carrying that cost back then were intel and Samsung

Now tsmc is the only one that could in theory manage it
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