News Posts matching "7 nm"

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TSMC to Build World's First 3 nm Fab in Taiwan

TSMC has announced the location for their first 3 nm fab: it will be built in the Tainan Science Park, southern Taiwan. Rumors pegged the new 3 nm factory as possibly being built in the US, due to political reasons; however, TSMC opted to keep their production capabilities clustered in the Tainan Science Park, where they can better leverage their assets and supply chain for the production and support of the world's first 3 nm semiconductor factory. It certainly also helped the Taiwanese government's decision to pledge land, water, electricity and environmental protection support to facilitate TSMC's latest manufacturing plan. It's expected that at least part of the manufacturing machines will be provided by ASML, a Netherlands-based company which has enjoyed 25% revenue growth already just this year.

As part of the announcement, TSMC hasn't given any revised timelines for their 3 nm production, which likely means the company still expects to start 3 nm production by 2022. TSMC said its 7 nm yield is ahead of schedule, and that it expects a fast ramp in 2018 - which is interesting, considering the company has announced plans to insert several extreme ultraviolet (EUV) layers at 7 nm. TSMC has also said its 5 nm roadmap is on track for a launch in the first quarter of 2019.

Sources: EETimes, Tweakers.net, Thanks @ P4-630!

AMD to Build 2nd Gen. Ryzen and Radeon Vega on GloFo 12nm

Not to be held back by silicon fabrication process limitations like in the past, AMD will build its second-generation Ryzen CPUs and Radeon Vega GPUs on the new 12 nanometer LP (low power) FinFET process by GlobalFoundries. From the looks of it, "2nd generation Ryzen" doesn't seem to be the same as "Zen2" (a micro-architectural advancement due to be built on the 7 nm process), and is more likely an optical shrink of existing 14 nm IP to the 12 nm process, giving AMD the headroom to increase yields, and clock speeds across the board. The 12 nm switch allows AMD to roll out a new "generation" of Ryzen processors as early as the first half of 2018.

The "Vega 10" silicon could be another key piece of AMD IP on the receiving end of an optical shrink to 12 nm, which will give AMD much needed power savings, letting it increase clock speeds, and probably implement faster standards of HBM2 memory, such as 2.00 GT/s. AMD will likely label this shrunk down silicon "Vega 20." There's also the possibility of AMD building a bigger new GPUs altogether. In 2019, the company will give its CPU and GPU lineups major micro-architectural upgrades, and the switch to the 7 nm node. The new "Zen2" micro-architecture with IPC increases and new ISA instruction-sets, will be launched on the CPU side, and the new "Navi" graphics architecture will take center-stage.

Source: WCCFTech

AMD to Build "Zen 2" and "Zen 3" Processors on 7 nm Process: CTO

AMD is in no mood to stick to the 14 nm process for as long as Intel has (building four performance x86 CPU micro-architectures on it). In an interview with EE Times, AMD CTO Mark Papermaster confirmed that the company's "Zen 2" and "Zen 3" CPU micro-architectures will be built on the next-generation 7 nm silicon fab process. Transition to the 7 nm process is not as straightforward as optically shrinking your chip designs and shipping them over to your foundry. Apparently it requires big technical changes for the chip design teams, which AMD feels are better executed while it's still riding on the success of its current "Zen" architecture.

"We had to literally double our efforts across foundry and design teams…It's the toughest lift I've seen in a number of generations," said Papermaster. He added that the 7 nm node requires new "CAD tools and [changes in] the way you architect the device [and] how you connect transistors-the implementation and tools change [as well as] the IT support you need to get through it." Papermaster predicts that 7 nm will be a "long node like 28 nm" in that chip designers will have to build several refinements to their designs on the node before the newer 4 nm node could be heralded. He urged semiconductor foundry companies to introduce EUV (extreme ultra-violet lithography), a technique used to etch transistors and circuits at the infinitesimally small 7 nm node, as soon as possible, so AMD could have more options at manufacturing its next generation processors.

Source: EE Times

GLOBALFOUNDRIES on Track to Deliver Leading-Performance 7nm FinFET Technology

GLOBALFOUNDRIES today announced the availability of its 7nm Leading-Performance (7LP) FinFET semiconductor technology, delivering a 40 percent generational performance boost to meet the needs of applications such as premium mobile processors, cloud servers and networking infrastructure. Design kits are available now, and the first customer products based on 7LP are expected to launch in the first half of 2018, with volume production ramping in the second half of 2018.

In September 2016, GF announced plans to develop its own 7nm FinFET technology leveraging the company's unmatched heritage of manufacturing high-performance chips. Thanks to additional improvements at both the transistor and process levels, the 7LP technology is exceeding initial performance targets and expected to deliver greater than 40 percent more processing power and twice the area scaling than the previous 14nm FinFET technology. The technology is now ready for customer designs at the company's leading-edge Fab 8 facility in Saratoga County, N.Y.

"Our 7nm FinFET technology development is on track and we are seeing strong customer traction, with multiple product tapeouts planned in 2018," said Gregg Bartlett, senior vice president of the CMOS Business Unit at GF. "And, while driving to commercialize 7nm, we are actively developing next-generation technologies at 5nm and beyond to ensure our customers have access to a world-class roadmap at the leading edge."

IBM Research Alliance Builds New Transistor for 5 nm Technology

IBM, its Research Alliance partners GLOBALFOUNDRIES and Samsung, and equipment suppliers have developed an industry-first process to build silicon nanosheet transistors that will enable 5 nanometer (nm) chips. The details of the process will be presented at the 2017 Symposia on VLSI Technology and Circuits conference in Kyoto, Japan. In less than two years since developing a 7 nm test node chip with 20 billion transistors, scientists have paved the way for 30 billion switches on a fingernail-sized chip.

The resulting increase in performance will help accelerate cognitive computing, the Internet of Things (IoT), and other data-intensive applications delivered in the cloud. The power savings could also mean that the batteries in smartphones and other mobile products could last two to three times longer than today's devices, before needing to be charged.

Samsung Announces Comprehensive Process Roadmap Down to 4 nm

Samsung stands as a technology giant in the industry, with tendrils stretching out towards almost every conceivable area of consumer, prosumer, and professional markets. It is also one of the companies which can actually bring up the fight to Intel when it comes to semiconductor manufacturing, with some analysts predicting the South Korean will dethrone Intel as the top chipmaker in Q2 of this year. Samsung scales from hyper-scale data centers to the internet-of-things, and is set to lead the industry with 8nm, 7nm, 6nm, 5nm, 4nm and 18nm FD-SOI in its newest process technology roadmap. The new Samsung roadmap shows how committed the company is (and the industry with it) towards enabling the highest performance possible from the depleting potential of the silicon medium. The 4 nm "post FinFET" structure process is set to be in risk production by 2020.

This announcement also marks Samsung's reiteration on the usage of EUV (Extreme Ultra Violet) tech towards wafer manufacturing, a technology that has long been hailed as the savior of denser processes, but has been ultimately pushed out of market adoption due to its complexity. Kelvin Low, senior director of foundry marketing at Samsung, said that the "magic number" for productivity (as in, with a sustainable investment/return ratio) with EUV is 1,500 wafers per day. Samsung has already exceeded 1,000 wafers per day and has a high degree of confidence that 1,500 wafers per day is achievable.

AMD to Continue Working With TSMC, GLOBALFOUNDRIES on 7 nm Ryzen

In the Q&A section of their 2017 Financial Analyst Day, AMD CEO Lisa Su answered an enquiry from a Deutsche-bank questioner regarding the company's aggressive 7 nm plan for their roadmap, on which AMD seems to be balancing its process shrinkage outlook for the foreseeable future. AMD will be developing their next Zen architecture revisions on 7 nm, alongside a push for 7 nm on their next-generation (or is that next-next generation?) Navi architecture. This means al of AMD's products, consumer, enterprise, and graphics, will be eventually built on this node. This is particularly interesting considering AMD's position with GLOBALFOUNDRIES, with which AMD has already had many amendments to their Wafer Supply Agreement, a remain of AMD's silicon production division spin-off, the latest of which runs from 2016 to 2020.

As it is, AMD has to pay GLOBALFOUNDRIES for its wafer orders that go to other silicon producers (in this case, TSMC), in a quarterly basis since the beginning of 2017, based on the volume of certain wafers purchased from another wafer foundry. In addition, AMD has annual wafer purchase targets from 2016 through the end of 2020, fixed wafer prices for 2016, and a framework for yearly wafer pricing in this amendment, so the company is still bleeding money to GLOBALFOUNDRIES. However, AMD is making the correct decision in this instance, I'd wager, considering GLOBALFOUNDRIES' known difficulties in delivering their process nodes absent of quirks.

AMD to Detail Vega, Navi, Zen+ on May 16th - Laying Out a Vision

Reports are circling around the web regarding an AMD meeting featuring some of its higher ups - namely, CEO Lisa Su, head of Radeon Technologies Group Raja Koduri, and AMD's CTO Mark Papermaster happening on the 16th of May. The purpose of this meeting seems to be to discuss AMD's inflexion point, and lay out a vision for the company's future, supported on its upcoming products: the too-long-awaited Vega, its successor Navi, and the natural evolution of the company's current Zen processors, tentatively identified as Zen+.

Naturally, a company such as AMD has its roadmap planned well in advance, with work on next-generation products and technologies sometimes even running in parallel with current-generation product development. It's just a result of the kind of care, consideration, time and money that goes into making new architectures that makes this so. And while some would say Vega is now approaching a state akin to grapes that have been hanging for far too long, AMD's next graphics architecture, Navi, and its iterations on Zen cores, which the company expect to see refreshes in a 3-to-5-year period, are other matters entirely. Maybe we'll have some more details regarding the specific time of Vega's launch (for now expected on Computex), as well as on when AMD is looking to release a Zen+ refresh. I wouldn't expect much with regards to Navi - perhaps just an outline on how work is currently underway with some comments on the expectations surrounding Global Foundries' 7 nm process, on which Navi is expected to be built. And no, folks, this isn't a Vega launch. Not yet.

Source: WCCFTech

AMD Vega 10, Vega 20, and Vega 11 GPUs Detailed

AMD CTO, speaking at an investors event organized by Deutsche Bank, recently announced that the company's next-generation "Vega" GPUs, its first high-end parts in close to two years, will be launched in the first half of 2017. AMD is said to have made significant performance/Watt refinements with Vega, over its current "Polaris" architecture. VideoCardz posted probable specs of three parts based on the architecture.

AMD will begin the "Vega" architecture lineup with the Vega 10, an upper-performance segment part designed to disrupt NVIDIA's high-end lineup, with a performance positioning somewhere between the GP104 and GP102. This chip is expected to be endowed with 4,096 stream processors, with up to 24 TFLOP/s 16-bit (half-precision) floating point performance. It will feature 8-16 GB of HBM2 memory with up to 512 GB/s memory bandwidth. AMD is looking at typical board power (TBP) ratings around 225W.

GLOBALFOUNDRIES Announces its 7 nm FinFET Technology

GLOBALFOUNDRIES today announced plans to deliver a new leading-edge 7nm FinFET semiconductor technology that will offer the ultimate in performance for the next era of computing applications. This technology provides more processing power for data centers, networking, premium mobile processors, and deep learning applications.

GLOBALFOUNDRIES' new 7nm FinFET technology is expected to deliver more than twice the logic density and a 30 percent performance boost compared to today's 16/14nm foundry FinFET offerings. The platform is based on an industry-standard FinFET transistor architecture and optical lithography, with EUV compatibility at key levels. This approach will accelerate the production ramp through significant re-use of tools and processes from the company's 14nm FinFET technology, which is currently in volume production at its Fab 8 campus in Saratoga County, N.Y. GLOBALFOUNDRIES plans to make an additional mutli-billion dollar investment in Fab 8 to enable development and production for 7nm FinFET.

"The industry is converging on 7nm FinFET as the next long-lived node, which represents a unique opportunity for GLOBALFOUNDRIES to compete at the leading edge," said GLOBALFOUNDRIES CEO Sanjay Jha. "We are well positioned to deliver a differentiated 7nm FinFET technology by tapping our years of experience manufacturing high-performance chips, the talent and know-how of our former IBM Microelectronics colleagues and the world-class R&D pipeline from our research alliance. No other foundry can match this legacy of manufacturing high-performance chips."

Intel "Coffee Lake" Architecture by Q2-2018, 7 nm Process By 2022?

Intel's silicon fabrication has evidently hit a huge roadblock. It turns out that not just "Kaby Lake," but its two successors "Cannon Lake" and "Coffee Lake" could also be built on the 14 nm node, at best with a few process-level improvements. "Coffee Lake" is the company's 9th generation Core architecture, which is two steps ahead of even the "Kaby Lake" architecture, which is due later this year. "Kaby Lake" makes its way to the 45W mobile (H-segment) and 15W mobile (U-segment), in Q4-2016 and Q3-2016, respectively. The 15W U-segment will be augmented by "Cannon Lake" (8th generation Core) in Q4-2017. By mid-2018, Intel plans to launch "Coffee Lake" across both H- and U-segments.

According to a "Hot Hardware" report, based on a job listing for a systems engineer at the company, Intel could be staring at the scary prospect of holding out on 14 nm for the next three years, only to be relieved by the stopgap 10 nm node, which makes its debut with the 10th generation Core "Tiger Lake" architecture, due for 2019. "Tiger Lake," its succeeding "Ice Lake," and one other architecture could be launched on 10 nm, before finally deploying 7 nm around 2022.
Sources: HotHardware, AnandTech Forums

AMD Announces Amendment to Wafer Supply Agreement With GLOBALFOUNDRIES

AMD announced that it has entered into a long-term amendment to its Wafer Supply Agreement (WSA) with GLOBALFOUNDRIES Inc. (GF) for the period from Jan. 1, 2016 to Dec. 31, 2020. "The five-year amendment further strengthens our strategic manufacturing relationship with GLOBALFOUNDRIES while providing AMD with increased flexibility to build our high-performance product roadmap with additional foundries in the 14 nm and 7 nm technology nodes," said Dr. Lisa Su, AMD president and CEO. "Our goal is for AMD to have continued access to leading-edge foundry process technologies enabling us to build multiple generations of great products for years to come."

GLOBALFOUNDRIES' Fab 8 in Malta, N.Y. is playing a significant role in providing leading-edge capacity for AMD's graphics and processor products, including the recently launched AMD Radeon Polaris GPUs and upcoming "Zen"-based processors.

GlobalFoundries to Skip 10 nm and Jump Straight to 7 nm

Silicon fabrication company GlobalFoundries is reportedly planning to skip development of the 10 nanometer (nm) process, and is aiming to jump straight to 7 nm. The company currently operates a 14 nm FinFET node. In 2015 the company acquired semiconductor manufacturing assets from IBM, and is using them to fast-track its development. When it's ready, the 7 nm node will offer both optical and EUV (extreme ultra-violet) lithography. Driving the EUV product is an IBM 3300 EUV fabricator at the company's advanced patterning center, in its Albany, New York fab.

Source: SemiWiki

TSMC to Begin 7 nm Trial Production in 2017

Taiwan's premier semiconductor foundry TSMC could begin 7 nanometer (nm) trial production in as early as the first half of 2017. Co-CEO Mark Liu, speaking at the company's investor-meet held earlier this month, stated that TSMC is currently engaging with over 20 companies on 7 nm development, with over 15 tape-outs within 2017, leading up to volume-production by early-2018. In the run-up to 7 nm, the company is also developing a 10 nm node for lower-powered devices (eg: mobile baseband). The company has already begun tape-outs of 10 nm chips in Q1-2016. TSMC is currently handling volume-production of 16 nm FinFET Plus chips.

Source: DeliddedTech

TSMC to Launch its 5 nm Fab by 2020

Taiwan's premier semiconductor foundry, TSMC, announced that it is on track to begin production of chips on its 7 nanometer silicon fab process by the first half of 2018. The company also announced that production on an even newer 5 nanometer process should commence two years later, in 2020. The company has currently cleared all decks for mass-production of chips on its 16 nm FFC (FinFET compact) node, with the company hoping to grab over 70% of the worldwide 14/16 nm production market-share by the end of 2016.

Source: DigiTimes
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