News Posts matching "7 nm"

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Vega II Logo Trademarked by AMD

AMD late November filed a trademark application with the USPTO for a new logo, for its second generation "Vega" graphics architecture, built around the 7 nm silicon fabrication process. The logo looks similar to the original Vega "V," with two bands marking out the Roman numeral II (2). This logo could appear on the product and marketing on a series of new Radeon Pro and Radeon Instinct (and possibly even gaming-grade Radeon RX?) graphics cards based on AMD's new "Vega 20" multi-chip module. This chip features a doubling in memory bandwidth thanks to its 4096-bit wide HBM2 interface, and the optical shrink of the GPU die to the 7 nm node could enable AMD to dial up engine clocks significantly.

Intel 7nm EUV Node Back On Track, 2x Transistor Densities Over 10nm

There could be light at the end of the tunnel for Intel's silicon fabrication business after all, as the company reported that its 7 nanometer silicon fabrication node, which incorporates EUV (extreme ultraviolet) lithography, is on track. The company stressed in its Nasdaq Investors' Conference presentation that its 7 nm EUV process is de-linked from its 10 nm DUV (deep ultraviolet) node, and that there are separate teams working on their development. The 10 nm DUV node is qualitatively online, and is manufacturing small batches of low-power mobile "Cannon Lake" Core processors.

Cannon Lake is an optical shrink of the "Skylake" architecture to the 10 nm node. Currently there's only one SKU based on it, the Core i3-8121U. Intel utilized the electrical gains from the optical shrink to redesign the client-segment architecture's FPU to support the AVX-512 instruction-set (although not as feature-rich as the company's enterprise-segment "Skylake" derivatives). The jump from 10 nm DUV to 7 nm EUV will present a leap in transistor densities, with Intel expecting nothing short of a doubling. 10 nm DUV uses a combination of 193 nm wavelength ultraviolet lasers and multi-patterning to achieve its transistor density gains over 14 nm++. The 7 nm EUV node uses an extremely advanced 135 nm indirect laser, reducing the need for multi-patterning. The same laser coupled with multi-patterning could be Intel's ticket to 5 nm.

TSMC's 7nm Production Likely to Be Underutilized in 2019 as Smartphone Chip Demand Weakens

DigiTimes, citing a Chinese-language Commercial Times report, cites TSMC's 7 nm foundry capacity as likely being underutilized in 2019. After TSMC announced it expected cutting-edge 7 nm designs to correspond to around 20% of the company's revenues in 2019, the company will likely have to review those projections, as lower demand from smartphone chip manufacturers will likely leave TSMC with less actual output than that which it can churn out.

Due to a cutback in orders placed by Apple, HiSilicon and Qualcomm, concerns regarding TSMC's ability to be the sole 7 nm chip fabrication tech for the industry can likely be laid to rest. That the smartphone market is reaching saturation is a well-known quantity - it's becoming harder and harder to cram new technologies that justify the yearly smartphone upgrade that most companies vie for - and one of the reasons for the launch of various brand-specific smartphone subscription services. The difference isn't scandalous - TSMC will still be making use of 80-90% of its total 7nm process capacity during the first half of 2019, the report quoted industry sources as saying.

AMD Doubles L3 Cache Per CCX with Zen 2 "Rome"

A SiSoft SANDRA results database entry for a 2P AMD "Rome" EPYC machine sheds light on the lower cache hierarchy. Each 64-core EPYC "Rome" processor is made up of eight 7 nm 8-core "Zen 2" CPU chiplets, which converge at a 14 nm I/O controller die, which handles memory and PCIe connectivity of the processor. The result mentions cache hierarchy, with 512 KB dedicated L2 cache per core, and "16 x 16 MB L3." Like CPU-Z, SANDRA has the ability to see L3 cache by arrangement. For the Ryzen 7 2700X, it reads the L3 cache as "2 x 8 MB L3," corresponding to the per-CCX L3 cache amount of 8 MB.

For each 64-core "Rome" processor, there are a total of 8 chiplets. With SANDRA detecting "16 x 16 MB L3" for 64-core "Rome," it becomes highly likely that each of the 8-core chiplets features two 16 MB L3 cache slices, and that its 8 cores are split into two quad-core CCX units with 16 MB L3 cache, each. This doubling in L3 cache per CCX could help the processors cushion data transfers between the chiplet and the I/O die better. This becomes particularly important since the I/O die controls memory with its monolithic 8-channel DDR4 memory controller.

Intel Could Upstage EPYC "Rome" Launch with "Cascade Lake" Before Year-end

Intel is reportedly working tirelessly to launch its "Cascade Lake" Xeon Scalable 48-core enterprise processor before year-end, according to a launch window timeline slide leaked by datacenter hardware provider QCT. The slide suggests a late-Q4 thru Q1-2019 launch timeline for the XCC (extreme core count) version of "Cascade Lake," which packs 48 CPU cores across two dies on an MCM. This launch is part of QCT's "early shipment program," which means select enterprise customers can obtain the hardware in pre-approved quantities. In other words, this is a limited launch, but one that's probably enough to upstage AMD's 7 nm EPYC "Rome" 64-core processor launch.

It's only by late-Q1 thru Q2-2019 that the Xeon "Cascade Lake" family would be substantially launched, including lower core-count variants that are still 2-die MCMs. This aligns to preempt or match AMD's 7 nm EPYC family rollout through 2019. "Cascade Lake" is probably Intel's final enterprise microarchitecture to be built on the 14 nm++ node, and consists of 2-die multi-chip modules that feature 48 cores, and a 12-channel memory interface (6-channel per die); with 88-lane PCIe from the CPU socket. The processor is capable of multi-socket configurations. It will also be Intel's launch platform for substantially launching its Optane Persistent Memory product series.

It Can't Run Crysis: Radeon Instinct MI60 Only Supports Linux

AMD recently announced the Radeon Instinct MI60, a GPU-based data-center compute processor with hardware virtualization features. It takes the crown for "the world's first 7 nm GPU." The company also put out specifications of the "Vega 20" GPU it's based on: 4,096 stream processors, 4096-bit HBM2 memory interface, 1800 MHz engine clock-speed, 1 TB/s memory bandwidth, 7.4 TFLOP/s peak double-precision (FP64) performance, and the works. Here's the kicker: the company isn't launching this accelerator with Windows support. At launch, AMD is only releasing x86-64 Linux drivers, with API support for OpenGL 4.6, Vulkan 1.0, and OpenCL 2.0, along with AMD's ROCm open ecosystem. The lack of display connector already disqualifies this card for most workstation applications, but with the lack of Windows support, it is also the most expensive graphics card that "can't run Crysis." AMD could release Radeon Pro branded graphics cards based on "Vega 20," which will ship with Windows and MacOS drivers.

AMD Zen 2 "Rome" MCM Pictured Up Close

Here is the clearest picture of AMD "Rome," codename for the company's next-generation EPYC socket SP3r2 processor, which is a multi-chip module of 9 chiplets (up from four). While first-generation EPYC MCMs (and Ryzen Threadripper) were essentially "4P-on-a-stick," the new "Rome" MCM takes the concept further, by introducing a new centralized uncore component called the I/O die. Up to eight 7 nm "Zen 2" CPU dies surround this large 14 nm die, and connect to it via substrate, using InfinityFabric, without needing a silicon interposer. Each CPU chiplet features 8 cores, and hence we have 64 cores in total.

The CPU dies themselves are significantly smaller than current-generation "Zeppelin" dies, although looking at their size, we're not sure if they're packing disabled integrated memory controllers or PCIe roots anymore. While the transition to 7 nm can be expected to significantly reduce die size, groups of two dies appear to be making up the die-area of a single "Zeppelin." It's possible that the CPU chiplets in "Rome" physically lack an integrated northbridge and southbridge, and only feature a broad InfinityFabric interface. The I/O die handles memory, PCIe, and southbridge functions, featuring an 8-channel DDR4 memory interface that's as monolithic as Intel's implementations, a PCI-Express gen 4.0 root-complex, and other I/O.

AMD Unveils "Zen 2" CPU Architecture and 7 nm Vega Radeon Instinct MI60 at New Horizon

AMD today held its "New Horizon" event for investors, offering guidance and "color" on what the company's near-future could look like. At the event, the company formally launched its Radeon Instinct MI60 GPU-based compute accelerator; and disclosed a few interesting tidbits on its next-generation "Zen 2" mircroarchitecture. The Instinct MI60 is the world's first GPU built on the 7 nanometer silicon fabrication process, and among the first commercially available products built on 7 nm. "Rome" is on track to becoming the first 7 nm processor, and is based on the Zen 2 architecture.

The Radeon Instinct MI60 is based on a 7 nm rendition of the "Vega" architecture. It is not an optical shrink of "Vega 10," and could have more number-crunching machinery, and an HBM2 memory interface that's twice as wide that can hold double the memory. It also features on-die logic that gives it hardware virtualization, which could be a boon for cloud-computing providers.

TSMC to Tape Out 100 7 nm Chip Designs by 2019

TSMC has become the de facto leader when it comes to manufacturing technology. The company is on the forefront of new process technologies, and provides solutions for some of the biggest players in the industry, like Apple, NVIDIA, Qualcomm, and AMD, just to name a few. This process leadership means that TSMC is being courted by numerous fabless silicon designers so as to produce their silicon chips with the latest process technologies - part of the reason why TSMC has seen increasing revenues and profits forecasts.

By the end of 2018, TSMC will have taped out 50 7 nm designs, and plans to double that number in 2019. And these design wins don't stand solely on the shoulders of TSMC's first 7 nm technology (which should account for 20% of the company's revenue by 2019); the company will also tape-out chips built upon their 7 nm + EUV process, which will begin production in 2019.

Samsung Electronics Starts Production of EUV-based 7nm LPP Process

Samsung Electronics, a world leader in advanced semiconductor technology, today announced that it has completed all process technology development and has started wafer production of its revolutionary process node, 7LPP, the 7-nanometer (nm) LPP (Low Power Plus) with extreme ultraviolet (EUV) lithography technology. The introduction of 7LPP is a clear demonstration of Samsung Foundry's technology roadmap evolution and provides customers with a definite path to 3nm. The commercialization of its newest process node, 7LPP gives customers the ability to build a full range of exciting new products that will push the boundaries of applications such as 5G, Artificial Intelligence, Enterprise and Hyperscale Datacenter, IoT, Automotive, and Networking.

"With the introduction of its EUV process node, Samsung has led a quiet revolution in the semiconductor industry," said Charlie Bae, executive vice president of foundry sales and marketing team at Samsung Electronics. "This fundamental shift in how wafers are manufactured gives our customers the opportunity to significantly improve their products' time to market with superior throughput, reduced layers, and better yields. We're confident that 7LPP will be an optimal choice not only for mobile and HPC, but also for a wide range of cutting-edge applications."

AMD Zen 2 Offers a 13% IPC Gain over Zen+, 16% over Zen 1

AMD "Zen" CPU architecture brought the company back to competitive relevance in the processor market. It got an incremental update in the form of "Zen+" which saw the implementation of an improved 12 nm process, and improved multi-core boosting algorithm, along with improvements to the cache subsystem. AMD is banking on Zen 2 to not only add IPC (instructions per clock) improvements; but also a new round of core-count increases. Bits n Chips has information that Zen 2 is making significant IPC gains.

According to the Italian tech publication, we could expect Zen 2 IPC gains of 13 percent over Zen+, which in turn posted 2-5% IPC gains over the original Zen. Bits n Chips notes that these IPC gains were tested in scientific tasks, and not in gaming. There is no gaming performance data at the moment. AMD is expected to debut Zen 2 with its 2nd generation EPYC enterprise processors by the end of the year, built on the 7 nm silicon fabrication process. This roughly 16 percent IPC gain versus the original Zen, coupled with higher clocks, and possibly more cores, could complete the value proposition of 2nd gen EPYC. Zen 2-based client-segment products can be expected only in 2019.

TSMC to be the Sole Supplier of Apple A13 SoCs in 2019

Even as AMD plans to dedicate 7 nm CPU and GPU manufacturing entirely to TSMC, reports are emerging that Apple could make the Taiwanese silicon fabrication giant the sole supplier of its 7 nm A13 SoC, which powers the next generation iPhone and iPad devices. Manufacturing of the A13 could commence in 2019 to keep pace with Apple's roadmaps. TSMC is currently the most strongly placed semiconductor foundry for 7 nm EUV manufacturing, after GlobalFoundries crashed out, and Samsung is trailing behind with a contract to manufacture only a portion of Qualcomm's next-generation Snapdragon SoCs.

TSMC Increases Industry Foothold With 11.6% Increase in Revenue for Q3 2018

TSMC has quickly (over a span of years, but still) become the de-facto silicon manufacturing giant in the industry. They produce silicon-based solutions for almost all the significant tech companies (NVIDIA, AMD, Apple, Qualcomm, including the silicon manufacturing leader of yonder, Intel), and are on the forefront of new fabrication technologies. Just today we've covered how they are already well on their way to their second-gen 7 nm (N7+) fabrication technology with usage of EUV, and carving their path forward for 5 nm (N5).

Intel At Least 5 Years Behind TSMC and May Never Catch Up: Analyst

Intel's in-house sub-10 nanometer silicon fabrication dreams seem more distant by the day. Raymond James analyst Chris Caso, in an interview with CNBC stated that Intel's 10 nm process development could set the company back by at least 5 years behind TSMC. In its most recent financial results call, Intel revised its 10 nm outlook to reflect that the first 10 nm processors could only come out by the end of 2019. "Intel's biggest strategic problem is their delay on 10nm production - we don't expect a 10nm server chip from Intel for two years," analyst Chris Caso said in a note to clients Tuesday. "10nm delays create a window for competitors, and the window may never again close."

By that time, Intel will have missed several competitive milestones behind TSMC, which is in final stages of quantitatively rolling out its 7 nm process. Caso predicts that by the time Intel goes sub-10 nm (7 nm or something in that nanoscopic ballpark), TSMC and Samsung could each be readying their 5 nm or 3 nm process roll-outs. A Rosenblatt Securities report that came out late-August was even more gloomy about the situation at Intel foundry. It predicted that foundry delays could set the company back "5, 6, or even 7" years behind rivals. Intel is already beginning offload some of its 14 nm manufacturing to TSMC. Meanwhile, AMD is reportedly planning to entirely rely on TSMC to make its future generations of "Zen" processors.

AMD "Navi" GPU Architecture Successor Codenamed "Arcturus"?

Arcturus is the fourth brightest star in the night sky, and could be the a new GPU architecture by AMD succeeding "Navi," according to a Phoronix report. The codename of Navi-successor has long eluded AMD's roadmap slides. The name "Arcturis" surfaced on Phoronix community forums, from a post by an AMD Linux liaison who is a member there. The codename is also supported by the fact that AMD is naming its GPU architectures after the brightest stars in the sky (albeit in a descending order of their brightness). Polaris is the brightest, followed by Vega, Navi, and Arcturus.

AMD last referenced the Navi-successor on a roadmap slide during its 2017 Financial Analyst Day presentation by Mark Papermaster. That slide mentioned "Vega" to be built on two silicon fabrication processes, 14 nm and "14 nm+." We know now that AMD intends to build a better-endowed "Vega" chip on 7 nm, which could be the world's first 7 nm GPU. "Navi" is slated to be built on 7 nm as the process becomes more prevalent in the industry. The same slide mentions Navi-successor as being built on "7 nm+," which going by convention, could refer to an even more advanced process than 7 nm. Unfortunately, even in 2017, when the industry was a touch more optimistic about 7 nm, AMD expected the Navi-successor to only come out by 2020. We're not holding our breath.

AMD Readying a 10-core AM4 Processor to Thwart Core i9-9900K?

To sustain its meteoric rise at the stock markets, AMD needs to keep investors convinced it has a competitive edge over Intel, even if it means investing heavily on short-term roadmap changes. According to an Elchapuzas Informatico article, AMD could be working on a new 10-core/20-thread processor for the AM4 platform, to compete with the upcoming Core i9-9900K 8-core/16-thread processor from Intel. The said processor is being labeled "Ryzen 7 2800X" and plastered over CineBench nT screenshots, where due to the sheer weight of its 10 cores, it tops the nT test in comparison to Intel's mainstream-desktop processors, including the 2P Xeon X5650 12-core/24-thread.

The Forbes article that cites the Elchapuzas Informatico, however, is skeptical that AMD could make such a short-sighted product investment. It believes that development of a 10-core die on existing "Zen+" architecture could warrant a massive redesign of the CCX (Zen Compute Complex), and AMD would only get an opportunity to do so when working on "Zen 2," which AMD still expects to debut by late-2018 on its EPYC product line. We, however, don't discount the possibility of a 10-core "Zen+" silicon just yet. GlobalFoundries, AMD's principal foundry partner for CPUs, has given up on 7 nm, making the company fall back to TSMC to meet its 7 nm roadmap commitments. TSMC already has a long list of clientele for 7 nm, including high-volume contracts from Apple, Qualcomm, and NVIDIA. This could force AMD to bolster its existing lineup as a contingency for delays in 7 nm volume production.

Analyst Firm Susquehanna: "Intel Lost its Manufacturing Leadership"

Intel was once the shining star in the semiconductor manufacturing industry, with a perfectly integrated, vertical product design and manufacturing scheme. Intel was one of the few companies in the world to be able to both develop its architectures and gear their manufacturing facilities to their design characteristics, ensuring a perfect marriage of design and manufacturing. However, not all is rosy on that field, as we've seen; AMD itself also was a fully integrated company, but decided to spin-off its manufacturing arm so as to survive - thus creating GLOBALFOUNDRIES.But Intel was seen as many as the leader in semiconductor manufacturing, always at the cutting edge of - well - Moore's Law, named after Intel's founding father Gordon Moore. Now, Mehdi Hosseini, an analyst with Susquehanna, has gone on to say that the blue giant has effectively lost its semiconductor leadership. And it has, in a way, even if its 10 nm (which is in development hell, so to speak) is technically more advanced than some 7 nm implementations waiting to be delivered to market by its competitors. However, there's one area where Intel will stop being able to claim leadership: manufacturing techniques involving EUV (Extreme UltraViolet).

GlobalFoundries Puts its 7 nm Program on Hold Indefinitely

GLOBALFOUNDRIES today announced an important step in its transformation, continuing the trajectory launched with the appointment of Tom Caulfield as CEO earlier this year. In line with the strategic direction Caulfield has articulated, GF is reshaping its technology portfolio to intensify its focus on delivering truly differentiated offerings for clients in high-growth markets.

GF is realigning its leading-edge FinFET roadmap to serve the next wave of clients that will adopt the technology in the coming years. The company will shift development resources to make its 14/12nm FinFET platform more relevant to these clients, delivering a range of innovative IP and features including RF, embedded memory, low power and more. To support this transition, GF is putting its 7nm FinFET program on hold indefinitely and restructuring its research and development teams to support its enhanced portfolio initiatives. This will require a workforce reduction, however a significant number of top technologists will be redeployed on 14/12nm FinFET derivatives and other differentiated offerings.

Rollercoaster Monday for AMD as it Loses Jim Anderson, Closes Above $25 in Stock Price

It has been a rollercoaster Monday for AMD as it bled yet another bright executive. Jim Anderson, who led Computing and Graphics Group after the departure of Raja Koduri, and who is rumored to have conceived the idea of Threadripper and the client-segment monetization of the "Zen" architecture, left AMD to become CEO of Lattice Semiconductor, a company that designs FPGAs. Anderson will be paid an inducement award of company shares valued up to $2.9 million.

On the same day, AMD stock crossed $25 to close at $25.26 up 5.34 percent, a historic high since way back in 2006 as Intel was beginning to regain its footing with its Core processor family. This raises the company's market cap to $22.9 billion. AMD is better funded than ever (in over 12 years), to start a new GPU project, for example. CTO Mark Papermaster, in a company blog post assured customers that AMD is going all-in with 7 nanometer, and it could bank more heavily on TSMC to achieve its roadmap goals of first-to-market 7 nm CPU and GPU by end of the year.

Chances of Intel Going Fabless Higher Than Ever

Intel is one of the few semiconductor companies that manufactures a majority of its products on its own silicon fabrication foundries. The breadwinner for the company continues to be CPUs, and a majority of its revenues continue to come from its client-computing group (CCG). CPUs, like GPUs, are required to be built on the latest silicon fabrication process to keep up (or catch up) with Moore's Law. Intel is plagued with severe technological roadblocks toward advancing its foundry process from 14 nanometer (nm) to its next step, 10 nm. In its latest Q2-2018 earnings call, the company confirmed that the 10 nm node won't put out before Q4-2019, even as rival AMD's CEO announced that its first 7 nm processors will be up for purchase by the end of 2018 (a year ahead with a more advanced process, on paper). Analysts are beginning to paint a very grim future for Intel's foundry business.

The prospects for Intel going fabless, at least for its cutting-edge products, is higher than ever. Analysts, speaking with Taiwan-based industry observer DigiTimes, mentioned that there is speculation of Intel scaling down its foundry business. Something like this, if true, could hint at the company looking for foundry partners with newer silicon-fabrication nodes at a more advanced stage of development (eg: GlobalFoundries 7 nm) to manufacture its processors, while relegating its own foundries to manufacture less complex products such as chipset, NAND flash, 3D XPoint memory, 5G PHYs, etc. Fancy a Core processor made by GloFo in the great state of New York?

Intel Stuck with 14nm Processors Till Holiday 2019

Wrap your head around this: at some point in 2019, AMD will be selling 7 nm processors while Intel sells 14 nm processors. That how grim Intel's 10 nanometer silicon fabrication process development is looking. In the Q&A session of its Q2-2018 Earnings Call, Intel stated that the first products based on its 10 nm process will arrive only by Holiday 2019, making 14 nm micro-architectures hold the fort for not just the rest of 2018, but also most of 2019. In the client-segment, Intel is on the verge of launching its 9th generation Core "Whiskey Lake" processor family, its 5th micro-architecture on the 14 nm node after "Broadwell," "Skylake," "Kaby Lake," and "Coffee Lake."

It's likely that "Whiskey Lake" will take Intel into 2019 after the company establishes performance leadership over 12 nm AMD "Pinnacle Ridge" with a new round of core-count increases. Intel is also squeezing out competitiveness in its HEDT segment by launching new 20-core and 22-core LGA2066 processors; and a new platform with up to 28 cores and broader memory interface. AMD, meanwhile, hopes to have the first 7 nm EPYC processors out by late-2018. Client-segment products based on its architecture, however, will follow the roll-out of these enterprise parts. We could see a point in 2019 when AMD launches its 7 nm 3rd generation Ryzen processors in the absence of competing 10 nm Core processors from Intel. Posted below is an Intel slide from 2013, when the company was expecting 10 nm rollout by 2015. That's how much its plans have derailed.

No 16-core AMD Ryzen AM4 Until After 7nm EPYC Launch (2019)

AMD in its Q2-2018 investors conference call dropped more hints at when it plans to launch its 3rd generation Ryzen processors, based on its "Zen2" architecture. CEO Lisa Su stated in the Q&A session that rollout of 7 nm Ryzen processors will only follow that of 7 nm EPYC (unlike 1st generation Ryzen preceding 1st generation EPYC). What this effectively means is that the fabled 16-core die with 8 cores per CCX won't make it to the desktop platform any time soon (at least not in the next three quarters, certainly not within 2018).

AMD CEO touched upon the development of the company's 7 nm "Rome" silicon, which will be at the heart of the company's 2nd generation EPYC processor family. 2nd generation EPYC, as you'd recall from our older article, is based on 7 nm "Zen2" architecture, and not 12 nm "Zen+." 3rd generation Ryzen is expected to be based on "Zen2." As of now, the company is said to have completed tape-out of "Rome," and is sending samples out to its industry partners for further testing and validation. The first EPYC products based on this will begin rolling out in 2019. The 7 nm process is also being used for a new "Vega" based GPU, which has taped out, and will see its first enterprise-segment product launch within 2018.

Rumor: AMD's Zen 2, 7 nm Chips to Feature 10-15% IPC Uplift, Revised 8-core per CCX Design

A post via Chiphell makes some substantial claims on AMD's upcoming Zen 2 microarchitecture, built on the 7 nm process. AMD has definitely won the core-count war once again (albeit with a much more decisive blow to Intel's dominance than with Bulldozer), but the IPC battle has been an uphill one against Intel's slow, but sure, improvement in that area over the years. AMD did say, at the time they introduced the Zen architecture, that they had a solid understanding on Zen's choke points and its improveable bits and pieces - and took it to heart to deliver just that.

TSMC is Ramping Up 7nm Production, 5nm Next Year

At their technology symposium in Taipei, TSMC CEO CC Wei has made remarks, dismissing speculation that their 7 nanometer yield rate was not as good as expected. Rather the company is ramping up production capacity for 7 nm quickly, up 9% from 10.5 million wafers in 2017, to 12 million wafers in 2018. They plan to tape out more than 50 chip designs in 2018, with the majority of the tape outs for AI, GPU and crypto applications, followed by 5G and application processors.

Most of their orders for the 7 nanometer node come from big players like AMD, Bitmain, NVIDIA and Qualcomm. Apple's A12 processor for upcoming iPhones is also a major driver for TSMC's 7 nanometer growth. These orders will be fulfilled in early 2019, so it'll be a bit longer before we have 7 nm processors for the masses.

Next-gen 5 nanometer production will kick off next year, followed by mass production in late 2019 or early 2020. The company will invest as much as USD 25 billion in their new production facilities for this process node.

AMD to Polevault Zen+, Head Straight to 7nm Zen2 for EPYC

AMD in its Computex 2018 address earlier today, mention that its second-generation EPYC enterprise processors will be based on its 7 nanometer "Zen 2" architecture, and not 12 nm "Zen+." The company has the 7 nm silicon ready in its labs, and will begin sampling within the second half of 2018. The first products could launch in 2019, after validations. Besides improved energy-efficiency, the 12 nm "Zen+" architecture features a minor 3-5 percent IPC uplift thanks to improved multi-core clock-speed boosting, and faster caches. "Zen 2," on the other hand, presents AMD with the opportunity to make major design changes to its silicon to achieve higher IPC uplifts. The 7 nm process introduces significant transistor density uplifts over the current process. AMD is in the process of building 4-die multi-chip modules using the 12 nm "Pinnacle Ridge" silicon for its 2nd generation Ryzen Threadripper HEDT client processor family.
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