SK hynix showcased groundbreaking memory solutions including HBM4 at the TSMC 2025 North America Technology Symposium held in Santa Clara, California on April 23. The TSMC North America Technology Symposium is an annual event in which TSMC shares its latest technologies and products with global partners. This year, SK hynix participated under the slogan "Memory, Powering AI and Tomorrow," highlighting its technological leadership in AI memory through exhibition zones including HBM Solutions and AI/Data Center Solutions.

In the HBM Solution section, SK hynix presented samples of its 12-layer HBM4 and 16-layer HBM3E products. The 12-layer HBM4 is a next-generation HBM capable of processing over 2 terabytes (TB) of data per second. In March, the company announced it has become the first in the world to supply HBM4 samples to major customers and plans to complete preparations for mass production within the second half of 2025. The B100, NVIDIA's latest Blackwell GPU equipped with the 8-layer HBM3E, was also exhibited in the section along with 3D models of key HBM technologies such as TSV and Advanced MR-MUF, drawing significant attention from visitors.

SK hynix Inc. (or "the company", www.skhynix.com) announced today that it recorded 17.6391 trillion won in revenues, 7.4405 trillion won in operating profit (with an operating margin of 42%), and 8.1082 trillion won in net profit (with a net margin of 46%) in the first quarter this year. Both revenues and operating profit are the 2nd highest records following last quarter when the company achieved its best quarterly results. Operating margin improved by 1% compared to the previous quarter to 42%, resulting in 8th consecutive quarterly growth.

SK hynix explained that memory market ramped up faster than expected due to competition to develop AI systems and inventory accumulation demand. The company responded to the demand with an expansion in sales of high value-added products such as 12-layer HBM3E and DDR5. The company believes the strong financial results despite a low seasonality reflect its outstanding competitiveness compared to the past. The company plans to focus on enhancing the business fundamentals to achieve distinguished financial outcome, even in times of market correction.

SK hynix Inc. announced today that it has completed customer validation of 96 GB CMM (CXL Memory Module) - DDR5, a DRAM solution product based on CXL 2.0. The company said that it can process 36 GB/s due to a 50% increase in capacity when the product is applied to the server systems and a 30% improvement in the bandwidth compared to previous DDR5 modules. This can contribute to drastically reducing the total cost of ownership by customers in building and operating data centers.

Following the 96 GB product validation, the company is proceeding with the validation process for 128 GB product with another customer. This product, equipped with 32 Gb DDR5 DRAM using the 1bnm process, or the fifth-generation of the 10-nanometer technology, has high performance per watt. The company plans to complete the ongoing 128 GB validation as soon as possible to establish a CXL product portfolio to support customers in a timely manner. SK hynix is making efforts to expand the CXL ecosystem along with the development of CXL DRAM. The company developed HMSDK, software optimized for CMM-DDR5 and integrated it on Linux, the world's largest open-source operating system, in September, improving the performance of CXL applied systems.

G.SKILL International Enterprise Co., Ltd., the world's leading brand of performance overclock memory and PC components, is thrilled to unveil DDR5 memory with an ultra-high kit capacity of 256 GB (64 GB x4), overclocked to DDR5-6000 CL32. Built with high-performance SK hynix DDR5 ICs, this overclock memory speed and timing pushes the boundaries of memory overclocking by fully loading 4 modules of high-capacity DDR5 64 GB U-DIMM modules on a single system; marking a new milestone for high-performance computing, content creation, AI applications, and advanced workstation workloads.

Overclocked, Ultra-Capacity 256 GB (64 GB x4) at DDR5-6000 CL32 In content creation and recent advancements in AI, the need for higher DRAM capacity is essential. Whether calculating large language models or working with complex or high-resolution video content, high-speed memory of high-density 64 GB modules would help to provide a smoother and more efficient workflow. Loaded with AMD EXPO memory overclock profiles, see the DDR5-6000 CL32 256 GB (64 GB x4) kit being stress-tested in the screenshots below on the ASUS ROG CROSSHAIR X870E HERO motherboard with the AMD Ryzen 7 9800X3D desktop processor, as well as on the MSI MPG X870E CARBON WIFI motherboard with the AMD Ryzen 9 9900X desktop processor.

Micron Technology, Inc. (Nasdaq: MU), a leader in innovative memory and storage solutions, today announced a market segment-based reorganization of its business units to capitalize on the transformative growth driven by AI, from data centers to edge devices.

Micron has maintained multiple generations of industry leadership in DRAM and NAND technology and has the strongest competitive positioning in its history. Micron's industry-leading product portfolio, combined with world-class manufacturing execution enables the development of differentiated solutions for its customers across end markets. As high-performance memory and storage become increasingly vital to drive the growth of AI, this Business Unit reorganization will allow Micron to stay at the forefront of innovation in each market segment through deeper customer engagement to address the dynamic needs of the industry.

Corsair, a leading global developer and manufacturer of high-performance gear and technology for gamers, content creators, and PC enthusiasts, proudly announces the continuation of its multi-year, cross-brand collaboration with the critically acclaimed and award-winning Call of Duty franchise with the Call of Duty: Warzone Collection. Celebrating the 5th anniversary of Call of Duty: Warzone and the highly anticipated return of Verdansk, Corsair and its family of leading brands are delivering an exclusive collection of high-performance gaming products for the Call of Duty community to fully engage with on their way to victory.

"We are thrilled to team up with Activision again as our world-class brands come together for the return of Verdansk," said Thi La, President and COO at Corsair. "This powerful collaboration extends across multiple product categories at Corsair including Drop, Elgato, ORIGIN PC and SCUF Gaming, bringing true high-performance to true Call of Duty: Warzone fans as they squad up and drop in."

Ferroelectric Memory Co. (FMC) and Neumonda have formed a partnership to commercialize "DRAM+," a ferroelectric (FeRAM) memory architecture combining DRAM's speed with non-volatile data retention. The technology substitutes conventional capacitors with ferroelectric hafnium oxide (HfO₂) elements, allowing persistent storage without power while maintaining nanosecond access times. This hybrid technology addresses the performance gap between high-speed DRAM and storage-class memory like NAND flash. Unlike previous European DRAM ventures from Infineon and Qimonda that failed against commodity memory economics, FMC targets specialized applications valuing persistence and power efficiency. The HfO₂-based approach resolves limitations of previous FeRAM memory implementations using lead zirconate titanate (PZT) that couldn't scale beyond megabyte capacities.

Prototypes now demonstrate gigabit-range densities compatible with sub-10 nm fabrication of traditional DRAM made by Micron, Samsung, SK Hynix, and others. By eliminating refresh cycles, DRAM+ reduces static power consumption substantially compared to traditional one-transistor/one-capacitor DRAM cells. Primary applications include AI accelerators requiring persistent model weights, automotive ECUs with immediate startup requirements, and power-constrained medical implants. Neumonda will contribute its test platform suite Rhinoe, Octopus, and Raptor for electrical characterization and analytics at lower capital costs than standard semiconductor test equipment. No production timeline has been announced for commercial DRAM+ products.

Earlier today, industry moles in South Korea have heard whispers about Samsung Electronics planning a new pricing strategy for NAND and DRAM product lines. According to an MK news articles, local sources believe that company leadership will: "raise memory chip prices—by 3-5% from the current level—for major global customers. It is reported that some customers have already begun contract negotiations that reflect the increase conditions." Regional watchdogs posit that the megacorporation is reacting to very current geopolitical tensions (i.e. tariffs). Earlier this week, a main rival—Micron—informed customers about forthcoming memory price increases. Naturally, the North American memory chip giant is not "fully" affected by recent seismic shifts. A "significant growth demand" has caused jacked up charges—effective across DRAM, NAND flash, and HBM portfolios—projected throughout 2025 and 2026.

Returning to South Korean shores and Samsung, one unnamed semiconductor insider opined to MK: "oversupply continued throughout last year, but supply has recently decreased as major companies have begun to reduce production...In addition, artificial intelligence (AI) devices are appearing one after another in China, and demand for semiconductors is gradually increasing due to industrial automation." DRAMeXchange—an appropriately named market research organization—has kept track relevant trends. As disclosed by the MK news piece—as of last month, general-purpose DRAM DDR4 prices: "remained flat for the fourth month in a row." Looking at conditions for DDR5 (used in high-performance PCs and enterprise equipment), prices soared by 12%. DRAMeXchange observed NAND costs rising by 9.6%: "continuing an upward trend for the third consecutive month."

In a letter to customers, Micron has announced upcoming memory price increases extending through 2025 and 2026, citing persistent supply constraints coupled with accelerating demand across its product portfolio. The manufacturer points to significant demand growth in DRAM, NAND flash, and high-bandwidth memory (HBM) segments as key drivers behind the pricing strategy. The memory market is rebounding from a prolonged oversupply cycle that previously depressed revenues industry-wide. Strategic production capacity reductions implemented by major suppliers have contributed to price stabilization and subsequent increases over the past twelve months. This pricing trajectory is expected to continue as data center operators, AI deployments, and consumer electronics manufacturers compete for limited memory allocation.

In communications to channel partners, Micron emphasized AI and HPC requirements as critical factors necessitating the price adjustments. The company has requested detailed forecast submissions from partners to optimize production planning and supply chain stability during the constrained market period. With its pricing announcement, Micron disclosed a $7 billion investment in a Singapore-based HBM assembly facility. The plant will begin operations in 2026 and will focus on HBM3E, HBM4, and HBM4E production—advanced memory technologies essential for next-generation AI accelerators and high-performance computing applications from NVIDIA, AMD, Intel, and other companies. The price increases could have cascading effects across the AI and GPU sector, potentially raising costs for products ranging from consumer gaming systems to enterprise data infrastructure. We are monitoring how these adjustments will impact hardware refresh cycles and technology adoption rates as manufacturers pass incremental costs to end customers.

Tachyum today announced that it has successfully enabled DRAM Failover correct system on its Prodigy Universal Processor, demonstrating enhanced reliability for even larger-scale AI and HPC applications even in the case of DRAM chip failures.

Tachyum's DRAM Failover is an advanced memory error correction technology that improves the reliability of DRAM and provides a higher level of protection than traditional Error Correction Code (ECC). DRAM Failover can correct multi-bit errors within a single memory chip or across multiple memory chips, allowing continued memory operation in the event of device-level faults in memory. With DRAM Failover, even a whole DRAM chip failure can be tolerated without affecting the system and applications.

TrendForce's latest findings reveal that U.S. tariff hikes prompted most downstream brands to frontload shipments to 1Q25, accelerating inventory reduction across the memory supply chain. Looking ahead to the second quarter, conventional DRAM prices are expected to decline by just 0-5% QoQ, while average DRAM pricing including HBM is forecast to rise by 3-8%, driven by increasing shipments of HBM3e 12hi.

PC and server DRAM prices to hold steady
In response to potential U.S. tariff hikes, major PC OEMs are requesting ODMs to increase production, accelerating DRAM depletion in their inventories. OEMs with lower inventory levels may raise procurement from suppliers in Q2 to ensure stable DRAM supply for the second half of 2025.

Micron Technology, Inc. (Nasdaq: MU) today announced results for its second quarter of fiscal 2025, which ended February 27, 2025.

Fiscal Q2 2025 highlights

• Revenue of $8.05 billion versus $8.71 billion for the prior quarter and $5.82 billion for the same period last year
• GAAP net income of $1.58 billion, or $1.41 per diluted share
• Non-GAAP net income of $1.78 billion, or $1.56 per diluted share
• Operating cash flow of $3.94 billion versus $3.24 billion for the prior quarter and $1.22 billion for the same period last year

"Micron delivered fiscal Q2 EPS above guidance and data center revenue tripled from a year ago," said Sanjay Mehrotra, Chairman, President and CEO of Micron Technology. "We are extending our technology leadership with the launch of our 1-gamma DRAM node. We expect record quarterly revenue in fiscal Q3, with DRAM and NAND demand growth in both data center and consumer-oriented markets, and we are on track for record revenue and significantly improved profitability in fiscal 2025."

SK hynix Inc. announced today that it has shipped the samples of 12-layer HBM4, a new ultra-high performance DRAM for AI, to major customers for the first time in the world. The samples were delivered ahead of schedule based on SK hynix's technological edge and production experience that have led the HBM market, and the company is to start the certification process for the customers. SK hynix aims to complete preparations for mass production of 12-layer HBM4 products within the second half of the year, strengthening its position in the next-generation AI memory market.

The 12-layer HBM4 provided as samples this time feature the industry's best capacity and speed which are essential for AI memory products. The product has implemented bandwidth capable of processing more than 2 TB (terabytes) of data per second for the first time. This translates to processing data equivalent to more than 400 full-HD movies (5 GB each) in a second, which is more than 60 percent faster than the previous generation, HBM3E.

AMD today launched the EPYC Embedded 9005 line of server processors in the embedded form-factor. These are non-socketed variants of the EPYC 9005 "Turin" server processors. The chips are intended for servers and other enterprise applications where processor replacements or upgradability are not a consideration. The EPYC Embedded 9005 "Turin" are otherwise every bit similar to the regular socketed EPYC 9005 series. These chips are based on a BGA version of the "Turin" chiplet-based processor, and powered by the "Zen 5" microarchitecture. Besides the BGA package, the EPYC Embedded 9005 series comes with a few features relevant to its form-factor and target use-cases.

To begin with, the EPYC Embedded 9005 "Turin" series comes with NTB (non-transparent bridging), a technology that enables high-performance data transfer between two processor packages across different memory domains. NTB doesn't use Infinity Fabric or even CXL, but a regular PCI-Express 5.0 x16 connection. It isn't intended to provide cache coherence, but to absorb faults across various memory domains. Next up, the series supports DRAM flush for enhanced power-loss mitigation. Upon detecting a power loss, the processor immediately dumps memory onto NVMe storage, before the machine turns off. On restart, the BIOS copies this memory dump from the NVMe SSD back to DRAM. Thirdly, the processors in the series support dual SPI flash interfaces, which enables system architects to embed lightweight operating systems directly onto a 64 MB SPI flash ROM, besides the primary SPI flash that stores the system BIOS. This lightweight OS can act like a bootloader for operating systems in other local storage devices.

TrendForce's latest research reveals that the NAND Flash market faced downward pressure in 4Q24 as PC and smartphone manufacturers continued inventory clearance efforts, leading to significant supply chain adjustments. Consequently, NAND Flash prices reversed downward, with ASP dropping 4% QoQ, while overall bit shipments declined by 2%. Total industry revenue fell 6.2% QoQ to US$16.52 billion.

Looking ahead to 1Q25, the traditional slow season effect remains unavoidable despite suppliers actively reducing production. Server and other key end-market inventory restocking has slowed, and with both order volumes and contract prices declining sharply. NAND Flash industry revenue is expected to drop by up to 20% QoQ. However, as production cuts take effect and prices stabilize, the NAND Flash market is expected to recover in the second half of 2025.

TrendForce's latest research reveals that global DRAM industry revenue surpassed US$28 billion in 4Q24, marking a 9.9% QoQ increase. This growth was primarily driven by rising contract prices for server DDR5 and concentrated shipments of HBM, leading to continued revenue expansion for the top three DRAM suppliers.

Most contract prices across applications were seen to have reversed downward. However, increased procurement of high-capacity server DDR5 by major American CSPs helped sustain price momentum for server DRAM.

Micron Technology, Inc., today announced it is the first in the industry to ship samples of its 1γ (1-gamma), sixth-generation (10 nm-class) DRAM node-based DDR5 memory designed for next-generation CPUs to ecosystem partners and select customers. This 1γ DRAM milestone builds on Micron's previous 1α (1-alpha) and 1β (1-beta) DRAM node leadership to deliver innovations that will power future computing platforms from the cloud to industrial and consumer applications to Edge AI devices like AI PCs, smartphones and automobiles. The Micron 1γ DRAM node will first be leveraged in its 16 Gb DDR5 DRAM and over time will be integrated across Micron's memory portfolio to meet the industry's accelerating demand for high-performance, energy-efficient memory solutions for AI. Designed to offer speed capabilities of up to 9200 MT/s, the 16 Gb DDR5 product provides up to a 15% speed increase and over 20% power reduction compared to its predecessor.

Inside sources—familiar with goings-ons at leading DRAM manufacturing firms—have predicted the end of DDR3 and DDR4 production lines. According to a DigiTimes Asia report (citing Nikkei), industry observers have noticed that the DRAM market is undergoing a so-called "shift." They believe that pricing trends are decreasing due to weak demand. Samsung Electronics, SK Hynix, and Micron are named as major players; allegedly involved in devising new strategies—in reaction to fluid market circumstances. The DigiTimes insider network proposes that the big three: "may phase out DDR3 and DDR4 by 2025...by the end of 2025...anticipating a future focused on advanced memory technologies." Older standards are falling out of favor, with DDR5 and high-bandwidth memory (HBM) on the ascent. Industry watchdogs reckon that possible DDR3 and DDR4 supply shortages could occur "post-summer 2025."

Taiwan's Nanya Technology has predicted that the overall DRAM market will "bottom out" within the first half of 2025. An eventual recovery is envisioned by the second quarter; AI-related demands could help drive up demand by a large margin. Additionally, Nanya points to improved inventory management and global economic stimulus. Taiwanese DRAM production houses are expected to pick up some slack, but an unnamed "key component distributor" anticipates serious after-effects. An anonymous source believes that the: "anticipated halt in production could lead to significant supply constraints, challenging market dynamics and impacting pricing strategies." Nanya Technology and Winbond Electronics produce specialized DRAM-types; therefore are not touted to be great gap fillers. The latter is reportedly reacting to weak demand for "mature" DDR products—DigiTimes commented on this development: "Winbond Electronics is advancing its manufacturing by transitioning to a 16 nm process in the latter half of 2025. This upgrade from the current 20 nm process, primarily used for 4 Gb DDR3 and DDR4, will enable Winbond to produce 8 Gb DDR memory."

During its first post-Western Digital spinoff investor day, SanDisk showed something it has been working on to tackle the AI sector. High-bandwidth flash (HBF) is a new memory architecture that combines 3D NAND flash storage with bandwidth capabilities comparable to high-bandwidth memory (HBM). The HBF design stacks 16 3D NAND BiCS8 dies using through-silicon vias, with a logic layer enabling parallel access to memory sub-arrays. This configuration achieves 8 to 16 times greater capacity per stack than current HBM implementations. A system using eight HBF stacks can provide 4 TB of VRAM to store large AI models like GPT-4 directly on GPU hardware. The architecture breaks from conventional NAND design by implementing independently accessible memory sub-arrays, moving beyond traditional multi-plane approaches. While HBF surpasses HBM's capacity specifications, it maintains higher latency than DRAM, limiting its application to specific workloads.

SanDisk has not disclosed its solution for NAND's inherent write endurance limitations, though using pSLC NAND makes it possible to balance durability and cost. The bandwidth of HBF is also unknown, as the company hasn't put out details yet. SanDisk Memory Technology Chief Alper Ilkbahar confirmed the technology targets read-intensive AI inference tasks rather than latency-sensitive applications. The company is developing HBF as an open standard, incorporating mechanical and electrical interfaces similar to HBM to simplify integration. Some challenges remain, including NAND's block-level addressing limitations and writing endurance constraints. While these factors make HBF unsuitable for gaming applications, the technology's high capacity and throughput characteristics align with AI model storage and inference requirements. SanDisk has announced plans for three generations of HBF development, indicating a long-term commitment to the technology.

V-COLOR Technology Inc. proudly introduces the groundbreaking CKD SCC (Speed Booster, Colorful Makeover and Cost effective) O CUDIMM RGB Filler Kit 2+2 (2 DRAM Modules + 2 Filler Modules) additions to its DDR5 memory lineup, redefining high-performance and customization. With the launch of the new SCC O CUDIMM RGB Filler Kit now compatible with Intel Core Ultra CPUs Motherboards 800 series up to 8800 MT/s and not only that, the already existent SCC UDIMM kit just got a massive upgrade now reaching 8000 MT/s with dual profiles for Intel XMP 3.0 and AMD EXPO. This new SCC line will be under the family of the already amazing XFinity series that continues to push the boundaries of memory innovation.

The latest CKD SCC O CUDIMM is optimized for Intel Core Ultra CPUs and Z890 series motherboards, offering unmatched performance and stability. With speeds reaching 8000 MT/s ~ 8200 MT/s for 32 GB (2x 16 GB) configurations and 7000 MT/s ~ 8800 MT/s for 48 GB (2x 24 GB) configurations. The latest lineup of SCC technology doesn't just revolutionize the new O CUDIMM memory modules; it also pushes the boundaries of already existing UDIMMs to unprecedented levels. Speeds now reach an impressive 7200 MT/s up to 8000 MT/s, while the addition of dual profiles ensures seamless compatibility and performance optimization for both AMD EXPO and Intel XMP 3.0 systems. This development bridges accessibility across platforms, offering next-level performance for enthusiasts and professionals alike.

The Semiconductor Industry Association (SIA) today announced global semiconductor sales hit $627.6 billion in 2024, an increase of 19.1% compared to the 2023 total of $526.8 billion. Additionally, fourth-quarter sales of $170.9 billion were 17.1% more than the fourth quarter of 2023, and 3.0% higher than the third quarter of 2024. And global sales for the month of December 2024 were $57.0 billion, a decrease of 1.2% compared to the November 2024 total. Monthly sales are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average. SIA represents 99% of the U.S. semiconductor industry by revenue and nearly two-thirds of non-U.S. chip firms.

"The global semiconductor market experienced its highest-ever sales year in 2024, topping $600 billion in annual sales for the first time, and double-digit market growth is projected for 2025," said John Neuffer, SIA president and CEO. "Semiconductors enable virtually all modern technologies - including medical devices, communications, defense applications, AI, advanced transportation, and countless others - and the long-term industry outlook is incredibly strong."

SK hynix Inc. announced today that it has acquired TISAX, the global automobile industry information security certification, for the first time in the memory industry. SK hynix has obtained TISAX for all domestic sites located in Icheon, Bundang and Cheongju, and has been internationally accepted for the security capabilities required by the global automobile industry. Through this, the company aims to accelerate the development of high-performance memory solutions essential for realizing AI-based future automobile technology.

With the expansion of the electric vehicle market, autonomous driving, and the development of connected car technology, the importance of electronic parts is growing rapidly. In line with these changes, automotive semiconductors, which are widely used in electric equipment, are positioned as major components of automobiles. In particular, automotive semiconductors are applied to key safety systems of automobiles such as ADAS, brake systems and engine control, requiring a higher level of reliability than general semiconductors. In addition, as hacking and malicious code attacks targeting automobiles have increased recently, systematic security management in the manufacturing process is being emphasized as well as strengthening the performance of semiconductors themselves.

Samsung Electronics today reported financial results for the fourth quarter and the fiscal year 2024. The Company posted KRW 75.8 trillion in consolidated revenue and KRW 6.5 trillion in operating profit in the quarter ended December 31, 2024. For the full year, it reported KRW 300.9 trillion in annual revenue and KRW 32.7 trillion in operating profit.

Although fourth quarter revenue and operating profit decreased on a quarter-on-quarter (QoQ) basis, annual revenue reached the second-highest on record, surpassed only in 2022. Meanwhile, operating profit was down KRW 2.7 trillion QoQ, due to soft market conditions especially for IT products, and an increase in expenditures including R&D. In the first quarter of 2025, while overall earnings improvement may be limited due to weakness in the semiconductors business, the Company aims to pursue growth through increased sales of smartphones with differentiated AI experiences, as well as premium products in the Device eXperience (DX) Division.

TechInsights has identified CXMT's new 16 nm DRAM chips in Gloway DDR-6000 UDIMM modules, confirming advancement in the Chinese memory industry. The CXMT 16 Gb DDR5 chip measures 67 square millimeters with a density of 0.239 Gb per square millimeter. The G4 DRAM cells are 20 percent smaller than CXMT's previous G3 generation. This follows the company's progression from 23 nm (G1) and 18 nm (G2) nodes. Despite this advancement, CXMT remains approximately three years behind Samsung, SK Hynix, and Micron in manufacturing capabilities. The Hefei-based company achieved this production milestone under US sanctions restricting access to certain manufacturing equipment and materials, setting it back years in gaining production of advanced memory nodes.

TechInsights found these chips in commercially available memory modules, confirming CXMT's entry into DDR5 production. DDR5 technology is projected to be the primary DRAM standard through 2027. The three major DRAM manufacturers have been producing DDR5 through multiple generations, with DDR5 now reaching 10,000 MT/s speeds. This represents CXMT's first DDR5 DRAM product to reach the consumer market. The chips meet basic compatibility requirements for current DDR5 specifications, meaning that the Chinese memory manufacturing has achieved "1z" memory manufacturing on its soil. This marks the second major news for the Chinese semiconductor industry, right after TechInsights also confirmed that YMTC has started shipping 292-layer NAND Flash. With domestic demand for memory and storage projected to remain strong, we wonder if the supply will exceed demand and allow some left-over chips for worldwide usage.

Kioxia Corporation, a world leader in memory solutions, today announced the open-source release of its new All-in-Storage ANNS with Product Quantization (AiSAQ) technology. A novel "approximate nearest neighbor" search (ANNS) algorithm optimized for SSDs, KIOXIA AiSAQ software delivers scalable performance for retrieval-augmented generation (RAG) without placing index data in DRAM - and instead searching directly on SSDs.

Generative AI systems demand significant compute, memory and storage resources. While they have the potential to drive transformative breakthroughs across various industries, their deployment often comes with high costs. RAG is a critical phase of AI that refines large language models (LLMs) with data specific to the company or application.