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Tachyum Boots Linux on Prodigy FPGA

Tachyum Inc. today announced that it has successfully executed the Linux boot process on the field-programmable gate array (FPGA) prototype of its Prodigy Universal Processor, in 2 months after taking delivery of the IO motherboard from manufacturing. This achievement proves the stability of the Prodigy emulation system and allows the company to move forward with additional testing before advancing to tape out.

Tachyum engineers were able to perform the Linux boot, execute a short user-mode program and shutdown the system on the fully functional FPGA emulation system. Not only does this successful test prove that the basic processor is stable, but interrupts, exceptions, timing, and system-mode transitions are, as well. This is a key milestone, which dramatically reduces risk, as booting and running large and complex pieces of software like Linux reliably on the Tachyum FPGA processor prototype shows that verification and hardware stability are past the most difficult turning point, and it is now obvious that verification and testing should successfully complete in the coming months. Designers are now shifting their attention to debug and verification processes, running hundreds of trillions of test cycles over the next few months, and running large scale user mode applications with compatibility testing to get the processor to production quality.

Lattice Semiconductor Announces Certus-NX FPGAs Optimized for Automotive Applications

Lattice Semiconductor, the low power programmable leader, today expanded its growing portfolio of automotive products with the announcement of versions of the Lattice Certus -NX FPGA family optimized for infotainment, advanced driver assistance systems (ADAS), and safety-focused applications. Built on the Lattice Nexus platform, these new Certus-NX devices combine automotive-grade features with best-in-class I/O density, power efficiency, small size, reliability, instant-on performance, and support for fast PCI Express (PCIe) and Gigabit Ethernet interfaces.

"Demand for automotive semiconductors is increasing as the ongoing trends towards automotive system electrification, autonomy, and connectivity have manufacturers looking for ways to deliver the advanced features and user experiences drivers are looking for in their next vehicle," said Jay Aggarwal, Director of Silicon Product Marketing, Lattice Semiconductor. "With class-leading performance and power efficiency, support for popular I/O standards in a small form factor, and high reliability, our Certus-NX general purpose FPGAs make a compelling silicon platform for the next-generation automotive applications car makers are eager to provide to their customers."

Penetration Rate of Ice Lake CPUs in Server Market Expected to Surpass 30% by Year's End as x86 Architecture Remains Dominant, Says TrendForce

While the server industry transitions to the latest generation of processors based on the x86 platform, the Intel Ice Lake and AMD Milan CPUs entered mass production earlier this year and were shipped to certain customers, such as North American CSPs and telecommunication companies, at a low volume in 1Q21, according to TrendForce's latest investigations. These processors are expected to begin seeing widespread adoption in the server market in 3Q21. TrendForce believes that Ice Lake represents a step-up in computing performance from the previous generation due to its higher scalability and support for more memory channels. On the other hand, the new normal that emerged in the post-pandemic era is expected to drive clients in the server sector to partially migrate to the Ice Lake platform, whose share in the server market is expected to surpass 30% in 4Q21.

TrendForce: Enterprise SSD Contract Prices Likely to Increase by 15% QoQ for 3Q21 Due to High SSD Demand and Short Supply of Upstream IC Components

The ramp-up of the Intel Ice Lake and AMD Milan processors is expected to not only propel growths in server shipment for two consecutive quarters from 2Q21 to 3Q21, but also drive up the share of high-density products in North American hyperscalers' enterprise SSD purchases, according to TrendForce's latest investigations. In China, procurement activities by domestic hyperscalers Alibaba and ByteDance are expected to increase on a quarterly basis as well. With the labor force gradually returning to physical offices, enterprises are now placing an increasing number of IT equipment orders, including servers, compared to 1H21. Hence, global enterprise SSD procurement capacity is expected to increase by 7% QoQ in 3Q21. Ongoing shortages in foundry capacities, however, have led to the supply of SSD components lagging behind demand. At the same time, enterprise SSD suppliers are aggressively raising the share of large-density products in their offerings in an attempt to optimize their product lines' profitability. Taking account of these factors, TrendForce expects contract prices of enterprise SSDs to undergo a staggering 15% QoQ increase for 3Q21.

Intel Reports Second-Quarter 2021 Financial Results

Intel Corporation today reported second-quarter 2021 financial results. "There's never been a more exciting time to be in the semiconductor industry. The digitization of everything continues to accelerate, creating a vast growth opportunity for us and our customers across core and emerging business areas. With our scale and renewed focus on both innovation and execution, we are uniquely positioned to capitalize on this opportunity, which I believe is merely the beginning of what will be a decade of sustained growth across the industry," said Pat Gelsinger, Intel CEO. "Our second-quarter results show that our momentum is building, our execution is improving, and customers continue to choose us for leadership products."

Xilinx Versal HBM Series with Integrated High Bandwidth Memory Tackles Big Data Compute Challenges in the Network and Cloud

Xilinx, Inc., the leader in adaptive computing, today introduced the Versal HBM adaptive compute acceleration platform (ACAP), the newest series in the Versal portfolio. The Versal HBM series enables the convergence of fast memory, secure connectivity, and adaptable compute in a single platform. Versal HBM ACAPs integrate the most advanced HBM2E DRAM, providing 820 GB/s of throughput and 32 GB of capacity for 8X more memory bandwidth and 63% lower power than DDR5 implementations. The Versal HBM series is architected to keep up with the higher memory needs of the most compute intensive, memory bound applications for data center, wired networking, test and measurement, and aerospace and defense.

"Many real-time, high-performance applications are critically bottlenecked by memory bandwidth and operate at the edge of their power and thermal limits," said Sumit Shah, senior director, Product Management and Marketing at Xilinx. "The Versal HBM series eliminates those bottlenecks to provide our customers with a solution that delivers significantly higher performance and reduced system power, latency, form factor, and total cost of ownership for data center and network operators."

UK Competition Regulator Greenlights AMD's Xilinx Acquisition

AMD's ambitious acquisition of Xilinx, makers of cutting-edge FPGAs, has been approved by the UK Competition and Markets Authority. This would go down as AMD's biggest tech acquisition, as the company is forking out USD $35 billion in stock. If it goes through, the AMD-Xilinix combine will see current AMD shareholders own 74% of the company, and current Xilinx shareholders with the other 26%. Both companies announced in April 2021 that their shareholders "overwhelmingly" approved of the deal. The Xilinx buyout by AMD isn't too far behind in terms of value, to NVIDIA's ambitious $40 billion bid to acquire Arm Holdings.
Many Thanks to DeathtoGnomes for the tip

Intel Makes Changes to Executive Team, Raja got Promoted

Intel CEO Pat Gelsinger announced the addition of two new technology leaders to its executive leadership team, as well as several changes to Intel business units. Current Intel executives Sandra Rivera and Raja Koduri will each take on new senior leadership roles, and technology industry veterans Nick McKeown and Greg Lavender will join the company.

"Since re-joining Intel, I have been impressed with the depth of talent and incredible innovation throughout the company, but we must move faster to fulfill our ambitions," said Gelsinger. "By putting Sandra, Raja, Nick and Greg - with their decades of technology expertise - at the forefront of some of our most essential work, we will sharpen our focus and execution, accelerate innovation, and unleash the deep well of talent across the company."

Intel Announces Agilex FPGAs for 5G Deployments

Today as part of its MWC 2021 virtual event, Intel showcased multiple groundbreaking network deployments powered by its technology and unveiled the Intel Network Platform. It also announced new additions to its leading product portfolio for 5G and edge, reaffirming its position as the leading network silicon provider. The company confirmed its leadership in virtual radio access network (vRAN), noting nearly all commercial vRAN deployments are running on Intel technology. In the years ahead, it sees global vRAN base station deployments scale, from hundreds to "hundreds of thousands," and eventually millions.

"Network transformation is critical to unleash the possibilities of 5G and maximize the rise of the edge to create new and better business outcomes for our customers across the globe. As the leading network silicon provider, we have been driving this shift to virtualizing the core to access to edge, and implementing edge computing capabilities with our decade of experience, to power our society's digital revolution," said Dan Rodriguez, Intel corporate vice president, Network Platforms Group.

Intel Unveils the Infrastructure Processing Unit (IPU)

Today during the Six Five Summit, Intel unveiled its vision for the infrastructure processing unit (IPU), a programmable networking device designed to enable cloud and communication service providers to reduce overhead and free up performance for central processing units (CPUs). With an IPU, customers will better utilize resources with a secure, programmable, stable solution that enables them to balance processing and storage.

"The IPU is a new category of technologies and is one of the strategic pillars of our cloud strategy. It expands upon our SmartNIC capabilities and is designed to address the complexity and inefficiencies in the modern data center. At Intel, we are dedicated to creating solutions and innovating alongside our customer and partners—the IPU exemplifies this collaboration," said Guido Appenzeller, chief technology officer, Data Platforms Group, Intel.

Tachyum Receives Prodigy FPGA DDR-IO Motherboard to Create Full System Emulation

Tachyum Inc. today announced that it has taken delivery of an IO motherboard for its Prodigy Universal Processor hardware emulator from manufacturing. This provides the company with a complete system prototype integrating CPU, memory, PCI Express, networking and BMC management subsystems when connected to the previously announced field-programmable gate array (FPGA) emulation system board.

The Tachyum Prodigy FPGA DDR-IO Board connects to the Prodigy FPGA CPU Board to provide memory and IO connectivity for the FPGA-based CPU tiles. The fully functional Prodigy emulation system is now ready for further build out, including Linux boot and incorporation of additional test chips. It is available to customers to perform early testing and software development prior to a full four-socket reference design motherboard, which is expected to be available Q4 2021.

UK Competition Regulator Probes AMD's Buyout of Xilinx

British competition regulator Competition and Markets Authority (CMA) on Monday, launched an enquiry into the ramifications of AMD's buy-out of FPGA maker Xilinx. The agency is soliciting opinions from the public on whether the $35 billion all-stock purchase will make goods and services less competitive for the UK. Unlike NVIDIA's Arm buyout the Xilinx acquisition is seeing no opposition from tech-giants. The Register notes that AMD could combine Xilinx's FPGAs with its x86 CPU and RDNA SIMD to create highly customizable HPC accelerators. AMD president Dr Lisa Su said "By combining our world-class engineering team and deep domain expertise, we will create an industry leader with the vision, talent and scale to define the future of high performance computing."

AMD and Xilinx Stockholders Overwhelmingly Approve AMD's Acquisition of Xilinx

AMD (NASDAQ:AMD) and Xilinx, Inc. (NASDAQ:XLNX) announced today that stockholders voted to approve their respective proposals relating to the pending acquisition of Xilinx by AMD. The acquisition will bring together two industry leaders with complementary product portfolios and customers, combining CPUs, GPUs, FPGAs, Adaptive SoCs and deep software expertise to enable leadership in computing platforms for cloud, edge and end devices. Together, the combined company will have the ability to capitalize on opportunities spanning some of the industry's most important growth segments, including data centers, gaming, PCs, communications, automotive, industrial, aerospace and defense.

"For several years, AMD has successfully executed our long-term growth strategy and deepened the company's partnerships to drive high performance computing leadership," said Dr. Lisa Su, AMD president and CEO. "The acquisition of Xilinx marks the next leg in our journey to make AMD the strategic partner of choice for the largest and most important technology companies in the world as an industry leader with the vision, talent and scale to support their future innovation."

Intel and DARPA Develop Secure Structured ASIC Chips Made in the US

Intel and the U.S. Defense Advanced Research Projects Agency (DARPA) today announced a three-year partnership to advance the development of domestically manufactured structured Application Specific Integrated Circuit (ASIC) platforms. The Structured Array Hardware for Automatically Realized Applications (SAHARA) partnership enables the design of custom chips that include state-of-the-art security countermeasure technologies. A reliable, secure, domestic source of leading-edge semiconductors remains critical to the U.S.

"We are combining our most advanced Intel eASIC structured ASIC technology with state-of-the-art data interface chiplets and enhanced security protection, and it's all being made within the U.S. from beginning to end. This will enable defense and commercial electronics systems developers to rapidly develop and deploy custom chips based on Intel's advanced 10 nm semiconductor process," said José Roberto Alvarez, senior director, CTO Office, Intel Programmable Solutions Group.

Xilinx Announces Cost-Optimized UltraScale+ Portfolio for Ultra-Compact, High-Performance Edge Compute

Xilinx, Inc., the leader in adaptive computing, today announced the company has expanded its UltraScale+ portfolio for markets with new applications that require ultra-compact and intelligent edge solutions. With form factors that are 70 percent smaller than traditional chip-scale packaging, the new Artix and Zynq UltraScale+ devices can now address a wider range of applications within the industrial, vision, healthcare, broadcast, consumer, automotive, and networking markets.

As the world's only hardware adaptable cost-optimized portfolio based on 16 nanometer technology, Artix and Zynq UltraScale+ devices are available in TSMC's state-of-the-art InFO (Integrated Fan-Out) packaging technology. Using InFO, Artix and Zynq UltraScale+ devices meet the need for intelligent edge applications by delivering high-compute density, performance-per-watt, and scalability in compact packaging options.

Xilinx Revolutionizes the Modern Data Center with Software-Defined, Hardware Accelerated Alveo SmartNICs

Addressing the demands of the modern data center, Xilinx, Inc. (NASDAQ: XLNX) today announced a range of new data center products and solutions, including a new family of Alveo SmartNICs, smart world AI video analytics applications, an accelerated algorithmic trading reference design for sub-microsecond trading, and the Xilinx App Store.

Today's most demanding and complex applications, from networking and AI analytics to financial trading, require low-latency and real-time performance. Achieving this level of performance has been limited to expensive and lengthy hardware development. With these new products and solutions, Xilinx is eliminating the barriers for software developers to quickly create and deploy software-defined, hardware accelerated applications on Alveo accelerator cards.

AMD Applies for CPU Design Patent Featuring Core-Integrated FPGA Elements

AMD has applied for a United States Patent that describes a CPU design with FPGA (Field-Programmable Gate Array) elements integrated into its core design. Titled "Method and Apparatus for Efficient Programmable Instructions in Computer Systems", the patent application describes a CPU with FPGA elements inscribed into its very core design, where the FPGA elements actually share CPU resources such as registers for floating-point and integer execution units. This patent undoubtedly comes in the wake of AMD's announced Xilinx acquisition plans, and brings FPGA and CPU marriages to a whole other level. FPGA,as the name implies, are hardware constructions which can reconfigure themselves according to predetermined tables (which can also be updated) to execute desired and specific functions.

Intel have themselves already shipped a CPU + FPGA combo in the same package; the company's Xeon 6138P, for example, includes an Arria 10 GX 1150 FPGA on-package, offering 1,150,000 logic elements. However, this is simply a CPU + FPGA combo on the same substrate; not a native, core-integrated FPGA design. Intel's product has severe performance and latency penalties due to the fact that complex operations performed in the FPGA have to be brought out of the CPU, processed in the FPGA, and then its results have to be returned to the CPU. AMD's design effectively ditches that particular roundabout, and should thus allow for much higher performance.

Tachyum Prodigy Software Emulation Systems Now Available for Pre-Order

Tachyum Inc. today announced that it is signing early adopter customers for the software emulation system for its Prodigy Universal Processor, customers may begin the process of native software development (i.e. using Prodigy Instruction Set Architecture) and porting applications to run on Prodigy. Prodigy software emulation systems will be available at the end of January 2021.

Customers and partners can use Prodigy's software emulation for evaluation, development and debug, and with it, they can begin to transition existing applications that demand high performance and low power to run optimally on Prodigy processors. Pre-built systems include a Prodigy emulator, native Linux, toolchains, compilers, user mode applications, x86, ARM and RISC-V emulators. Software updates will be issued as needed.

AWS Leverages Habana Gaudi AI Processors

Today at AWS re:Invent 2020, AWS CEO Andy Jassy announced EC2 instances that will leverage up to eight Habana Gaudi accelerators and deliver up to 40% better price performance than current graphics processing unit-based EC2 instances for machine learning workloads. Gaudi accelerators are specifically designed for training deep learning models for workloads that include natural language processing, object detection and machine learning training, classification, recommendation and personalization.

"We are proud that AWS has chosen Habana Gaudi processors for its forthcoming EC2 training instances. The Habana team looks forward to our continued collaboration with AWS to deliver on a roadmap that will provide customers with continuity and advances over time." -David Dahan, chief executive officer at Habana Labs, an Intel Company.

BittWare Launches IA-840F with Intel Agilex FPGA and Support for oneAPI

BittWare, a Molex company, today unveiled the IA-840F, the company's first Intel Agilex -based FPGA card designed to deliver significant performance-per-watt improvements for next-generation data center, networking and edge compute workloads. Agilex FPGAs deliver up to 40% higher performance or up to 40% lower power, depending on application requirements. BittWare maximized I/O features using the Agilex chip's unique tiling architecture with dual QSFP-DDs (4× 100G), PCIe Gen4 x16, and three MCIO expansion ports for diverse applications. BittWare also announced support for Intel oneAPI, which enables an abstracted development flow for dramatically simplified code re-use across multiple architectures.

"Modern data center workloads are incredibly diverse, requiring customers to implement a mix of scalar, vector, matrix and spatial architectures," said Craig Petrie, vice president of marketing for BittWare. "The IA-840F ensures that customers can quickly and easily exploit the advanced features of the Intel Agilex FPGA. For those customers who prefer to develop FPGA applications at an abstracted level, we are including support for oneAPI. This new unified software programming environment allows customers to program the Agilex FPGA from a single code base with native high-level language performance across architectures."

Intel Sells Its Power Management Chip Business, Enpirion, to Mediatek for $85 Million

Intel continues to "shed fat" on its business portfolio. After last year's sale of its smartphone modem chip business to Apple, the company is now parting ways with its power management circuitry division - Enpirion - and offloading it to Richtek, a division of Taiwanese MediaTek. The sale price of $85 million is a drop in the bucket for Intel's overall bottom line, so it's not a way for the company to cash in some desperately needed money - all accounts of Intel's troubles in the wake of its semiconductor manufacturing issues and AMD's market resurgence pale in comparison to Intel's revenues.

This actually looks like a company that's actually streamlining its R&D expenditures and focusing on execution for the markets Intel sees as most important for today and for tomorrow. Intel's Enpirion focuses on building power management chips for FPGA circuits, SoCs, CPUs, and ASICs, and will now serve to bolster MediaTek's SoC business while allowing the Taiwanese company to expand and diversify its business portfolio, even as Intel focuses on their core competencies.

Intel and Argonne Developers Carve Path Toward Exascale 

Intel and Argonne National Laboratory are collaborating on the co-design and validation of exascale-class applications using graphics processing units (GPUs) based on Intel Xe-HP microarchitecture and Intel oneAPI toolkits. Developers at Argonne are tapping into Intel's latest programming environments for heterogeneous computing to ensure scientific applications are ready for the scale and architecture of the Aurora supercomputer at deployment.

"Our close collaboration with Argonne is enabling us to make tremendous progress on Aurora, as we seek to bring exascale leadership to the United States. Providing developers early access to hardware and software environments will help us jumpstart the path toward exascale so that researchers can quickly start taking advantage of the system's massive computational resources." -Trish Damkroger, Intel vice president and general manager of High Performance Computing.

Xilinx Partners with Samsung to Develop SmartSSD CSD

Xilinx, Inc. and Samsung Electronics Co., Ltd. today announced the availability of the Samsung SmartSSD Computational Storage Drive (CSD). Powered by Xilinx FPGAs, the SmartSSD CSD is the industry's first adaptable computational storage platform providing the performance, customization, and scalability required by data-intensive applications.

Xilinx will showcase the SmartSSD CSD and partner solutions at the Flash Memory Summit Virtual Conference and Expo taking place November 10-12. The SmartSSD CSD is a flexible, programmable storage platform that developers can use to create a variety of unique and scalable accelerators that solve a broad range of data center problems. It empowers a new breed of software developers to easily build innovative hardware-accelerated solutions in familiar high-level languages. The SmartSSD CSD accelerates data processing performance by 10x or more for applications such as database management, video processing, artificial intelligence layers, complex search, and virtualization.

Intel Introduces new Security Technologies for 3rd Generation Intel Xeon Scalable Platform, Code-named "Ice Lake"

Intel today unveiled the suite of new security features for the upcoming 3rd generation Intel Xeon Scalable platform, code-named "Ice Lake." Intel is doubling down on its Security First Pledge, bringing its pioneering and proven Intel Software Guard Extension (Intel SGX) to the full spectrum of Ice Lake platforms, along with new features that include Intel Total Memory Encryption (Intel TME), Intel Platform Firmware Resilience (Intel PFR) and new cryptographic accelerators to strengthen the platform and improve the overall confidentiality and integrity of data.

Data is a critical asset both in terms of the business value it may yield and the personal information that must be protected, so cybersecurity is a top concern. The security features in Ice Lake enable Intel's customers to develop solutions that help improve their security posture and reduce risks related to privacy and compliance, such as regulated data in financial services and healthcare.

AMD to Enter the FPGA Market, in Advanced Talks to Acquire Xilinx

AMD is planning to enter the FPGA market by buying out one of Intel's largest competitors, Xilinx. The Wall Street Journal reports that AMD is in "advanced talks" to acquire the San Jose-based firm which specializes in FPGAs of all shapes and sizes, including large, high logic cell-count FPGAs under the Virtex UltraScale brand, the main competitor to Intel's Stratix 10. Xilinx is valued at $26 billion, although analysts estimate the AMD acquisition to go down at close to $30 billion, making it one of the largest tech acquisitions of the year, after NVIDIA's buyout of Arm from Softbank. An FPGA lineup would give AMD a near complete portfolio of computing hardware IP: CPUs with x86 and Arm licenses, GPUs, GPU-based scalar compute processors, semi-custom SoCs, low-power media processors, and now FPGA.
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