Thursday, April 26th 2012

GLOBALFOUNDRIES Fab 8 Adds Tools to Enable 3D Chip Stacking at 20nm and Beyond

GLOBALFOUNDRIES today announced a significant milestone on the road to enabling 3D stacking of chips for next-generation mobile and consumer applications. At its Fab 8 campus in Saratoga County, NY, the company has begun installation of a special set of production tools to create Through-Silicon Vias (TSVs) in semiconductor wafers processed on the company's leading-edge 20nm technology platform. The TSV capabilities will allow customers to stack multiple chips on top of each other, providing another avenue for delivering the demanding requirements of tomorrow's electronic devices.

Essentially vertical holes etched in silicon and filled with copper, TSVs enable communication between vertically stacked integrated circuits. For example, the technology could allow circuit designers to place stacks of memory chips on top of an application processor, which can dramatically increase memory bandwidth and reduce power consumption-a key challenge for designers of the next generation of mobile devices such as smartphones and tablets.

At leading-edge nodes, the adoption of 3D stacking of integrated circuits is increasingly being viewed as an alternative to traditional technology node scaling at the transistor level. However, as new packaging technologies are introduced, the complexity of chip-package interaction is going up significantly and it is increasingly difficult for foundries and their partners to be able to deliver end-to-end solutions that meet the requirements of the broad range of leading-edge designs.

"To help address these challenges on new silicon nodes, we are engaging early with partners to jointly develop packaging solutions that will enable the next wave of innovation in the industry," said Gregg Bartlett, chief technology officer of GLOBALFOUNDRIES. "Our approach is broad and collaborative, giving customers maximum choice and flexibility, while delivering cost savings, faster time-to-volume, and a reduction in the technical risk associated with developing new technologies. With the installation of TSV capabilities for 20nm technology in Fab 8, we are adding an important capability that will be supplemented by our joint development and manufacturing partnerships with companies across the semiconductor ecosystem, from design to assembly and test."

GLOBALFOUNDRIES' new Fab 8 campus stands as one of the most technologically advanced wafer fabs in the world and the largest leading-edge semiconductor foundry in the United States. The site is focused on leading-edge manufacturing at 32/28nm and below, with 20nm technology development well underway. The first full-flow silicon with TSVs is expected to start running at Fab 8 in Q3 2012.
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6 Comments on GLOBALFOUNDRIES Fab 8 Adds Tools to Enable 3D Chip Stacking at 20nm and Beyond

One double i7 with a double 7970 and a diet coke please!
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20nm...wouldn't that means graphics?
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No mention of 22nm... So AMD is skipping 22nm in favor of 20nm for Steamroller?
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An APU with stacked on-die memory for the GPU is exactly what AMD needs. It will be a while before 20nm is available though.
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Bird of Prey
TSVs are what generally Intels Trigate is. Its not true 3D chip design but its pretty darn close, at least thats what whats his face that contributes to Maximum PC said.
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Glo fo does have its version of trigate as tri gate is predominantly Soi tech ,this is different, TSV to me is an iner chip interconnect to allow two stacked chips to comunicate its the stacked bit thats new the upper most chip would have inherent limitations though surely as it has to deal with additional heat from lower Ic's , i can see them using the bottom layer for memory and the top for cores as they would now be built up on insulator anyway and then their heat would be removed more efficiently.

A tsv Analog (exact) would be the small copper holed dots on motherboards that allow for between layer comunication and paths
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