Sunday, December 16th 2018

ECS LIVA Z2L is a Palm-sized Compact Desktop with GPIO

ECS today rolled out the LIVA Z2L, a palm-size compact desktop with something in it for electronics hobbyists - a GPIO header. Driven by Intel Pentium/Celeron "Gemini Lake" SoCs, these desktops measure 132 mm x 118 mm x 56.4 mm (WxDxH), and feature VESA mounts, so you could tuck them away behind your display. The unit is completely fanless, and draws power from an external power adapter. Connectivity includes four USB 3.0 ports, including a type-C, two USB 2.0 ports, D-Sub and HDMI display outputs, gigabit Ethernet, and 802.11ac WLAN. Under the hood, the "Gemini Lake" SoC is wired to 4 GB of LPDDR4 memory over two SODIMM slots (single channel), and storage is care of a 64 GB eMMC device that can juggle hot data from a 2.5-inch HDD. The company didn't reveal pricing.
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13 Comments on ECS LIVA Z2L is a Palm-sized Compact Desktop with GPIO

#1
TheLostSwede
So is the GPIO header via Ardunio again, as what LattePanda does? As technically Intel doesn't give user access to these things.

Also note that the PCB and the device have different port layout at the rear.
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#2
kastriot
I guess it's priced like a middle range desktop too.
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#3
silentbogo
TheLostSwede, post: 3961882, member: 3382"
So is the GPIO header via Ardunio again, as what LattePanda does? As technically Intel doesn't give user access to these things.
Most likely GPIO wired directly to SoC. Here's a photo of Z2 motherboard with unpopulated GPIO on the right.

Regarding Intel - you are not correct. People are just too lazy to do research or forget about the olden days of doing blinky on an LPT port.

TheLostSwede, post: 3961882, member: 3382"
Also note that the PCB and the device have different port layout at the rear.
It's ECS being ECS. Even the product page isn't completely finished yet. If they ever get to photos and tech docs, it'll be no sooner than 2020. Most of their niche products still don't have the product/support page, but at least their support is generous enough to share stuff if you ask nicely (got their raw BIOS dumps and some technical info without resorting to higher tier support).

kastriot, post: 3961888, member: 165334"
I guess it's priced like a middle range desktop too.
A base config of Z2 starts at $200, so it's gonna be a few more bucks for GPIO header... :banghead:
Kinda expensive for this kind of hardware. Intel NUC kit with Gemini Lake Pentium J5005 starts at $170 w/ newer WiFi/BT dongle (but no eMMC).
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#4
Frick
Fishfaced Nincompoop
Gimme that board without the housing and with an extra NIC, and LVDS.
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#5
TheLostSwede
silentbogo, post: 3961914, member: 141875"
Most likely GPIO wired directly to SoC. Here's a photo of Z2 motherboard with unpopulated GPIO on the right.

Regarding Intel - you are not correct. People are just too lazy to do research or forget about the olden days of doing blinky on an LPT port.


It's ECS being ECS. Even the product page isn't completely finished yet. If they ever get to photos and tech docs, it'll be no sooner than 2020. Most of their niche products still don't have the product/support page, but at least their support is generous enough to share stuff if you ask nicely (got their raw BIOS dumps and some technical info without resorting to higher tier support).


A base config of Z2 starts at $200, so it's gonna be a few more bucks for GPIO header... :banghead:
Kinda expensive for this kind of hardware. Intel NUC kit with Gemini Lake Pentium J5005 starts at $170 w/ newer WiFi/BT dongle (but no eMMC).
Sorry, how am I not correct? Intel simply doesn't allow user access to GPIOs. A parallel port (blinky LED, pfff, I made my own parallel port sound card) or a serial port isn't a GPIO interface.
Please show me some documentation from Intel that enables user access and instructions on how to interact with GPIOs on any single Intel device. I know of none.
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#6
bug
So, make it as small as possible, but throw a DSub in for good measure. Makes total sense.

Edit: And why is GPIO a big deal? What can you do with it?
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#9
silentbogo
TheLostSwede, post: 3962008, member: 3382"
Please show me some documentation from Intel that enables user access and instructions on how to interact with GPIOs on any single Intel device. I know of none.
If you need at least one, here it is:
https://ark.intel.com/products/78576/Intel-NUC-Board-DE3815TYBE
"Custom Solutions Header" is your GPIO.

If you've ever disassembled a PoS terminal - those also have a small GPIO breakout(s) which controls various stuff like opening a cash drawer, triggering some external device, or interfacing an SPI credit card reader etc. None of these platforms have "Arduino" soldered in or having a dedicated IC just to handle GPIO, cause it's cheaper to use whatever you already have.

If you have a system with exposed non-reserved GPIO, there are ways. On Linux you can get access to SoC/PCH/SuperI/O GPIO via sysfs. If drivers are not existent, then there are some other ways.
On Windows you would need a vendor-specific GPIO driver (which intel provides for some of their industrial mini-PCs), or you can hack and slash some Bay Trail or Cherry Trail board, get GPIO off the SoC BGA fanout and run Windows 10 IoT on it (Braswell, Bay Trail, Cherry Trail and others are supported).

TheLostSwede, post: 3962008, member: 3382"
A parallel port (blinky LED, pfff, I made my own parallel port sound card) or a serial port isn't a GPIO interface.
You can bit-bang any low-speed serial/parallel bus on LPC, you can toggle individual data pins, so it's kida GPIO by definition. Slow and small, but still a GPIO.
Your LPT DAC is just an example how GP this I/O actually is.
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#10
TheLostSwede
silentbogo, post: 3962077, member: 141875"
If you need at least one, here it is:
https://ark.intel.com/products/78576/Intel-NUC-Board-DE3815TYBE
"Custom Solutions Header" is your GPIO.

If you've ever disassembled a PoS terminal - those also have a small GPIO breakout(s) which controls various stuff like opening a cash drawer, triggering some external device, or interfacing an SPI credit card reader etc. None of these platforms have "Arduino" soldered in or having a dedicated IC just to handle GPIO, cause it's cheaper to use whatever you already have.

If you have a system with exposed non-reserved GPIO, there are ways. On Linux you can get access to SoC/PCH/SuperI/O GPIO via sysfs. If drivers are not existent, then there are some other ways.
On Windows you would need a vendor-specific GPIO driver (which intel provides for some of their industrial mini-PCs), or you can hack and slash some Bay Trail or Cherry Trail board, get GPIO off the SoC BGA fanout and run Windows 10 IoT on it (Braswell, Bay Trail, Cherry Trail and others are supported).


You can bit-bang any low-speed serial/parallel bus on LPC, you can toggle individual data pins, so it's kida GPIO by definition. Slow and small, but still a GPIO.
Your LPT DAC is just an example how GP this I/O actually is.
Plenty things have useless headers that claim to support something, but without software support, it's a useless header.

Again, locked down platforms with custom applications, not open to general usage.

Even Odroid didn't add GPIO's, there's serial, parallel and I2C, as that you can access without some custom software, but GPIO's in the way you can access them on an ARM SoC, not so much - https://www.cnx-software.com/2018/10/19/odroid-h2-intel-celeron-j4150-development-board/

This is why I asked the question, since I doubt it's a GPIO header.
Posted on Reply
#11
Papahyooie
A GPIO header being useless due to lack of software support is still a GPIO header.
Posted on Reply
#12
silentbogo
TheLostSwede, post: 3962146, member: 3382"
Even Odroid didn't add GPIO's, there's serial, parallel and I2C, as that you can access without some custom software, but GPIO's in the way you can access them on an ARM SoC, not so much - https://www.cnx-software.com/2018/10/19/odroid-h2-intel-celeron-j4150-development-board/
It's not my fault that Hardkernel guys ran out of space and only routed a couple of UARTs from a nearby SuperI/O.
N4000 has over 200 configurable GPIO pins, which you can read all about in a datasheet, which is also available on Intel's site. Even if they can't route off the SoC, they could've used spare pins on that same ITE multi. Maybe they've decided it's not worth it, cause it's meant to be an HTPC platform... who knows.

I get what you are trying to say: finding info on programming hardware for x86 is hard and confusing. But hard does not mean impossible.
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#13
GC_PaNzerFIN
TheLostSwede, post: 3962008, member: 3382"
Sorry, how am I not correct? Intel simply doesn't allow user access to GPIOs. A parallel port (blinky LED, pfff, I made my own parallel port sound card) or a serial port isn't a GPIO interface.
Please show me some documentation from Intel that enables user access and instructions on how to interact with GPIOs on any single Intel device. I know of none.
What a bunch of BS. Most of Intel Atom SoCs and even higher end Desktop CPU ones support exporting some of the GPIOs (that are not already mapped to any function) to Linux when they are enabled on Device Tree. They are not *easy to use by the average Joe/Jane home user, but since you asked examples, I will give you few which you can verify easily: Intel Edison and Intel Joule.
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