Monday, January 24th 2022

Ceremorphic Exits Stealth Mode; Unveils Technology Plans to Deliver a New Architecture Specifically Designed for Reliable Performance Computing

Armed with more than 100 patents and leveraging multi-decade expertise in creating industry-leading silicon systems, Ceremorphic Inc. today announced its plans to deliver a complete silicon system that provides the performance needed for next-generation applications such as AI model training, HPC, automotive processing, drug discovery, and metaverse processing. Designed in advanced silicon geometry (TSMC 5 nm node), this new architecture was built from the ground up to solve today's high-performance computing problems in reliability, security and energy consumption to serve all performance-demanding market segments.

Ceremorphic was founded in April 2020 by industry-veteran Dr. Venkat Mattela, the Founding CEO of Redpine Signals, which sold its wireless assets to Silicon Labs, Inc. in March 2020 for $308 million. Under his leadership, the team at Redpine Signals delivered breakthrough innovations and industry-first products that led to the development of an ultra-low-power wireless solution that outperformed products from industry giants in the wireless space by as much as 26 times on energy consumption. Ceremorphic leverages its own patented multi-thread processor technology ThreadArch combined with cutting-edge new technology developed by the silicon, algorithm and software engineers currently employed by Ceremorphic. This team is leveraging its deep expertise and patented technology to design an ultra-low-power training supercomputing chip.
"Having developed many innovations in multi-thread processing, algorithm driven VLSI, reliable performance circuits, low-energy interface circuits, quantum resistant security microarchitecture, and new device architectures beyond CMOS, Ceremorphic is well on its way to accomplish our goals," said Venkat Mattela, Founder and CEO of Ceremorphic. "The challenges this market faces with 'reliable performance computing' cannot be solved with existing architectures, but rather needs a completely new architecture built specifically to provide reliability, security, energy efficiency, and scalability."

Added Mattela, "We strongly believe that building a technology foundation is key to developing highly differentiated products that can lead the industry. We proved that in the wireless space with Redpine Signals and we are now doing the same thing in the computing space with Ceremorphic."

"I am very impressed with the Ceremorphic approach to solving some of the key challenges in the reliability and performance computing space today," said Subhasish Mitra, Professor of Electrical Engineering and of Computer Science at Stanford University. "Reliable performance computing is absolutely something this industry needs and the approach that Ceremorphic is pursuing is a significant step in the right direction."

Hierarchical Learning Processor (HLP) deploys the right processing system for optimal power performance operation. Key features of the QS 1 include the following:
  • Custom Machine Learning Processor (MLP) running at 2 GHz
  • Custom FPU running at 2 GHz
  • Patented Multi-thread processing macro-architecture, ThreadArch based RISC -V processor for proxy processing (1 GHz)
  • Custom video engines for Metaverse Processing (1 GHz) along with M55 v1 core from ARM
  • Custom designed x16 PCIe 6. 0 / CXL 3.0 connectivity interface
  • Open AI framework software support with optimized compiler and application libraries
  • Soft error rate: (100,000)-1
The Ceremorphic architecture has been designed to scale across multiple compute intensive markets and applications, including AI training supercomputing, data center processing, automotive, metaverse processing, robotics and life sciences. For more information on each application area, visit the Ceremorphic applications webpage
Source: Ceremorphic
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20 Comments on Ceremorphic Exits Stealth Mode; Unveils Technology Plans to Deliver a New Architecture Specifically Designed for Reliable Performance Computing

#1
CallandorWoT
I wonder if this will effect Nvidia's heavy AI/hospital leaning markets, they never really had competition before to my knowledge. This being on 5nm seems like competition, or is AI several markets not just one?
Posted on Reply
#2
TheLostSwede
lynx29I wonder if this will effect Nvidia's heavy AI/hospital leaning markets, they never really had competition before to my knowledge. This being on 5nm seems like competition, or is AI several markets not just one?
AI is a buzzword.
This is machine learning and yes, it should be able to compete with Nvidia in some things, assuming it delivers in terms of performance.
Posted on Reply
#3
CallandorWoT
TheLostSwedeAI is a buzzword.
This is machine learning and yes, it should be able to compete with Nvidia in some things, assuming it delivers in terms of performance.
oh sweet mama, those leather jackets are going to need some polishing!!! :roll: :roll: :roll: :roll:
Posted on Reply
#4
DeathtoGnomes
TheLostSwedeAI is a buzzword.
This is machine learning and yes, it should be able to compete with Nvidia in some things, assuming it delivers in terms of performance.
I'd say so, it reads as AI is secondary notion after seeing other applications, besides, we know how its hard to break into a field with established vendors, so yea they would have to directly compete with nvidias ai and not just on price.
Posted on Reply
#5
mechtech
"ThreadArch based RISC -V processor"

Until there is a widespread OS like windows for RISC, I don't think we'll see this in the regular world??

Be interesting if there was a RISC windows OS, nothing like having more variety to choose from.
Posted on Reply
#6
TheoneandonlyMrK
I didn't realize RISC V was the answer to the whole world's problems,
Slightly nebulous pr waffle to me, Oi bet there's a funding round on, until they're actually changing the world or have something to show I think it debatable even.
Posted on Reply
#7
zlobby
They say security but the word is mentioned just once in the entire article.

X Doubt
Posted on Reply
#8
Mussels
Freshwater Moderator
Means nothing to us, but they sound like they've achieved some good breakthroughs in the past
Sounds like a plugin device with a bunch of CPU architectures, and when given tasks to do it assigns them to the most efficient core design

Kinda where i see all PC devices going in the next 10-20 years, theres no reason we cant use a basic ARM64 CPU to run our entire OS, with dedicated extra hardware for more demanding CPU tasks (you know... exactly like how we use a GPU)
Posted on Reply
#9
Crackong
May I ask what is "Reliable Performance Computing" ?

Is there any "Unreliable Performance Computing" as well ?
Posted on Reply
#10
csgabe
Yes there is, it's called Windows.
Posted on Reply
#11
big_glasses
CrackongMay I ask what is "Reliable Performance Computing" ?

Is there any "Unreliable Performance Computing" as well ?
same thoughts.
When just reading the header, I presumed it would be some special CPU for space. Where CPU reliability is a real concern
Posted on Reply
#12
TheLostSwede
big_glassessame thoughts.
When just reading the header, I presumed it would be some special CPU for space. Where CPU reliability is a real concern
The last bullet point explains it. As in, they claim to have very low error rate compared to other processors.
  • Soft error rate: (100,000)-1
Posted on Reply
#13
big_glasses
TheLostSwedeThe last bullet point explains it. As in, they claim to have very low error rate compared to other processors.
  • Soft error rate: (100,000)-1
yes, but how often is that an issue in recent times?

I'm not able to find AMD or Intel CPU Soft error rate. Which also brings me to another Q, that's doesn't look like a FIT unit to me. Are they meaning on SE per 100'000 hour? That's absurdly bad.
Intel have FPGA with dedicated Soft Error circuits. You have ECC, which is supposed to alleviate it, again, the impression the header is, is to be some super tough "space-grade" reliability.

ah, I'm seeing the article is faulty also. it's (100'000)^(-1). Still isn't a FIT
Posted on Reply
#14
TheLostSwede
big_glassesyes, but how often is that an issue in recent times?

I'm not able to find AMD or Intel CPU Soft error rate. Which also brings me to another Q, that's doesn't look like a FIT unit to me. Are they meaning on SE per 100'000 hour? That's absurdly bad.
Intel have FPGA with dedicated Soft Error circuits. You have ECC, which is supposed to alleviate it, again, the impression the header is, is to be some super tough "space-grade" reliability.

ah, I'm seeing the article is faulty also. it's (100'000)^(-1). Still isn't a FIT
The article isn't faulty, it's what they wrote in their press release, so the fault is with the source, but since we don't know if it's FIT or MTBF, it's hard to judge what it means.
ceremorphic.com/ceremorphic-exits-stealth-mode-unveils-technology-plans-to-deliver-a-new-architecture-specifically-designed-for-reliable-performance-computing/
Posted on Reply
#15
Assimilator
Really tired of these "new CPU gonna change the world" tech startup articles. Why does TPU feel the need to give them free marketing? Until or unless they've shipped actual products that can be independently reviewed and benchmarked, they aren't worth anybody's time or money (which of course won't stop vulture venture capitalists).
Posted on Reply
#16
big_glasses
TheLostSwedeThe article isn't faulty, it's what they wrote in their press release, so the fault is with the source, but since we don't know if it's FIT or MTBF, it's hard to judge what it means.
ceremorphic.com/ceremorphic-exits-stealth-mode-unveils-technology-plans-to-deliver-a-new-architecture-specifically-designed-for-reliable-performance-computing/
Sorry, faulty is wrong. But your font, I guess. Makes it looks like (100000)-1 instead of (100000)^-1

ether way, not a CPU I'll touch anyways
Posted on Reply
#17
TheLostSwede
big_glassesSorry, faulty is wrong. But your font, I guess. Makes it looks like (100000)-1 instead of (100000)^-1

ether way, not a CPU I'll touch anyways
Not TPU, their site, as there's no ^ in their press release either and I'm not going to add something that I don't know where it belongs.
Posted on Reply
#18
big_glasses
TheLostSwedeNot TPU, their site, as there's no ^ in their press release either and I'm not going to add something that I don't know where it belongs.
You don't see the difference between TPU and their site?
The attached picture is from their site, and unless my browser is making a mess on TPU, it's (100,000)-1, without being "in power"
Posted on Reply
#19
Assimilator
big_glassesYou don't see the difference between TPU and their site?
The attached picture is from their site, and unless my browser is making a mess on TPU, it's (100,000)-1, without being "in power"
@TheLostSwede he's correct, you're not, in the time you've spent arguing against reality you could have fixed your post a dozen times over, so stop wasting everyone's time and fix it, kthxbye.
Posted on Reply
#20
TheLostSwede
Assimilator@TheLostSwede he's correct, you're not, in the time you've spent arguing against reality you could have fixed your post a dozen times over, so stop wasting everyone's time and fix it, kthxbye.
I was saying the ^ wasn't on their site, but I see what he means now, but it's not something I can fix, since the backend doesn't support it.
Posted on Reply
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