Wednesday, July 8th 2026

AMD 10-Core "Medusa Point" Zen 6 APU Reappears in Geekbench with Improved Performance

Another Geekbench entry for AMD's Medusa Point APU has been spotted by a well-known hardware leaker, HXL. This time, the submission lists the identifier 100-000001713-33_N on the Plum-MDS1 FP10 platform and is a step up from the previous leak in terms of performance, despite the chip reportedly running at just over 2.0 GHz. What we have there is listed as a Ryzen 9 part with 10 cores and 20 threads, 10 MB of L2 cache and 32 MB of L3; however, the L3 is likely misreported. The core layout is believed to follow a 4 + 6 configuration based on Zen 6/6c. Scores indicate 3,174 single-core and 15,092 multicore, roughly 29% and 22% higher than average Ryzen AI 9 365 Strix Point results, which is interesting given the low clock speeds in play. Engineering samples at this stage typically run below final frequencies, so the actual performance gap at launch could look quite different.

According to previous leaks, AMD's upcoming Medusa Point lineup could scale up to 22 CPU cores on the flagship Ryzen 9 model by combining a 10-core APU die with a 12-core desktop CCD. Integrated graphics are expected to have eight RDNA 3.5+ (RDNA 4m) compute units, with the lineup remaining unchanged despite the higher CPU core count. Another interesting new detail in this Geekbench submission is that we can see listed the FP16 AVX-VNNI support for a Zen 6 chip, pointing to expanded FP16 instruction handling in AMD's next-generation architecture. This is mostly relevant for AI and machine learning tasks. However, as with any early ES benchmark, take the numbers with a grain of salt. Pretty much everything from clock speeds, firmware, and platform tuning is a work in progress at this point. AMD Medusa Point is expected to arrive sometime next year with a likely initial launch at CES 2027 in January.
Sources: @HXL, via Wccftech, Geekbench
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21 Comments on AMD 10-Core "Medusa Point" Zen 6 APU Reappears in Geekbench with Improved Performance

#1
_roman_
i had the impression there is cache which is per cpu core, not per logical thread. there is also cache which is shared over all cores
and 32 MB of L3; however, the L3 is likely misreported.
32mib is a common size for cache.

more interesting are possible extra avx512 instructions. avx512 was extended, and has several sub instructions which it seems.


i am not sure if the author points out to 6c and zen 6 cores, some cores have less cache?
The core layout is believed to follow a 4 + 6 configuration based on Zen 6.
Why else would you indicate 4+6 ?

except one desktop cpu, i hardly remember any am5 cpu with 4 physical cores.
Posted on Reply
#2
Nomad76
News Editor
_roman_i had the impression there is cache which is per cpu core, not per logical thread. there is also cache which is shared over all cores


32mib is a common size for cache.
_roman_i am not sure if the author points out to 6c and zen 6 cores, some cores have less cache?

Why else would you indicate 4+6 ?

except one desktop cpu, i hardly remember any am5 cpu with 4 physical cores.
The Plum-MDS1 platform is using the FP10 BGA socket. This ES is a mobile APU, hence the 4 + 6 config. If this really has 32 MB L3 that's a big step up, otherwise, it could be just misreported.
Posted on Reply
#3
Patriot
Nomad76The Plum-MDS1 platform is using the FP10 BGA socket. This ES is a mobile APU, hence the 4 + 6 config. If this really has 32 MB L3 that's a big step up, otherwise, it could be just misreported.
I think it is fairly obvious the boost clocks aren't being read properly...
It is likely boosting 5-5.5ghz for those scores.
While it has potential to exceed previous performance via ipc gains at similar or slightly quicker clocks it is not logical to expect these gains at half clock...
Posted on Reply
#4
Nomad76
News Editor
PatriotI think it is fairly obvious the boost clocks aren't being read properly...
It is likely boosting 5-5.5ghz for those scores.
While it has potential to exceed previous performance via ipc gains at similar or slightly quicker clocks it is not logical to expect these gains at half clock...
~25% gains will be nice even with a 5 GHz boost, however, we're at least half a year before the launch. Things can change, specs, performance...
Posted on Reply
#5
jesdals
Well bring on the 12 core x3d chip
Posted on Reply
#6
Wirko
Nomad76If this really has 32 MB L3 that's a big step up, otherwise, it could be just misreported.
16 MB in each of the two clusters would be most likely then.
Posted on Reply
#7
GenericUsername2001
Nomad76The Plum-MDS1 platform is using the FP10 BGA socket. This ES is a mobile APU, hence the 4 + 6 config. If this really has 32 MB L3 that's a big step up, otherwise, it could be just misreported.
From the rumor/leaks floating around, the configuration may end up being 4 + 4c, attached to the 32MB L3 cache (which agreed, really nice) + 2 low power cores with their own small caches. Which honestly makes those multi-thread benches look even better; the lp cores wouldn't really be active during a benchmark like that, so its 4 + 4c Zen6 handily beating 4 + 6c Zen 5.
Posted on Reply
#8
kondamin
So does anyone have a test where they down clocked a 395 too 2Ghz and ran the same bench?
Posted on Reply
#11
ymdhis
1 year until released, 2 years for laptops and mini pcs to start becoming available with it, 3 years until it comes to desktops, 4 years until it is available for desktops. Well, at least we know AM5 will still get new chips even then. And it will still use RDNA 3.5!

I might end up switching to Intel in 1-2 years, their iGPUs starting to become more powerful.
Posted on Reply
#12
cfenton
kondaminDamn that's more than double, looks like zen 6 will be the thing to get if you are already on am5
There's no way Zen 6 is going to be twice as fast as Zen 5. It's much more likely that Geekbench is only reading the base clock and this chip is actually boosting well above 2ghz.
Posted on Reply
#13
Cheeseball
Not a Potato
cfentonThere's no way Zen 6 is going to be twice as fast as Zen 5. It's much more likely that Geekbench is only reading the base clock and this chip is actually boosting well above 2ghz.
Also there is no mention as to what the SPL, sPPT and fPPT are for this mobile APU. For all we know those could be the scores at 20W or such.
Posted on Reply
#14
Makaveli
jesdalsWell bring on the 12 core x3d chip
Same I think it will out perform the 16 core 9950X3D
Posted on Reply
#15
kondamin
cfentonThere's no way Zen 6 is going to be twice as fast as Zen 5. It's much more likely that Geekbench is only reading the base clock and this chip is actually boosting well above 2ghz.
That does make more sense, would have been market disrupting.
Posted on Reply
#16
melkor_unlimited
CheeseballAlso there is no mention as to what the SPL, sPPT and fPPT are for this mobile APU. For all we know those could be the scores at 20W or such.
kondaminThat does make more sense, would have been market disrupting.
Geekbench is just weird ... Good for Hype

Ryzen 5 7600x
Another one (I got my hands on) ST: 3027, MT: 14498

I could take only +5% in ST due lower than final clock & it being low powered mobile chip
But 10 cores (even if its 4 + 4c + 2lp) Zen6 making only +4% over 6 Zen4 is ... just Off.
Posted on Reply
#17
qcmadness
melkor_unlimitedGeekbench is just weird ... Good for Hype

Ryzen 5 7600x
Another one (I got my hands on) ST: 3027, MT: 14498

I could take only +5% in ST due lower than final clock & it being low powered mobile chip
But 10 cores (even if its 4 + 4c + 2lp) Zen6 making only +4% over 6 Zen4 is ... just Off.
Power limit does affect ST / MT performance much.
We need to know the power settings.
Posted on Reply
#18
Wirko
But why the LP cores? Only some ultra low power platforms would benefit from them, and which are those that Strix Point can't cover? If this chip is designed to scale down very deep, how well can it scale up?

The 8700G is a well-rounded desktop APU, I doubt that Zen 5 and Zen 6 on AM5 (assuming it will be based on this same Medusa Point) can ever take its place without too many tradeoffs.
Posted on Reply
#19
qcmadness
WirkoBut why the LP cores? Only some ultra low power platforms would benefit from them, and which are those that Strix Point can't cover? If this chip is designed to scale down very deep, how well can it scale up?

The 8700G is a well-rounded desktop APU, I doubt that Zen 5 and Zen 6 on AM5 (assuming it will be based on this same Medusa Point) can ever take its place without too many tradeoffs.
Intel is better in power efficiency under 10w/15w now as they progressed well in this 2-3 years.
Posted on Reply
#20
Philaphlous


Well considering my 9700x is quite abit faster than this "leak"....I'm not sure what to think. Maybe this is a scaled down chip? My PBO limits are unlocked and undervolted but sure...zen 6 should be able to top that...right?
Posted on Reply
#21
TheinsanegamerN
WirkoBut why the LP cores? Only some ultra low power platforms would benefit from them, and which are those that Strix Point can't cover? If this chip is designed to scale down very deep, how well can it scale up?

The 8700G is a well-rounded desktop APU, I doubt that Zen 5 and Zen 6 on AM5 (assuming it will be based on this same Medusa Point) can ever take its place without too many tradeoffs.
Because nobody drives their system at 100 percent all of the time.
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