Tuesday, October 13th 2026

Intel Refers to its 3D V-Cache Analog as "BFC"

Intel is introducing its analog to AMD's 3D V-Cache technology with its upcoming Core Ultra Series 4 "Nova Lake" desktop processors. We've known for over a year now, that the company is introducing SKUs with enlarged last-level caches. Technical docs leaks have until now referred to this technology as "bLLC," which simply meant "big last-level cache." We weren't sure if bLLC would be used as a marketing name for the tech, and it turns out, we're right. Apparently, Intel is going with "BFC" as the brand-extension for processor models featuring bLLC.

As we head closer to product launches of these next-generation chips, processor model numbering for these chips have begun to surface. The series will retain the new Core Ultra naming scheme from the current Core Ultra Series 2 "Arrow Lake" generation, but augment this with 4-digit model numbering that somewhat resembles the 4th Gen Core "Haswell" series. The "K" and "KF" brand extensions refer to the chips featuring an upwards unlocked base frequency multiplier; whereas "BFC" refers to the presence of bLLC.
It's anyone's guess what "BFC" abbreviates; Intel probably has some clever marketing name for that acronym, such as "big fusion cache," and of course gamers would know what "F" word substitute to use here.

The idea behind bLLC is the same as AMD had for 3D V-Cache. AMD discovered that enlarging the L3 cache of the processor can significantly improve gaming performance of the processor as it places more of the fast-moving game data, such as textures within 1/6th the latency of DRAM. While AMD stacks a slab of L3 cache memory on top of its CCD, over the central region with the on-die L3 cache to achieve a contiguously addressable cache block; Intel may use a different approach, such as having a cache tile sitting beside the Compute tile, with the ringbus of the compute-complex being extended to it, or short-terminating in the absence of it.
Sources: LC Tech Leaks, VideoCardz
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62 Comments on Intel Refers to its 3D V-Cache Analog as "BFC"

#1
Chrisy
I missed chance to call it simply FC, so you can have Core Ulta 9 4970KFC :oops:
Posted on Reply
#3
ncrs
While AMD stacks a slab of L3 cache memory on top of its CCD
That's true for Zen 3 and 4. Zen 5 moves the cache die below the CCD:

Intel may use a different approach, such as having a cache tile sitting beside the Compute tile, with the ringbus of the compute-complex being extended to it, or short-terminating in the absence of it.
I do not think that's going to be the case. It would probably overcomplicate the ring bus and cache coherency to have cache pieces as separate stops. Extending per-core/cluster L3 slices like AMD does is simpler. I'm expecting the base die of Nova Lake BFC to be active with cache onboard, just like the base die on Intel Ponte Vecchio was.
Posted on Reply
#4
FoulOnWhite
These big fenoodling cache chips are certainly going to be interesting. Can't wait to see some tests of them.
Posted on Reply
#5
FreedomEclipse
~Technological Technocrat~
BFG Technologies - BFG Technologies
BFG - Big Frendly Giant.
BFG - Big F'n Gun
....
BFC - Big F'n Cache
Posted on Reply
#6
Konceptz
Big f****** cache?
All this money for R&D and that's the best they could have come up with?
Posted on Reply
#8
Falck
Awesome.

So, Intel's critique of AMD's 3D V-cache was just envy? (All respect to Robert Hallock and his humble approach in the interview with PCHG)
Posted on Reply
#9
Joshreddevil
KonceptzBig f****** cache?
All this money for R&D and that's the best they could have come up with?
Description of the cost as well as cache
Posted on Reply
#10
GeoffreyA
Channelling the spirit of Devil's Canyon and the BFG, nice.
JoshreddevilDescription of the cost as well as cache
Purse-ripper :)
Posted on Reply
#11
DarkDreams
Missed opportunity calling it:
Big Beautiful Cache
Posted on Reply
#12
NoneRain
KonceptzBig f****** cache?
All this money for R&D and that's the best they could have come up with?
Big Fuc'in Cache is actually a cool name 😎
Posted on Reply
#13
Wirko
So some model numbers will include two F's, one for the absence of iGPU and another for the ~3x fatter cache?

John Rambo wouldn't approve.
Posted on Reply
#14
ixi
Big F****** Cache, nice phrasing.

I'm not even mad. I'm surprised.
Posted on Reply
#15
_roman_
Intel had a big cache cpu in the 5000 series. much earlier as amd. But intel wanted to sell the best quad cores for years and went back on the cache.

I'm waiting for the finished product. Does it have 3 or 5 different cores with 10 different cpu instruction and no common ground? does it have already established cpu instructions? Or does it have only cpu instructions from year 2000 for legacy computing?

I am curious about 2 cpu cores + 10 trash cores + 30 electrical waste cores with hardly any cpu instructions + 1gib of total cache. I will wait until the product can be purchased. Than i will look into it. Anything else is just speculations without any facts.

-- More cache is better was a known fact since at least year 2000 for myself. I would not state amd discovered it. Intel 5th series also showed that, now we are around intel 17 or 18th gen - i do not care for intel renaming tactics etc.
Posted on Reply
#16
wNotyarD
_roman_Intel had a big cache cpu in the 5000 series. much earlier as amd. But intel wanted to sell the best quad cores for years and went back on the cache.
Precisely, and for some applications Broadwell-DT's L4 eDRAM made it age way better than Skylake and Kaby Lake. So it isn't absurd for Intel's BFC to be at L4 level instead of L3 like AMD's V-Cache.
Posted on Reply
#17
Candycrushsodasaga2
Why not name it BBC for Big Beautiful Cache?😂 Trump would definitely agree on that.
Posted on Reply
#18
Mr. Perfect
Candycrushsodasaga2Why not name it BBC for Big Beautiful Cache?😂 Trump would definitely agree on that.
BBC is already short for something and Intel won't think it's as funny as BFC.
Posted on Reply
#19
Frizz
I mean this type of tech doesnt really need a fancy name they need to copy the GPU AIB naming schemes.. Intel Core Ultra 5/7/9 Gaming OC 😂
Posted on Reply
#20
igormp
btarunr
I'm feeling dumb. Can someone help me understand that image?

On the Architecture/Series part all of them are labeled as "Nova Lake S 28C", with some having the BLLC and others don't. However, on the description column we can see that only a single model actually has 28C in total (8P+16E+4L), which also has the BLLC.

So, that 28C seems to be the description of the base die, with only that 4970k getting the full die plus the BLLC, whereas all others are just lower binnings, right?

If the above is correct, it also seems that only the models which have the 4 LP cores will be the ones getting the BLLC. Is the tile for the BLLC also the same for those cores? I thought those LP cores would be on some kind of SoC tile. If that's also the case, it'd then explain why there are no variants with the same core config without the BLLC.
Posted on Reply
#21
FreedomEclipse
~Technological Technocrat~
Candycrushsodasaga2Why not name it BBC for Big Beautiful Cache?😂 Trump would definitely agree on that.
"And it will be a hyuge cache. absolutely hyuge.... Obama said it himself"
Posted on Reply
#22
matar
BFC means Big False cache
Posted on Reply
#23
Kilobitz
"Bucket Full o' Cache" maybe :)
Posted on Reply
#24
TumbleGeorge
KonceptzBig f****** cache?
Exactly. Like BFR concept of elon musk rocket was called from population: big f****** rocket.
Posted on Reply
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