Monday, October 26th 2026

NVIDIA Cuts HBM4 Speed and NVLink Bandwidth Targets for "Vera Rubin"

NVIDIA has officially implemented changes across its "Vera Rubin" product line, reducing target specifications for memory and interconnect fabric. According to the updated product specification sheet, the first change involves HBM4 memory. Previously, NVIDIA used HBM4 with a speed of 11.7 Gbps per pin, which has now been reduced to 9.6 Gbps per pin. In a "Vera Rubin" NVL72 rack-scale solution, NVIDIA now offers a total memory bandwidth of 1,400 TB/s, down from the previously advertised 1,580 TB/s. While this issue does not stem directly from NVIDIA's suppliers, it indicates that the company's implementation of memory bus width and overall electrical signaling is insufficient to support higher speeds.

However, the changes are not limited to memory. NVIDIA has also reduced the previously advertised NVLink bandwidth per GPU, decreasing it from 1.8 TB/s to 1.5 TB/s. This results in a reduction from 3.6 TB/s to 3 TB/s in bidirectional NVLink GPU bandwidth. The underlying issue is related to signal integrity, as NVIDIA reportedly lowered the NVLink Nyquist frequency target from 56 GHz to 47 GHz. Lowering the Nyquist frequency reduces the electrical demands on the SerDes, cables, and materials, which can improve manufacturing yields and overall feasibility, even though it requires accepting a small reduction in peak interconnect bandwidth. Thus, NVIDIA chose to sacrifice some bandwidth to enhance system stability. Below is the new system specification in light mode, and old system specification in dark mode.
Now, NVIDIA's solution is inferior to AMD's rack-scale Helios system in both memory capacity and memory bandwidth. AMD's Instinct MI455X offers significantly more high-bandwidth memory than NVIDIA's revised "Vera Rubin," with 432 GB of HBM4 per GPU at 23.3 TB/s compared to Rubin's 288 GB at 19.2 TB/s. At the 72-GPU rack level, Helios aggregates roughly 31 TB of HBM4 with about 1.67 PB/s of total memory bandwidth, compared to approximately 20.7 TB and 1.4 PB/s on the Vera Rubin NVL72. The gap extends to scale-up interconnects as well. AMD's UALoE delivers 3.6 TB/s bidirectional per GPU (260 TB/s aggregate), while NVIDIA's NVLink has been reduced to 3 TB/s per GPU (216 TB/s aggregate). These differences give Helios a clear advantage in both on-package memory capacity and system-level bandwidth.
Sources: Zephyr on X, Insane Analyst on X
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12 Comments on NVIDIA Cuts HBM4 Speed and NVLink Bandwidth Targets for "Vera Rubin"

#1
Wirko
It's most probably a real technical bandwidth limit but... seeing it in the same sentence as Nvidia, I can't help but think $ x,000.00/year/GPU removes it.
Posted on Reply
#3
Vya Domus
SK Hynix or Micron must have done an oopsie.
Posted on Reply
#4
cicaki
Vya DomusSK Hynix or Micron must have done an oopsie.
nop only upsie did was nvidia .. they slap too much cores in cpu that cant work with that manny gpu cores same time ,,
u will read (if they dont lie again) that they lower rest things on system
and this is another nvidia upsie from what 20 now ..
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#5
Solaris17
Super Dainty Moderator
WirkoIt's most probably a real technical bandwidth limit but... seeing it in the same sentence as Nvidia, I can't help but think $ x,000.00/year/GPU removes it.
We had trouble all the time with examax and other external pcie between chassis when linking together clusters. These retimers were doing gods work. These speeds are wild and no doubt in my mind it’s signaling related.
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#6
Blazeoptimus
I see this as an nvidia supply vs demand issue with no real competitor. Nvidia is able to sell as many chips as they can produce at whatever pricepoint they choose. In this situation, accepting an inferior setup, but with higher yeilds, is perferable. It won't impact the price point and they'll be able to sell more, because its 'Nvidia'. If they work out the yeild issues in the future, they'll sell the original chip at a price bumped margin. Its win-win for nvidia.
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#7
TumbleGeorge
No matter have or how big problems have there is fact that AMD didn't lowered speeds like Nvidia.
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#8
Steevo
Solaris17We had trouble all the time with examax and other external pcie between chassis when linking together clusters. These retimers were doing gods work. These speeds are wild and no doubt in my mind it’s signaling related.
There is a limit to frequency stability and termination before the gains outweigh the voltage and heat to run the thing, but I wonder if their first foray into making their own logic die didn't backfire.
TumbleGeorgeNo matter have or how big problems have there is fact that AMD didn't lowered speeds like Nvidia.
Nvidia has the HBM controller they built to blame from what I understand.
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#9
Denver
Probably a way to maximize yields. Lower targets take the pressure off the validation process.
Posted on Reply
#10
TumbleGeorge
SteevoNvidia has the HBM controller they built to blame from what I understand.
Hmm, the translation to my language is like they blame the controller itself not team which create it, huh.
PS. The my understanding is that problems is everywhere in the path of the signal not only "bad" controller.
Posted on Reply
#11
Athena
NVIDIA has officially implemented changes across its "Vera Rubin" product line, reducing target specifications for memory and interconnect fabric. According to the updated product specification sheet
Why do I think that this is just smoke and mirrors covering for the real problem that they got, and that is power requirements?

So they had to throttle back everything to fit in their desired power envelope, so they won't have cards burning left & right?
Posted on Reply
#12
jdrch
Now, NVIDIA's solution is inferior to AMD's rack-scale Helios system in both memory capacity and memory bandwidth. AMD's Instinct MI455X offers significantly more high-bandwidth memory than NVIDIA's revised "Vera Rubin," with 432 GB of HBM4 per GPU at 23.3 TB/s compared to Rubin's 288 GB at 19.2 TB/s. At the 72-GPU rack level, Helios aggregates roughly 31 TB of HBM4 with about 1.67 PB/s of total memory bandwidth, compared to approximately 20.7 TB and 1.4 PB/s on the Vera Rubin NVL72. The gap extends to scale-up interconnects as well. AMD's UALoE delivers 3.6 TB/s bidirectional per GPU (260 TB/s aggregate), while NVIDIA's NVLink has been reduced to 3 TB/s per GPU (216 TB/s aggregate). These differences give Helios a clear advantage in both on-package memory capacity and system-level bandwidth.
Nvidia's advantage is CUDA and it's larger ecosystem and better developer support that they've spent the last 15 years building. This is just like DGX vs. Gorgon Halo in which Gorgon Halo has more RAM and x64 familiarity, which DGX has a stronger exclusive ecosystem.
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