According to a recent Reuters report, the US government, under Biden's administration, will allow a few criteria-matching semiconductor fabs to circumvent environmental protection laws. On Wednesday, President Joe Biden signed legislation that effectively enables these fabs to not follow the strict regulations designed for maximum preservation of the environment. The Semiconductor Industry Association has noted that without this new legislation, companies that are extending facilities on US soil would be significantly slowed down due to the National Environmental Policy Act (NEPA) of 1969. The CHIPS Act's primary force driver isn't just domestic production but near-future completion so that future geopolitical shifts don't impact US companies. The speed of getting permits to manufacture advanced chips is essential for every CHIPS Act recipient company, like Intel, Samsung, TSMC, and Micron.

Corning Incorporated, one of the world's leading innovators in glass, ceramic, and materials science, today unveiled Corning EXTREME ULE Glass, a next-generation material that will support chip manufacturers in meeting the rapidly growing demand for advanced and intelligent technologies. The new material will help chipmakers improve photomasks - the stencils for chip design - which are critical for the mass production of today's most advanced and cost-efficient microchips.

Corning designed EXTREME ULE Glass to withstand the highest intensity extreme ultraviolet (EUV) lithography, including high numerical aperture (High NA) EUV, which is rapidly becoming an industry standard. EUV lithography allows manufacturers to use the most advanced photomasks to pattern and print the smallest, most complex chip designs. This process requires extreme thermal stability and a uniform glass material to help ensure consistent manufacturing performance.

Canon Inc. announced today that it will ship its most advanced lithography platform, the FPA-1200NZ2C nanoimprint lithography (NIL) system for semiconductor manufacturing, to the Texas Institute for Electronics (TIE), a Texas-based semiconductor consortium. Canon became the first in the world to commercialize a semiconductor manufacturing system that uses NIL technology, which forms circuit patterns in a different method from conventional projection exposure technology, when it released the FPA-1200NZ2C on October 13, 2023.

In contrast to conventional photolithography equipment, which transfers a circuit pattern by projecting it onto the resist coated wafer, the new product does it by pressing a mask imprinted with the circuit pattern into the resist on the wafer like a stamp. Because its circuit pattern transfer process does not go through an optical mechanism, fine circuit patterns on the mask can be faithfully reproduced on the wafer. With reduced power consumption and cost, the new system enables patterning with a minimum linewidth of 14 nm, equivalent to the 5 nm node that is required to produce most advanced logic semiconductors currently available.

Sony Semiconductor Solutions Corporation (SSS) today announced the upcoming release of the ECX350F, a 0.44-type Full HD resolution OLED Microdisplay that combines the industry's smallest 5.1 µm pixels (approximately 5,000 ppi) with the industry's highest brightness of up to 10,000 cd/m².

The ECX350F is an OLED Microdisplay designed for use in augmented reality (AR) glasses, an application which demands a thin, lightweight form factor without compromising visibility. Adopting a novel OLED structure and microlenses, the microdisplay enhances pixel light emission despite its diminutive size. This innovation allows for Full HD resolution within a compact 0.44-inch panel while delivering a peak brightness of 10,000 cd/m² — approximately double that of the conventional model. This new product represents a breakthrough that addresses the longstanding challenge of delivering high brightness with small pixels.

TSMC and Samsung are reportedly in talks with the United Arab Emirates (UAE) to establish chip factories in the Gulf nation. As reported by the Wall Street Journal, this "desert dream" aligns with the UAE's ambitious plans to diversify its economy beyond oil and become a key player in the AI sector by building chips for AI domestically. The UAE and neighboring Saudi Arabia plan to leverage their oil wealth to invest in cutting-edge manufacturing, with AI emerging as a primary focus due to its high computational demands. Successful implementation of chip factories could significantly boost the region's AI capabilities and impact the global semiconductor supply chain. However, the project faces substantial challenges. Previous attempts to establish semiconductor manufacturing in the Gulf, such as the GlobalFoundries initiative over a decade ago, have yet to progress beyond initial planning.

The current proposal faces even greater obstacles, with estimated costs exceeding $100 billion for a state-of-the-art facility and necessary infrastructure. Geopolitical concerns add another layer of complexity. Recent US export restrictions of certain chips to the Gulf region may complicate the transfer of advanced manufacturing processes to the UAE. Despite these hurdles, the potential benefits are significant. For the UAE, success would represent a major step towards economic diversification and technological leadership. TSMC and Samsung could gain a strategic presence in a region eager for technological advancement. TSMC noted that the company focuses on current expansion projects in the US, Japan, and Germany, while Samsung declined to comment.

TSMC has reportedly initiated production of Apple's last-generation A16 Bionic processors at its newly constructed Fab 21 in Arizona. This development comes significantly earlier than anticipated, with the facility's full-scale production initially scheduled for 2025. According to insights from industry expert Tim Culpan, the Arizona plant is already churning out a modest but noteworthy quantity of A16 Bionic chips. These processors are being manufactured using TSMC's NP4 4 nm semiconductor node. Culpan also hinted at a substantial increase in production capacity once the second stage of Fab 21's initial phase becomes operational.

This early start serves a critical function for TSMC, allowing the company to calibrate its advanced equipment and refine its manufacturing processes thoroughly. Using the well-established A16 Bionic design, TSMC can ensure its new facility meets the exacting standards required for next-generation semiconductor production. The news aligns with recent industry buzz suggesting that Fab 21 is already achieving yield rates comparable to TSMC's long-established Taiwanese plants—a remarkable feat for a newly launched facility. While current output remains limited, this milestone marks a significant step in TSMC's expansion into US-based chip manufacturing. With more fabs on American soil, companies can push domestic manufacturing and ensure that geopolitics don't hinder the vital supply chain.

Infineon Technologies AG today announced that the company has succeeded in developing the world's first 300 mm power gallium nitride (GaN) wafer technology. Infineon is the first company in the world to master this groundbreaking technology in an existing and scalable high-volume manufacturing environment. The breakthrough will help substantially drive the market for GaN-based power semiconductors. Chip production on 300 mm wafers is technologically more advanced and significantly more efficient compared to 200 mm wafers, since the bigger wafer diameter offers 2.3 times more chips per wafer.

GaN-based power semiconductors find fast adoption in industrial, automotive, and consumer, computing & communication applications, including power supplies for AI systems, solar inverters, chargers and adapters, and motor-control systems. State-of-the art GaN manufacturing processes lead to improved device performance resulting in benefits in end customers' applications as it enables efficiency performance, smaller size, lighter weight, and lower overall cost. Furthermore, 300 mm manufacturing ensures superior customer supply stability through scalability.

The Netherlands government announced additional export controls on advanced chipmaking equipment on Friday. This decision, which specifically targets ASML's DUV immersion lithography tools, has drawn sharp criticism from Beijing. The new regulations, aligning with similar restrictions imposed by the US last year, will require additional licensing for the export of ASML's 1970i and 1980i models. China's Commerce Ministry swiftly responded to the announcement, expressing dissatisfaction with what it perceives as unwarranted restrictions on trade. In a statement released Sunday, the ministry accused the United States of leveraging its global influence to pressure allies into tightening export controls, describing it as an attempt to maintain "global hegemony" in the semiconductor industry.

The Chinese government urged the Netherlands to reconsider its position, calling for a balance between security concerns and the preservation of mutually beneficial economic ties. Beijing emphasized the importance of safeguarding the "common interests" of businesses in both countries and warned against potential damage to Sino-Dutch cooperation in the semiconductor sector. Dutch Trade Minister Reinette Klever defended the decision, stating it was made "for our safety." However, this move could have significant implications for ASML, which has already faced restrictions on exporting its most advanced systems to China. ASML receives as much as 49% of its revenue from China, meaning that additional export regulations could significantly reduce revenues if licenses aren't approved.

According to a recent report from Nikkei, China has claimed the number one spot as the single highest spender on chipmaking tools. As the data from SEMI highlights, China spent a whopping $25 billion on key semiconductor tools in the first half of 2024, more than the US, Taiwan, and South Korea combined. And the train of acceleration for the Chinese semiconductor industry doesn't seem to be slowing down, as the country is expected to spend more than $50 billion for the entire year 2024. However, this equipment is not precisely leading-edge, as Chinese companies are under Western sanctions and are unable to source advanced EUV lithography tools for making sub-7 nm chips.

Most of the spending is allocated to mature node chipmaking facilities. These so-called "second tier" companies are driving the massive expenditures, and they are plentiful. Nikkei reports that there are at least ten firms that operate with mature nodes like 10/12/16 nm nodes. Being the biggest spender, China is also one of the primary revenue sources for many companies. For the US chipmaking tool companies like Applied Materials, Lam Research, and KLA, Chinese purchases accounted for 32%, 39%, and 44% of their latest quarterly revenue, respectively. Tokyo Electron recorded orders to China accounting for 49.9% of its revenues in June, while the Netherlands giant ASML also attributed 49%. Perhaps even more interesting is the expected outlook for 2025, which shows no signs of slowing down. The Chinese semiconductor industry must establish complete self-sufficiency, and massive capital expenditures are expected to continue.

After nearly 15 years of legal disputes, Infineon Technologies and Qimonda's insolvency administrator have reached a final settlement, with Infineon agreeing to pay €800 million. The conflict centered on the valuation of memory business assets that Infineon spun off in 2006 to create Qimonda, once a global leader in memory chip manufacturing with 13,500 employees worldwide.

Qimonda's journey was short-lived. It debuted on the New York Stock Exchange in August 2006 but filed for insolvency by January 2009. Legal proceedings initiated in 2010 focused on claims that Qimonda's balance sheet was underfunded during the spin-off. The insolvency administrator alleged that the transferred memory business was undervalued, leading to a lawsuit for reimbursement of the share value discrepancy.

Texas Instruments (TI) (Nasdaq: TXN) and the U.S. Department of Commerce have signed a non-binding Preliminary Memorandum of Terms for up to $1.6 billion in proposed direct funding under the CHIPS and Science Act to support three 300 mm wafer fabs already under construction in Texas and Utah. In addition, TI expects to receive an estimated $6 billion to $8 billion from the U.S. Department of Treasury's Investment Tax Credit for qualified U.S. manufacturing investments. The proposed direct funding, coupled with the investment tax credit, would help TI provide a geopolitically dependable supply of essential analog and embedded processing semiconductors.

"The historic CHIPS Act is enabling more semiconductor manufacturing capacity in the U.S., making the semiconductor ecosystem stronger and more resilient," said Haviv Ilan, president and CEO of Texas Instruments. "Our investments further strengthen our competitive advantage in manufacturing and technology as we expand our 300 mm manufacturing operations in the U.S. With plans to grow our internal manufacturing to more than 95% by 2030, we're building geopolitically dependable, 300 mm capacity at scale to provide the analog and embedded processing chips our customers will need for years to come."

Researchers at Fraunhofer IAF have made a significant advance in semiconductor materials by successfully fabricating aluminum yttrium nitride (AlYN) using metal-organic chemical vapor deposition (MOCVD). AlYN, known for its outstanding properties and compatibility with gallium nitride (GaN), shows great potential for energy-efficient, high-frequency electronics. Previously, AlYN could only be deposited via magnetron sputtering, but this new method opens the door to diverse applications. Dr. Stefano Leone from Fraunhofer IAF highlights AlYN's ability to enhance performance while reducing energy consumption, making it vital for future electronics.

In 2023, the team achieved a 600 nm thick AlYN layer with a record 30% yttrium concentration. They have since developed AlYN/GaN heterostructures with high structural quality and promising electrical properties, particularly for high-frequency applications. These structures demonstrate optimal two-dimensional electron gas (2DEG) properties and are highly suitable for high electron mobility transistors (HEMTs).

According to a recent report from Reuters, tech giant Intel is facing a significant legal challenge as shareholders file a lawsuit following a dramatic plunge in the company's stock price. The legal action comes from Intel's recent announcement of dividend suspensions and plans to lay off over 15,000 employees. The semiconductor behemoth saw its market value plummet by a staggering $32 billion in a single day, leaving investors reeling. The Construction Laborers Pension Trust of Greater St. Louis has initiated a proposed class action suit, naming Intel, CEO Pat Gelsinger, and CFO David Zinsner as defendants. The plaintiffs allege that the company made misleading statements about its business operations and manufacturing capabilities, artificially inflating its stock price between January 25 and August 1.

Intel's financial woes stem from underperforming contract foundry operations and 1% drop in revenue during the second quarter of 2024. While it may seem miniscule, declining revenue is paired with a negative 15.3% operating margin, resulting in a net loss of $1.61 billion. The company's August 1 announcement caught many shareholders off guard, prompting accusations of inadequate disclosure and transparency. This lawsuit is just one of several legal battles Intel is currently strangled in. The company is also locked in a patent dispute with R2 Semiconductor across multiple European countries, centering on voltage regulation technology. While Intel has secured a victory in the UK, it faces ongoing litigation in Germany, France, and Italy. Adding to Intel's troubles, a separate class action lawsuit is being explored on behalf of customers who purchased potentially faulty 13th and 14th-generation processors. The company also canceled its September 2024 Innovation event, citing poor financials, without any words on Arrow Lake or Lunar Lake. While the cancelation of events is sad, it is necessary to get financials back on track, and product launches should continue as usual.

Intel Corporation today reported second-quarter 2024 financial results. "Our Q2 financial performance was disappointing, even as we hit key product and process technology milestones. Second-half trends are more challenging than we previously expected, and we are leveraging our new operating model to take decisive actions that will improve operating and capital efficiencies while accelerating our IDM 2.0 transformation," said Pat Gelsinger, Intel CEO. "These actions, combined with the launch of Intel 18A next year to regain process technology leadership, will strengthen our position in the market, improve our profitability and create shareholder value."

"Second-quarter results were impacted by gross margin headwinds from the accelerated ramp of our AI PC product, higher than typical charges related to non-core businesses and the impact from unused capacity," said David Zinsner, Intel CFO. "By implementing our spending reductions, we are taking proactive steps to improve our profits and strengthen our balance sheet. We expect these actions to meaningfully improve liquidity and reduce our debt balance while enabling us to make the right investments to drive long-term value for shareholders."

Renesas Electronics Corporation, a supplier of advanced semiconductor solutions, and Altium Limited ("Altium"), a global leader in electronics design systems, today announced the successful completion of the acquisition of Altium by Renesas. The definitive agreement to acquire Altium was announced on February 15, 2024.

The combination sets the foundation for Renesas and Altium to create an innovative electronics system design and lifecycle management platform. The platform will deliver integration and standardization of various electronic design data and functions and enhanced component lifecycle management, while enabling seamless digital iteration of design processes to increase overall productivity. This brings significantly faster innovation and lowers barriers to entry for system designers by reducing development resources and inefficiencies.

SK hynix Inc. announced today that it has decided to invest about 9.4 trillion won in building the first fab and business facilities of the Yongin Semiconductor Cluster after the board resolution on the 26th. SK hynix designs to start construction of the 1st fab to be built in the Yongin cluster in March next year and complete it in May 2027, and have received an investment approval from the board of directors prior to it. The company will make every effort to build the fab to lay the foundation for the company's future growth and respond to the rapidly increasing demand for AI memory semiconductors.

The Yongin Cluster, which will be built on a 4.15 million square meter site in Wonsam-myeon, Yongin, Gyeonggi Province, is currently under site preparation and infrastructure construction. SK hynix has decided to build four state-of-the-art fabs that will produce next-generation semiconductors, and a semiconductor cooperation complex with more than 50 small local companies. After the construction of the 1st fab, the company aims to complete the remaining three fabs sequentially to grow the Yongin Cluster into a "Global AI semiconductor production base."

Femtosense, in partnership with ABOV Semiconductor, today launched the AI-ADAM-100, an artificial intelligence microcontroller unit (AI MCU) built on sparse AI technology to enable on-device AI features such as voice-based control in home appliances and other products. On-device AI provides immediate, no-latency user responses with low power consumption, security, operational stability, and low cost compared to GPUs or cloud-based AI.

The AI-ADAM-100 integrates the Femtosense Sparse Processing Unit 001 (SPU-001), a neural processing unit (NPU), and an ABOV Semiconductor MCU to provide deep learning-powered AI voice processing and voice-cleanup capabilities on-device at the edge. With language processing, appliances can implement "say what you mean" voice interfaces that allow users to speak naturally and express their intent freely in multiple ways. For example, "Turn the lights off", "Turn off the lights," and "Lights off" all convey the same intent and are understood as such.

Qualitas Semiconductor Co., Ltd. has developed a new PCIe 6.0 PHY IP, marking a significant advance in computer interconnect technology. This new product, created using advanced 5 nm process technology is designed to meet the high-speed data transfer needs of the AI era. The Qualitas' PCIe PHY IP using 5 nm FinFet CMOS technology consists of hardmacro PMA and PCS compliant to PCIe Base 6.0 specification.

The PCIe 6.0 PHY IP can achieve transmission speeds up to 64GT/s per lane. When using all 16 lanes, it can transfer data at rates up to 256 GB/s. These speeds make it well-suited for data centers and self-driving car technologies, where rapid data processing is essential. Qualitas achieved this performance by implementing 100G PAM4 signaling technology. Highlighting the importance of the new IP, Qualitas CEO Dr. Duho Kim signaled the company's intent to continue pushing boundaries in semiconductor technology.

OPENEDGES Technology, Inc the leading provider of memory subsystem IP, is pleased to announce that its subsidiary, The Six Semiconductor Inc (TSS), has successfully brought-up and validated its HBM3 testchip in 7 nm process technology. The IP validation testchip and the HBM3 PHY were brought up within the first month to 6.4 Gbps, and further tuning has resulted in successful operation of the HBM3 memory subsystem overclocked to 7.2 Gbps.

To date, there are only a handful of IP vendors that have taped out and demonstrated HBM3 memory subsystems, as test shuttle and HBM3 DRAM die stack sample availability are both highly limited. OPENEDGES is thrilled to be amongst one of the few companies to have demonstrated an HBM3 memory subsystem in silicon.

An Innovate UK project worth £1.1M has been awarded to the Lancaster University spinout firm Quinas, the global semiconductor company IQE and Lancaster and Cardiff Universities. Quinas will coordinate the ambitious project which is the first step towards volume production of the universal computer memory ULTRARAM invented by Lancaster Physics Professor Manus Hayne.

ULTRARAM has extraordinary properties, combining the non-volatility of a data storage memory, like flash, with the speed, energy-efficiency, and endurance of a working memory, like DRAM. Most of the funding for the one-year project will be spent at IQE which will scale up the manufacture of compound semiconductor layers from Lancaster University to an industrial process at the Cardiff based firm. This will involve IQE developing advanced capability for growth of the compound semiconductors gallium antimonide and aluminium antimonide for the first time. The project follows significant investment to boost the UK semiconductor industry and the establishment of the world's first compound semiconductor cluster in South Wales.

Applied Materials, Inc. today introduced materials engineering innovations designed to increase the performance-per-watt of computer systems by enabling copper wiring to scale to the 2 nm logic node and beyond. "The AI era needs more energy-efficient computing, and chip wiring and stacking are critical to performance and power consumption," said Dr. Prabu Raja, President of the Semiconductor Products Group at Applied Materials. "Applied's newest integrated materials solution enables the industry to scale low-resistance copper wiring to the emerging angstrom nodes, while our latest low-k dielectric material simultaneously reduces capacitance and strengthens chips to take 3D stacking to new heights."

Overcoming the Physics Challenges of Classic Moore's Law Scaling
Today's most advanced logic chips can contain tens of billions of transistors connected by more than 60 miles of microscopic copper wiring. Each layer of a chip's wiring begins with a thin film of dielectric material, which is etched to create channels that are filled with copper. Low-k dielectrics and copper have been the industry's workhorse wiring combination for decades, allowing chipmakers to deliver improvements in scaling, performance and power-efficiency with each generation.

Samsung Electronics, a world leader in advanced semiconductor technology, today announced that it will provide turnkey semiconductor solutions using the 2-nanometer (nm) foundry process and the advanced 2.5D packaging technology Interposer-Cube S (I-Cube S) to Preferred Networks, a leading Japanese AI company.

By leveraging Samsung's leading-edge foundry and advanced packaging products, Preferred Networks aims to develop powerful AI accelerators that meet the ever-growing demand for computing power driven by generative AI.

A research team from the South Korean Institute for Basic Science (IBS) has developed a new method for growing 1D metallic materials less than 1 nm wide. They applied this technique to create a new structure for 2D semiconductor logic circuits, using the 1D metals as gate electrodes in very small transistors. However, creating very small transistors that can control electron movement within a few nanometers has been challenging. The size of semiconductor devices depends on the width and efficiency of the gate electrode. Current manufacturing processes can't make gate lengths below a few nanometers due to limitations in lithography. To address this, the team used the mirror twin boundary (MTB) of molybdenum disulfide, which is a 1D metal only 0.4 nm wide, as a gate electrode. The IBS team achieved the 1D MTB metallic phase by altering the crystal structure of a 2D semiconductor at the atomic level.

The International Roadmap for Devices and Systems (IRDS) predicts semiconductor technology to reach about 0.5 nm by 2037, with transistor gate lengths of 12 nm. The research team's transistor demonstrated a channel width as small as 3.9 nm, surpassing this prediction. The 1D MTB-based transistor also offers advantages in circuit performance. Unlike some current technologies (FinFETs or GAA) that face issues with parasitic capacitance in highly integrated circuits, this new transistor can minimize such problems due to its simple structure and narrow gate width.

PanelSemi, a developer of ultra-thin flexible LED displays and semiconductor substrates, has partnered with NGK Insulators to create high-performance hybrid packaging solutions. Leveraging its tiled thin-film transistor (TFT) circuit fabrication technology, PanelSemi is developing a hybrid circuit board that combines fine wiring and functional circuits on polyimide film with a ceramic substrate. The company is expanding into high-performance circuit boards for semiconductor modules, targeting large-scale panel manufacturing for wireless communications and opto-electronic integration. The collaboration with NGK extends the application of ceramic substrates to higher power and thermal scenarios.

NGK aims to integrate PanelSemi's circuit fabrication technology with its own products, including the ultra-compact EnerCera lithium-ion rechargeable battery, ceramic substrates, and ceramic packages. PanelSemi's HyBrid Substrate (HBS) technology platform features ultra-fine line width and spacing achieved through Thin Film (TF) and Panel Level Packaging (PLP) processes. HBS enables high-density interconnection, functioning as both an interposer and package substrate in advanced packaging, with the top die directly bonded to the HBS.

To keep pace with unremitting growth in demand for chips, the global semiconductor manufacturing industry is expected to increase capacity by 6% in 2024 and post a 7% gain in 2025, reaching a record capacity high of 33.7 million wafers per month (wpm: 8-inch equivalent), SEMI announced today in its latest quarterly World Fab Forecast report.

Leading-edge capacity for 5 nm nodes and under is expected to grow 13% in 2024, chiefly driven by generative artificial intelligence (AI) for data center training, inference, and leading-edge devices. To increase processing power efficiency, chipmakers including Intel, Samsung, and TSMC are poised to start production of 2 nm Gate-All-Around (GAA) chips, boosting total leading-edge capacity growth by 17% in 2025.