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AMD Details ZEN Microarchitecture IPC Gains

AMD Tuesday hosted a ZEN microarchitecture deep-dive presentation in the backdrop of Hot Chips, outlining its road to a massive 40 percent gain in IPC (translated roughly as per-core performance gains), over the current "Excavator" microarchitecture. The company credits the gains to three major changes with ZEN: better core engine, better cache system, and lower power. With ZEN, AMD pulled back from its "Bulldozer" approach to cores, in which two cores share certain number-crunching components to form "modules," and back to a self-sufficient core design.

Beyond cores, the next-level subunit of the ZEN architecture is the CPU-Complex (CCX), in which four cores share an 8 MB L3 cache. This isn't different from current Intel architectures, the cores share nothing beyond L3 cache, making them truly independent. What makes ZEN a better core, besides its independence from other cores, and additional integer pipelines; subtle upscaling in key ancillaries such as micro-Op dispatch, instruction schedulers; retire, load, and store queues; and a larger quad-issue FPU.

AMD ZEN Quad-Core Subunit Named CPU-Complex (CCX)

We've been chasing AMD Zen for a long time now. Our older report from April 2015 uncovered an important detail about component organization on Zen processors - the clumping of four CPU cores into a highly-specialized, possibly indivisible subunit referred to then, as the "Zen Quad-core Unit." Some of the latest presentations about the architecture, following AMD's "performance reveal" event from earlier this month, shed more light on this quad-core unit.

AMD is referring to the Zen quad-core unit as the CPU-Complex (CCX). Each CCX is a combination of four independent CPU cores. Unlike on "Bulldozer," a "Zen" core does not share any of its number-crunching machinery with neighboring cores. Each "Zen" core has a dedicated L2 cache of 512 KB, and four Zen cores share an 8 MB L3 cache. AMD will control core-counts by controlling CCX units. A "Summit Ridge" socket AM4 processor features two CCX units (making up eight cores in all), sharing a dual-channel DDR4 memory controller, and the platform core-logic (chipset), complete with an integrated PCI-Express root complex. Socket AM4 APUs will feature one CCX unit, and an integrated GPU in place of the second CCX. With this, AMD is able to bring the two diverse desktop platforms under one socket.


Source: Heise.de

AMD Demos Breakthrough Performance of the ZEN CPU Core

At an event last night in San Francisco, AMD provided additional architectural details and a first look at the performance of its next-generation, high-performance "Zen" processor core. AMD demonstrated the "Zen" core achieving a 40% generational improvement in instructions per clock, delivering a landmark increase in processor performance.

During the event, AMD demonstrated an 8-core, 16-thread "Summit Ridge" desktop processor (featuring AMD's "Zen" core) outperforming a similarly configured 8-core, 16-thread Intel "Broadwell-E" processor when running the multi-threaded Blender rendering software with both CPUs set to the same clock speed. AMD also conducted the first public demonstration of its upcoming 32-core, 64-thread "Zen"-based server processor, codenamed "Naples," in a dual processor server running the Windows Server operating system.

AMD "Summit Ridge" ZEN CPU at 2.80 GHz Beats 3.40 GHz Core i5-4670K

According to performance numbers of an AMD "Summit Ridge" ZEN CPU engineering-sample put out by WCCFTech, AMD's claims of IPC gains are gaining credibility, and showing signs of the gaming PC processor market warming up again. An engineering sample featuring 8 cores and 16 threads (via SMT), beat Intel's Core i5-4670K processor. This sample featured clock speeds of 2.80 GHz, with 3.20 GHz boost.

The "Summit Ridge" sample provided 10 percent higher frame-rates than a Core i5-4670K, in the "Ashes of the Singularity" 1080p benchmark. The chip is still convincingly beaten by 12 percent, by a Core i7-4790 (non-K), running at 3.60 GHz, with 4.00 GHz boost. This shows that AMD could leverage the new 14 nm FinFET process to crank up clock-speeds, and produce SKUs competitive with current Intel "Skylake-D" Core i5 and Core i7 processors.


Source: WCCFTech

Microsoft XBOX Scorpio SoC Powered by "Polaris" and "Zen"

It looks like Microsoft will overpower Sony in the next round of the console wars, with a more powerful SoC on paper. The new XBOX "Scorpio" 4K Ultra HD game console will feature a custom-design SoC by AMD, which will combine not just a GPU based on the "Polaris" architecture, but also a CPU based on the "Zen" microarchitecture. This is significant because it sees a departure from using 8 smaller "Jaguar" CPU cores, and upshifts to stronger "Zen" ones. The chip could be built on the 14 nm process.

The SoC powering the XBOX Scorpio could feature a CPU component with eight "Zen" CPU cores, with SMT enabling 16 logical CPUs, and a "Polaris" GPU with 6 TFLOP/s of compute power. The combined compute power is expected to be close to 10 TFLOP/s. The Radeon RX 480, for instance features 5.84 TFLOP/s of power at its given clock speed. The CPU and GPU will likely share a common memory interface, belting out a memory bandwidth of 320 GB/s. The silicon muscle of this console should power 4K Ultra HD, 1080p @ 60 Hz HDR, and "good VR" solutions such as the Oculus Rift and HTC Vive. Games for the console could leverage DirectX 12.


Source: TweakTown

AMD "Summit Ridge" Silicon Reserved for 8-core CPUs Initially

Sources tell Bits'n'Chips that AMD could use a common 8-core CPU die based on its upcoming "Zen" architecture over multiple CPU SKUs, at least initially. AMD will have two distinct kinds of processors, those with integrated graphics (APUs) based on the "Bristol Ridge" silicon, and those without integrated graphics (CPUs), based on the "Summit Ridge" silicon. Since products based on both the dies will use a common socket on the desktop (socket AM4), consumers looking for 2-4 CPU cores will be presented with APU options, while those looking for more powerful CPU solutions will be made to choose 8-core CPUs based on the "Summit Ridge" silicon.

Source: BitsnChips.it

AMD "Zen" Processors to Feature SMT, Support up to 8 DDR4 Memory Channels

CERN engineer Liviu Valsan, in a recent presentation on datacenter hardware trends, presented a curious looking slide that highlights some of the key features of AMD's upcoming "Zen" CPU architecture. We know from a recent story that the architecture is scalable up to 32 cores per socket, and that AMD is building these chips on the 14 nanometer FinFET process.

Among the other key features detailed on the slide are symmetric multi-threading (SMT). Implemented for over a decade by Intel as HyperThreading Technology, SMT exposes a physical core as two logical CPUs to the software, letting it make better use of the hardware resources. Another feature is talk of up to eight DDR4 memory channels. This could mean that AMD is readying a product to compete with the Xeon E7 series. Lastly, the slide mentions that "Zen" could bring about IPC improvements that are 40 percent higher than the current architecture.

Source: HotHardware

AMD Zen Architecture Supports Up to 32 Cores per Socket: Leaked Linux Patch

AMD's next-generation "Zen" x86-64 CPU micro-architecture will support up to 32 cores per socket, according to leaked Linux kernel patch on LKML. We know from older reports, that AMD clumps groups of four cores in subunits it calls "Zen quad-core units." Not to be confused with its current "module" design, a quad-core unit is a group of four completely independent cores, which share nothing other than an L3 cache. TechFrag used this bit to deduce that the "Zen" architecture is scalable up to eight quad-core units per socket, or 32 cores per socket.


Source: TechFrag

AMD Zen Features Double the Per-core Number Crunching Machinery to Predecessor

AMD "Zen" CPU micro-architecture has a design focus on significantly increasing per-core performance, particularly per-core number-crunching performance, according to a 3DCenter.org report. It sees a near doubling of the number of decoder, ALU, and floating-point units per-core, compared to its predecessor. In essence, the a Zen core is AMD's idea of "what if a Steamroller module of two cores was just one big core, and supported SMT instead."

In the micro-architectures following "Bulldozer," which debuted with the company's first FX-series socket AM3+ processors, and running up to "Excavator," which will debut with the company's "Carrizo" APUs, AMD's approach to CPU cores involved modules, which packed two physical cores, with a combination of dedicated and shared resources between them. It was intended to take Intel's Core 2 idea of combining two cores into an indivisible unit further.

GlobalFoundries 14 nm LPP FinFET Node Taped Out, Yields Good

GlobalFoundries' move to leapfrog several silicon fab steps to get straight to 14 nanometer (nm) is on the verge of paying off, with the company taping out its 14 nm LPP (low-power plus) FinFET node, and claiming good yields on its test/QA chips. This takes the node one step closer to accepting orders for manufacturing of extremely complex chips, such as CPUs and GPUs.

AMD is expected to remain the company's biggest client, with plans to build its next-generation "Zen" processor on this node. The company's "Arctic Islands" graphics chips are also rumored to be built on the 14 nm node, although which foundry will handle its mass production remains unclear. A big chunk of AMD's R&D budget is allocated to getting the "Zen" architecture right, with key stages of its development being handled by Jim Keller, the brains behind some of AMD's most commercially successful CPU cores.


Source: Expreview

AMD Zen-based 8-core Desktop CPU Arrives in 2016, on Socket FM3

In what is a confirmation that AMD has killed socket AM3+ and its 3-chip platform, a leaked slide that's part of a larger press-deck addressing investors, tells us that the company is planning to launch a high-performance desktop processor targeting enthusiasts, based on its next-generation "Zen" architecture, in 2016. Our older articles detail the Zen CPU core design, and the way in which AMD will build multi-core CPUs with it. This processor will be codenamed "Summit Ridge," and will be a CPU, and not an APU as previously reported. In AMD-speak, what sets a CPU apart from an APU is its lack of integrated graphics.

AMD "Summit Ridge" will be an 8-core CPU built on the 14 nanometer silicon fab process. It will feature eight "Zen" cores, with 512 KB of L2 cache per core, 16 MB of L3 cache, with 8 MB shared between two sets of four cores, each; a dual-channel integrated memory controller that likely supports both DDR3 and DDR4 memory types; and an integrated PCI-Express gen 3.0 root complex, with a total of 22 lanes. We can deduce this from the fact that "Summit Ridge" will be built in the same upcoming socket FM3 package, which the company's "Bristol Ridge" Zen-based APU will be built on. "Summit Ridge" will hence be more competitive with Intel's 6th generation Core "Skylake" processors, such as the i7-6700K and i5-6600K, than the company's "Broadwell-E" HEDT platform.

First AMD "Zen" Chips to be Quad-Core

Some of the first CPUs and APUs based on AMD's next-generation "Zen" micro-architecture could be quad-core. "Zen" will be AMD's first monolithic core design after a stint with multi-core modules, with its "Bulldozer" architecture. Our older article details what sets Zen apart from its predecessor. As expected, in a multi-core chip, Zen cores share no hardware resources with each other, than a last-level cache (L3 cache), much like Intel's current CPU architecture.

There's just one area where Zen will differ from Haswell. With Haswell, Intel has shown that it can clump any number of cores on a chip, and make them share a proportionately large L3 cache. Haswell-E features 8 cores sharing a 20 MB cache. The Haswell-EX features 18 cores sharing 45 MB of cache. With Zen, however, the scale up stops at 4 cores sharing 8 MB of L3 cache. A set of four cores makes up what AMD calls a "quad-core unit." To be absolutely clear, this is not a module, the cores share no hardware components with each other, besides the L3 cache.

AMD "Zen" CPU Core Block Diagram Surfaces

As a quick follow up to our older report on AMD's upcoming "Zen" CPU core micro-architecture being a reversion to the monolithic core design, and a departure from its "Bulldozer" multicore module design which isn't exactly flying off the shelves, a leaked company slide provides us the first glimpse into the core design. Zen looks a lot like "Stars," the core design AMD launched with its Phenom series, except it has a lot more muscle, and one could see significant IPC improvements over the current architecture.

To begin with, Zen features monolithic fetch and decode units. On Bulldozer, two cores inside a module featured dedicated decode and integer units with shared floating-point units. On Zen, there's a monolithic decode unit, and single integer and floating points. The integer unit has 6 pipelines, compared to 4 per core on Bulldozer. The floating point unit has two large 256-bit FMAC (fused-multiply accumulate) units, compared to two 128-bit ones on Bulldozer. The core has a dedicated 512 KB L2 cache. This may be much smaller than the 2 MB per module on Bulldozer, but also indicate that the core is able to push through things fast enough to not need cushioning by a cache (much like Intel's Haswell architecture featuring just 256 KB per core). In a typical multi-core Zen chip, the cores will converge at a large last-level cache, which routes data between them to the processor's uncore, which will feature a DDR4 IMC and a PCI-Express 3.0 root complex.
Source: Planet3DNow, Many Thanks to qubit for the tip.

ASUS Introduces the Ultra-Slim SDRW-08U5S-U External DVD Writer

ASUS today announced the SDRW-08U5S-U external DVD writer, a highly portable optical drive with the thinnest form factor in its class at just 13mm. Its design includes a built-in hidden stand that saves space and reduces clutter while enabling dual-stance horizontal and vertical placement. For data protection, ASUS integrates multiple security measures, with password controls and encryption alongside encoded file name functionality. The SDRW-08U5S-U ships in Mellow Metallic, Dusty Rose, and Bright Berry color options.

The SDRW-08U5S-U employs intricate engineering to achieve a very slender 13mm side profile. In addition to making it highly attractive, the form factor contributes to easy mobility and greater usability as the SDRW-08U5S-U can be effortlessly transported and placed, making it a perfect companion for Ultrabooks and other mobile devices.

Creative Unveils its Newest ZEN Player

Creative unveiled today details for its latest player, the Creative ZEN. Here are some of the main ZEN features:
  • Capacity: 4GB, 8GB, and 16GB
  • 2.5" display with 16.7 million colors (320 x 240)
  • SD Expansion Slot (possible support for SDHC)
  • Audio: MP3, WMA (and WMA-DRM), AAC (supports iTunes Plus tracks) and Audible
  • Video: WMV, Divx, Xvid, MJPEG, and TIVO to Go
  • FM tuner and Voice Recorder
  • Battery Life: 25 hours of Audio, 5 hours for Video
  • Dimensions: 55 x 83 x 11.3mm (65g)
  • Pricing: $149, $199, $299 respectively
The ZEN will officially debut at IFA starting August 31st, and should be released sometime in September. You can pre-order them right now from Amazon.com. Special thanks to our reader DanielF50 for this news story.

Source: epiZENter
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