Wednesday, November 18th 2015
NVIDIA Details "Pascal" Some More at GTC Japan
NVIDIA revealed more details of its upcoming "Pascal" GPU architecture at the Japanese edition of the Graphics Technology Conference. The architecture will be designed to nearly double performance/Watt over the current "Maxwell" architecture, by implementing the latest tech. This begins with stacked HBM2 (high-bandwidth memory 2). The top "Pascal" based product will feature four 4-gigabyte HBM2 stacks, totaling 16 GB of memory. The combined memory bandwidth for the chip will be 1 TB/s. Internally, bandwidths can touch as high as 2 TB/s. The chip itself will support up to 32 GB of memory, and so enterprise variants (Quadro, Tesla), could max out the capacity. The consumer GeForce variant is expected to serve up 16 GB.
It's also becoming clear that NVIDIA will build its "Pascal" chips on the 16 nanometer FinFET process (AMD will build its next-gen chips on more advanced 14 nm process). NVIDIA is innovating a new interconnect called NVLink, which will change the way the company has been building dual-GPU graphics cards. Currently, dual-GPU cards are essentially two graphics cards on a common PCB, with PCIe bandwidth from the slot shared by a bridge-chip, and an internal SLI bridge connecting the two GPUs. With NVLink, the two GPUs will be interconnected with an 80 GB/s bi-directional data path, letting each GPU directly address memory controlled by the other. This should greatly improve memory management in games that take advantage of newer APIs such as DirectX 12 and Vulkan; and prime the graphics card for higher display resolutions. NVIDIA is expected to launch its first "Pascal" based products in the first half of 2016.
Source:
VR World
It's also becoming clear that NVIDIA will build its "Pascal" chips on the 16 nanometer FinFET process (AMD will build its next-gen chips on more advanced 14 nm process). NVIDIA is innovating a new interconnect called NVLink, which will change the way the company has been building dual-GPU graphics cards. Currently, dual-GPU cards are essentially two graphics cards on a common PCB, with PCIe bandwidth from the slot shared by a bridge-chip, and an internal SLI bridge connecting the two GPUs. With NVLink, the two GPUs will be interconnected with an 80 GB/s bi-directional data path, letting each GPU directly address memory controlled by the other. This should greatly improve memory management in games that take advantage of newer APIs such as DirectX 12 and Vulkan; and prime the graphics card for higher display resolutions. NVIDIA is expected to launch its first "Pascal" based products in the first half of 2016.
67 Comments on NVIDIA Details "Pascal" Some More at GTC Japan
Thanks
Nick
Pascal will smoke everything out there
Next-Gen GPU? 3 times-5 times times performance? The simple necessities?
:) "" 3 times-5 times times performance? "" Dream on
On top of it, the DX12 explicit multi-GPU mode has to be specifically coded for and enabled by game developers, the GPU vendors have very little to do in implementing it and the drivers have very little if nothing to do with optimizing it due to the low level nature of DX12.
The only option nVidia could possibly have at even approaching NVLink usage in the consumer space is in Dual-GPU cards with two GPU dies on a single PCB, using the NVLink as an interconnect devoted specifically to GPU-to-GPU communications.
PCI-E bandwidth isn't an issue for consumer GPU in 99%+ situations - as W1zz's many PCIE 1.1/2.0/3.0 comparisons have shown. HPC bandwidth, both intra- and inter-nodal on the other hand....it isn't hard to see how a couple of CPUs feeding eight dual-GPU K80's or next-gen GPUsat 100% workload might produce some different effects regards bandwidth saturation compared to a gaming system.Next year for early access and test/qualification/validation. POWER9 (14nm) won't be ready for prime time until 2017, so the early systems will be based on the current POWER8
Interesting, who will have better process, GloFo 14nm or ITMS 16nm.
Samsung's 14nm were rumored to suck.Try harder:
1) GSync is as locked down as it gets (to "nope, won't license it to anyone" point)
2) adaptive sync is THE ONLY standard, (DISPLAYPORT 1.2A, THAT IS) there is no "freesync" standard.
3) nothing stops any manufacturer out there to use adaptive sync (dp 1.2a), no need to involve AMD or any of its "freesync" stuff in there
Try, $2,000.00 at least.
I have skipped 6 and 7 and 9 and 28nm on the Maxwell didn't sell me , is good now its worth the upgrade. next November 2016 black Friday is my new shopping saving from now...
...for HPC, I think latency is just as much an issue. Just as PCI-E 1.1/2.0 generally manifests as increased frame variance/stutter in comparison to 3.0 in bandwidth limiting scenarios, time to completion for GPGPU workloads is also affected by latency issues. Where time is literally money when selling time on a cluster its easy to see why Nvidia push the reduced latency of NVLink.
What we're left with is NVLink. It's interesting, if somewhat disturbing.
Right now single card dual GPU cards are don't scale great and cost a ton of money. NVLink addresses...maybe the first issue. The biggest issue is that even if it solves scaling, you've still got factor 2. As this conclusion is self evident, we're back to the NVLink announcement not being about consumer GPUs. The VRAM side definitely wasn't.
Is this good for HPC, absolutely. Once you stop caring about price, the better the interconnect speed the more you can compute. I applaud Nvidia announcing this for HPC, but it's standing against Intel. Intel is buying up semi-conductor companies for their IP, and working with other companies in their field to corner the HPC market via common interconnects (PCI-e 4.0).
The disturbing part is the upcoming war in which Intel decides to cut PCI-e lanes to make their PCI-e 4.0 standard required. The consumer Intel offerings are already a little sparse on their PCI-e lanes. I don't want Intel deciding to push less PCI-e lanes to penalize Nvidia for NVLink, which will also influence the AMD vs. Nvidia dynamic.
This is interesting, but not news for gamers. Please, show me the Pascal variant with about 8 GB of VRAM that has 60-80% better performance than my current 7970 while sipping power. Until then, thanks but I'm really not the target audience.
For example, instead of introducing PCI-e 4.0, introduce PCE (Platform Connect Experimental). 10 PCE connections are allowed to directly connect to the CPU (not interchangeable with PCI-e), while a single PCI-e lane is connected to the CPU. Intel still provides another 2 PCI-e lanes from the PCH, which don't exactly function as well for a GPU.
Intel decides to go whole hog with PCE, and cut Nvidia out of the HPC market. They allow AMD to cross-license the interconnect (under their sharing agreement for x86), but set up some substantial fees for Nvidia. In effect, Intel provides PCI-e as an option, but those who require interconnect have to forego Nvidia products.
As I read the ruling, this is technically not messing with PCI-e electrically. It's also making the HPC effectively Intel's, because the high performance needs make PCI-e unusable (despite physically being present). It follows along with the theory that PCI-e will be supplanted as well. Have I missed something here?
If you don't mind me saying so, that sounds like a completely convoluted and fucked up way to screw over a small IHV. If Intel were that completely mental about putting Nvidia out of business wouldn't they just buy it?