Arc1t3ctThe M1 Max, at least on paper, makes every other CPU seem like a decade out of date... How can this be?

dragontamer5788That's pretty big. I'm curious how this memory system works.

Its big enough that I'm instinctively thinking that's a typo there. 400GB/s is huge for a CPU / iGPU. The only systems close to that are XBox / PS5 game consoles with GDDR graphics ram.

ValantarWe know how the M1 performs - in terms of IPC it trounces both Intel and AMD, matching or beating their peak single core performance at 2/3-3/5 the clock speed (3.1GHz vs 4.8/5.3-ish). These more than double the core counts, and double/quadruple the memory bandwidth to feed the cores. Also, Apple has absolutely insane amounts of cache (at equally insane latencies) with their recent chips. This will be a beast, it just needs software to make use of the power. Which it likely will have (Adobe CS etc. are already native).

The interfaces are 256-bit (M1 Pro) and 512-bit (M1 Max). Probably a bit power hungry, sure, but they are mounted extremely close to the SoC, on the same package, so they've likely optimized for that. Plus, these are 40-60W SoCs. The memory power isn't going to be an issue.

r9Oh shiiiiiiiiiiit ....
The M1 was running Witcher 3 x86 at 30fps, I really want to see what this monster can do with 4x gpu power on games that run natively.

r9Oh shiiiiiiiiiiit ....
The M1 was running Witcher 3 x86 at 30fps, I really want to see what this monster can do with 4x gpu power on games that run natively.

dragontamer5788CPUs have to transfer data to the GPUs all the time (and sometimes rarely, maybe a GPU->CPU transfer). One of the key advantages of a SOC is that this "data transfer" takes place in L3 cache instead of over system memory.

I find it hard to believe that Microsoft would design a SOC like the XBox Series X and ignore this simple and useful optimization. I see that Microsoft is playing cute games with its 10+6 GB layout, but I'm pretty sure they're just saying that CPUs use less memory bandwidth, so 10GB of fast-RAM + 6GB of slow-RAM is intended for the CPU to use slow-RAM and GPU to use fast-RAM. But both CPU+GPU should have access to both halfs.

If for no other reason than to optimize the "no copy" methodology between CPU -> GPU data transfers. (Why ever copy data when GPUs can simply just read the RAM themselves?). In dGPU world, you need to transfer the data over PCIe because the VRAM is physically a different chip. But in XBox Series X land, VRAM and RAM are literally the same chips, no copying needed.

TheoneandonlyMrK6K , with what sounds like 3.5k minimum spend for 32 GB ram, and in some cases it's said (look around I'm not posting links to other tech sites)to be beat by the outgoing Intel 9th gen chip's sooo, there's that.

TheoneandonlyMrKUnified is exactly like the Ps5 and Xbox.
One pool of memory for any use.
So apple clearly were not first and are doing something similar..
The GPU or CPU Can make memory calls in those.
Though inevitably the MMU is going to be on the edge of the soc on a buss.

AquinusGo one their site, I just priced it out. $4,200 for the Max, 64GB of memory, and a 2TB drive which is about what I paid (sans discounts I can get,) for mine in my specs. That's really not bad considering what you're getting if you're comparing it to the previous 16". In that respect, Apple has kept pricing consistent, but has theoretically given it an absolutely massive performance uplift within the same power constraints.

Edit: Mind you that these are US prices in USD.

Bomby569I wonder how can people seriously consider buying that crap when they know, or should at least, what they do with anti consumer BS?

TiggerThese TSMC? or?

Very interesting Apple upping the ante

apoklyps3man does apple make me laugh with their closed limited OSes and their potato mobile processors.

BorisDGInteresting they are still based on the A14 platform and not A15.

windwhirlOh yeah, it's just a mobile SoC built using the most advanced node available in the world that can probably beat every other mobile SoC around singlehandedly. Nothing worthy a second of actual interest. /s

:rolleyes:

BorisDGInteresting they are still based on the A14 platform and not A15.

ValantarIt's a bit strange for you to bring up the Epyc/TR comparison just to then say it's not a valid comparison once people get into why this is likely to be more efficient.

windwhirlOh yeah, it's just a mobile SoC built using the most advanced node available in the world that can probably beat every other mobile SoC around singlehandedly. Nothing worthy a second of actual interest. /s

:rolleyes:

Minus InfinityOr AMD is going to be doing that with Zen 4/RDNA3. The consoles APU's are custom designs, not a straight up Zen 2 design. They have features not in the deskptop APU's.

WirkoWhat's the difference? Is the memory "truly unified" only if memory access is governed by a single MMU for both CPU and GPU?

dragontamer5788I mean... its called the PS5 / XBox Series X.

I'm pretty sure they have unified memory. Hell, CUDA + CPU / OpenCL + CPU has unified memory. Its just emulated over PCIe. PS5 / XBox Series X actually have the same, literal RAM work for the iGPU side and CPU side.

TheoneandonlyMrKUnified is exactly like the Ps5 and Xbox.
One pool of memory for any use.
So apple clearly were not first and are doing something similar..
The GPU or CPU Can make memory calls in those.
Though inevitably the MMU is going to be on the edge of the soc on a buss.

dragontamer5788CPUs have to transfer data to the GPUs all the time (and sometimes rarely, maybe a GPU->CPU transfer). One of the key advantages of a SOC is that this "data transfer" takes place in L3 cache instead of over system memory.

I find it hard to believe that Microsoft would design a SOC like the XBox Series X and ignore this simple and useful optimization. I see that Microsoft is playing cute games with its 10+6 GB layout, but I'm pretty sure they're just saying that CPUs use less memory bandwidth, so 10GB of fast-RAM + 6GB of slow-RAM is intended for the CPU to use slow-RAM and GPU to use fast-RAM. But both CPU+GPU should have access to both halfs.

If for no other reason than to optimize the "no copy" methodology between CPU -> GPU data transfers. (Why ever copy data when GPUs can simply just read the RAM themselves?). In dGPU world, you need to transfer the data over PCIe because the VRAM is physically a different chip. But in XBox Series X land, VRAM and RAM are literally the same chips, no copying needed.

WirkoIsn't that the case with every Intel and AMD processor with integrated graphics? At least since Haswell for Intel (AnandTech) and since Kaveri for AMD (Wikipedia).

Darmok N JaladAnandtech is speculating it’s probably 64MB on the Max, 32MB on the Pro. They are looking at the actual die shots (provided in the presentation, interestingly), not the illustrative diagram Apple used in the presentation.
www.anandtech.com/show/17019/apple-announced-m1-pro-m1-max-giant-new-socs-with-allout-performance

dragontamer5788Yeah, its not a new feature at all.



But as Wirko has pointed out: this isn't new at all. Intel / AMD chips have been doing zero-copy transfers on Windows for nearly a decade now on its iGPUs.

Yes, that is even on Windows 10, which is HyperV virtualized for security purposes. (The most secure parts of Windows start up in a separate VM these days, so that not even a kernel-level hack can reach those secrets... unless it also includes a VM-break of some kind)

Now don't get me wrong: XBox Series X has a weird / complicated memory scheme going on. But I'd still expect that this extremely strange memory scheme was unified, much akin to AMD's Kaveri or Intel iGPU stuffs that you'd find on any typical iGPU for the past decade.

Arc1t3ctThe M1 Max, at least on paper, makes every other CPU seem like a decade out of date... How can this be?

rvalencia1. For games, the shared memory usage is relatively minor. PC has reBar resize that enabled PC CPU to directly access the entire GPU's VRAM. CPU wouldn't be able to keep up with dGPU's large-scale scatter-gather capability.

2. Shared memory has its downsides with context switch overheads. CPU IO access can gimp GPU's burst mode IO access e.g. frame buffer burst IO access shouldn't be disturbed.

Late 1980s Amiga's Chip Ram is shared memory between the CPU and iGPU (custom chips).

R0H1TThat's because off hand I can't think of any other chip(s) that move such vast sums of data between massive cores, in case of Apple it's also the GPU cores now, & pay a heavy (energy) price for that. Moving (lots of) data quickly is the next big hurdle in computing & the SoC approach for now seems to be more efficient ~ the reason why it isn't directly comparable because even now the top end server chips should beat Apple in most tasks they're actually designed for but they're also generally less efficient. The SoC approach isn't really scalable beyond low double digit CPU cores especially if you're putting such a massive GPU in there!

RichardsThey wouldn't beat amd on the same node thou.. zen 4 on 5nm will crush this expensive chip

apoklyps3proof or didn't happen

ValantarYes, but that's precisely why pointing out that the M1P/M are monolithic allows for huge power savings as they don't need off-die interfaces for most of this. Keeping data on silicon is a massive power savings. Of course they're working with 10 (8+2) CPU cores and an 8-"core" GPU, not a 32-64-core CPU, so the interfaces can also be much, much simpler.

• 5nm node
• LPDDR5
• monolithic die
• UMA for much more efficient use of memory