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Intel Unleashes 56-core Xeon "Cascade Lake" Processor to Preempt 64-core EPYC

Intel late Tuesday made a boat-load of enterprise-relevant product announcements, including the all important update to its Xeon Scalable enterprise processor product-stack, with the addition of the new 56-core Xeon Scalable "Cascade Lake" processor. This chip is believed to be Intel's first response to the upcoming AMD 7 nm EPYC "Rome" processor with 64 cores and a monolithic memory interface. The 56-core "Cascade Lake" is a multi-chip module (MCM) of two 28-core dies, each with a 6-channel DDR4 memory interface, totaling 12-channel for the package. Each of the two 28-core dies are built on the existing 14 nm++ silicon fabrication process, and the IPC of each of the 56 cores are largely unchanged since "Skylake." Intel however, has added several HPC and AI-relevant instruction-sets.

To begin with, Intel introduced DL Boost, which could be a fixed-function hardware matrix multiplier that accelerates building and training of AI deep-learning neural networks. Next up, are hardware mitigation against several speculative execution CPU security vulnerabilities that haunted the computing world since early-2018, including certain variants of "Spectre" and "Meltdown." A hardware fix presents lesser performance impact compared to a software fix in the form of a firmware patch. Intel has added support for Optane Persistent Memory, which is the company's grand vision for what succeeds volatile primary memory such as DRAM. Currently slower than DRAM but faster than SSDs, Optane Persistent Memory is non-volatile, and its contents can be made to survive power-outages. This allows sysadmins to power-down entire servers to scale down with workloads, without worrying about long wait times to restore uptime when waking up those servers. Among the CPU instruction-sets added include AVX-512 and AES-NI.

AMD Ryzen 3000 "Zen 2" BIOS Analysis Reveals New Options for Overclocking & Tweaking

AMD will launch its 3rd generation Ryzen 3000 Socket AM4 desktop processors in 2019, with a product unveiling expected mid-year, likely on the sidelines of Computex 2019. AMD is keeping its promise of making these chips backwards compatible with existing Socket AM4 motherboards. To that effect, motherboard vendors such as ASUS and MSI began rolling out BIOS updates with AGESA-Combo 0.0.7.x microcode, which adds initial support for the platform to run and validate engineering samples of the upcoming "Zen 2" chips.

At CES 2019, AMD unveiled more technical details and a prototype of a 3rd generation Ryzen socket AM4 processor. The company confirmed that it will implement a multi-chip module (MCM) design even for their mainstream-desktop processor, in which it will use one or two 7 nm "Zen 2" CPU core chiplets, which talk to a 14 nm I/O controller die over Infinity Fabric. The two biggest components of the IO die are the PCI-Express root complex, and the all-important dual-channel DDR4 memory controller. We bring you never before reported details of this memory controller.

Intel Core i9-9900F Makes an Appearance in SiSoft Sandra: No iGPU, No Unlocked Multiplier

Intel has been playing with the release of multiple of their 14 nm ++ processors without any integrated graphics tech, such as the Intel Core i5-9400F, or the iGPU-less, unlocked Core i9-9900KF. However, as strange as it may seem, a quick look online still shows the i9-9900KF selling for more ($582.50) than its complete i9-9900 sibling.

The Core i9-9900F, as caught in SiSoft's Sandra, is likely simply a locked-down version of Intel's Core i9-9900, since delidding of Intel's Core i5-9400F has shown that the silicon real-estate for the iGPU is still there - as such, this likely isn't an effort from Intel to reduce the silicon used for graphics and pass on the savings to customers. At the most, this is Intel launching products that may carry defective iGPUs from the production process and still be able to sell them - though Intel does seem to be looking not to budge on its profit margin, even on these "crippled" CPUs.

China-based SMIC to Start Manufacture of 14 nm-class Chips in 2H 2019

As R&D costs for new, smaller manufacturing nodes grow at unprecedented rates across the industry, a new player is set to enter the 14 nm process manufacture competition: China-based SMIC (Semiconductor Manufacturing International Corporation). The company is looking to throw its hat on the lucrative 14 nm process, filling its offerings portfolio under the 28 nm it currently offers as its denser process.

The company expects its 95% yield rate to offer its customers a trusted platform that might help it increase revenue for further investment on its 10 nm and 7 nm EUV nodes, which the company is pursuing (despite other industry veterans, such as former AMD-manufacturing arm GLOBALFOUNDRIES having ceased development on). Manufacturing technology that's competitive with the western world's, and that's developed in-country, is paramount for China's intention of reducing its dependence of foreign technology, which is why this is such a big step for the company and the company's aspirations.

Intel's FinFET-Based Embedded MRAM is Ready for Production

A report via EETimes slates Intel's own working MRAM (Magnetoresistive Random-Access Memory) is ready for production in high-volume manufacturing. MRAM is a nonvolatile memory technology, meaning that it retains information even if there is a change in powerstate (ie, power loss), meaning that it's more akin to a storage device than to, say, RAM.

But why does MRAM matter, really? Well, MRAM is being developed as a long-term candidate to a universal memory solution, replacing both DRAM (a volatile memory technology) and NAND flash (a nonvolatile one), since node scaling with these technologies is becoming increasingly harder. MRAM promises better-scaling (at the foundry level) processes, with much higher yield rates. The fact that MRAM has been demonstrated to be able to achieve 1 ns settling times, better than the currently accepted theoretical limits for DRAM, and much higher write speeds (as much as thousands of times faster) compared to NAND flash.

Intel Rolls Out the 4 GHz Pentium Gold G5620 Processor

Intel rolled out its first Pentium-branded processor with 4.00 GHz clock-speed, the Pentium Gold G5620 (retail SKU: BX80684G5620). The chip replaces the G5600 on top of the entry-level product stack. Based on the 14 nm "Coffee Lake" microarchitecture, it packs a 2-core/4-thread CPU clocked at 4.00 GHz without Turbo Boost. 256 KB of L2 cache per core and 4 MB of shared L3 cache are also offered. The integrated graphics solution is Intel's workhorse UHD Graphics 630, with 24 execution units. The dual-channel DDR4 integrated memory controller supports up to 64 GB of DDR4-2400 memory. The chip's TDP is rated at 65W. Pricing is up in the air, with retail channel shortages expected to swing the chip on both sides of the $100-mark. Availability is slated for early-March, 2019.

AMD Updates Wafer Supply Agreement with GlobalFoundries to Free Itself of "7nm Tax"

AMD in its Q4-2018 Earnings Report disclosed that it has amended its Wafer Supply Agreement (WSA) with GlobalFoundries that frees it from paying a "7 nanometer tax." Under the older version of WSA, AMD would have had to pay a penalty to GlobalFoundries if it sourced processors from any other semiconductor foundry. The company got preferential pricing in return for the exclusivity. With GlobalFoundries discontinuing development of cutting-edge processes such as 7 nm and 5 nm, it makes sense for AMD to seek out other foundry partners, such as TSMC, and an amendment to the WSA was needed. With this amendment in place, AMD can go ahead and source 7 nm dies from TSMC without paying penalties to GlobalFoundries (GloFo).

With its "Zen 2" microarchitecture, AMD is going big on multi-chip modules, in which only those components that can tangibly benefit from the switch to the 7 nm node, namely the CPU cores, would be built on 7 nm dies, called "CPU chiplets," while components that don't need the miniaturization just yet, such as the processor's memory controller, PCIe root-complex, etc., will be built on separate dies called "I/O controllers." These dies will continue to be 14 nm, and likely supplied by GloFo. Final packaging of 7 nm CPU chiplets from TSMC, and 14 nm I/O controllers from GloFo, will happen at GloFo's facilities in China or Malaysia. AMD in its amendment committed to purchasing 14 nm and 12 nm chips from GloFo between 2019 and 2021, which means the MCM approach to processors is here to stay.

ASMedia to Continue as Chipset Supplier to AMD, But X570 an In-house Chipset

AMD's socket AM4 and socket TR4 chipsets are originally designed by ASMedia. With its "Zen" family of processors being full-fledged SoCs, the motherboard "chipset" only serves to increase connectivity, and ASMedia already holds certifications for key groups such as the PCI-SIG, USB-IF, SATA-IO, NVM-Express group, etc. It's being reported now that ASMedia will develop some, if not all 500-series chipsets, with the exception of X570. The X570 will be an in-house design by AMD, which will use its own foundry partners (likely GloFo 14 nm) to manufacture it. This presents AMD with an opportunity to harden it against vulnerabilities, and have greater control over pricing, not to mention overcoming key design shortfalls of "Promontory," such as downstream PCIe connectivity.

This flies in the face of speculation that AMD would discontinue ASMedia's supply of chipset, especially in the wake of the "Chimera" vulnerability affecting "Promontory" 300-series and 400-series chipsets. The supposedly security-hardened 500-series chipset will feature PCI-Express gen 4.0 certification. What this means is that the chipset bus between the AM4/TR4 SoC and the chipset will be PCI-Express 4.0 x4 (64 Gbps), translating to double the bandwidth. It remains to be seen if the downstream PCIe lanes put out by the chipset are gen 4.0, too. Current 400-series chipsets continue to put out stale gen 2.0 lanes, compensated for by additional gen 3.0 lanes put out by the SoC. Sources also mention that ASMedia-supplied chipsets will only hit the market toward the end of 2019, which means AMD X570 could be the only 500-series chipset option between the mid-2019 launch of 3rd generation Ryzen, and late-2019. You should be able to run these processors on older socket AM4 motherboards via BIOS updates, though.

Intel's IGP-less i9-9900KF, i7-9700KF CPUs First Listings Appear Above MSRP Pricing

Intel will be relasing IPG-less versions of their most popular desktop processors soon, if some retailers' listings of the CPUs are anything to go by. The i9-9900KF and i7-9700KF CPUs will bring about Intel's best-performing architecture to date in an integrated GPU-less package, which will allow the company to bring prices down for the end user. Of course, this has all the hallmarks of a bid for a more competitive positioning of its products against AMD's upcoming Zen 2 products, whilst simultaneously (and likely) increasing profit on every processor sold (we'd expect the savings passed on to the customer to be inferior to Intel's saved costs at the foundry level).

The i9-9900KF has been found online for $582.50, more than $50 above the i9-9900K's $530 street pricing, while the 9600KF is listed at $308.75, more than $60 over the street pricing of Intel's i7-9600K. Remember that these prices are gouged on account of limited availability on the market; when these are more widespread and the market sees stocks in line with demand expectations, these should bottom down. But then again, we've seen Intel's products being price-increased for a while as the company struggled to keep its production up to the demand, amidst a constrained and supposedly already second-line 14 nm process.

Intel's 28-core Xeon W-3175X Can be Yours for Just $3,999

So... Do you want Intel's own HCC CPU in an overclocker-friendly package? But you want in a Xeon branding and envelope, surely, because that's the only place where you can get one of these right now. Well, Intel has you covered - for $4000. Retailers in Europe, hunted by Tom's Hardware, have begun to take stock of these CPUs, and in doing so, current pricing overs around that magic $4,000 mark - at the least. Prices still haven't stabilized due to the low number of outlets offering the CPU right now, and it's likely that when it does, it will stabilize to this lowest common denominator.

The Xeon W-3175X is built on Intel's 14 nm ++ manufacturing lines, features 28 physical cores with HyperThreading, features base/boost clocks of 3.1 / 4.3 GHz respectively, support hexa-channel DDR4 memory, and offers 44 PCIe lanes. It also has a 255 W TDP. Compare these specs to AMD's Threadripper 2990WX with its 32 physical, 64 logical cores, quad-channel DDR4 support, 64 PCIe lanes, 250 W TDP (non-comparable) and $1,799 (very comparable) pricing... Well. Add in the platform cost for one of these Intel babies, with a 3,647-pin LGA3647 motherboard (some feature the most ridiculous power delivery systems you could ever think of, btw, at 32 phases).. with the requirement for 4x eight-pin EPS power connectors and 2x 24-pin connectors. Have fun.

AMD Ryzen 3000U Series APUs Detailed, Geekbenched

AMD is putting final touches on its Ryzen 3000U series APUs for ultra-portable notebooks and 2-in-1 devices. Thai PC enthusiast Tum Apisak shared links to Geekbench scores of at least three SKUs, the Ryzen 3 3200U, the Ryzen 3300U, and the Ryzen 5 3500U. The Ryzen 3 3200U combines a 2-core/4-thread CPU component, while the Ryzen 3 3300U packs a 4-core/4-thread CPU, and the Ryzen 5 3500U a better equipped 4-core/8-thread CPU. While the 3200U's CPU is clocked high at 2.60 GHz, the 3300U and 3500U are both clocked at 2.10 GHz. The iGPU specs are still under the wraps as Geekbench only tested the single- and multi-threaded CPU performance. The 3200U scores 3428 points single-threaded owing to its higher nominal clocks, and around 6500 points multi-threaded. The 3300U scores 9686 points in multi-threaded owing to its additional cores (sans SMT). The 3500U increases the multi-threaded score to over 11280 points multi-threaded, on account of being quad-core with SMT.

There's no clarity on the underlying micro-architecture. While the source mentions the codename of these chips as Picasso, the silicon still appears to be 14 nm "Raven Ridge." Over generation, AMD only appears to have pushed its current parts lower down the product stack. For example, the Ryzen 3 3300U appears to share the same CPU configuration (albeit with 5% higher clock-speeds) as the Ryzen 5 2500U from the current-generation. The Ryzen 5 3500U, on the other hand, appears to have essentially the same (again, marginally speed-bumped) CPU as the Ryzen 7 2700U. HP is ready with notebook and 2-in-1 products based on all three chips, although they're unlikely to launch before year-end. Perhaps CES could be a nice launchpad.

Intel 7nm EUV Node Back On Track, 2x Transistor Densities Over 10nm

There could be light at the end of the tunnel for Intel's silicon fabrication business after all, as the company reported that its 7 nanometer silicon fabrication node, which incorporates EUV (extreme ultraviolet) lithography, is on track. The company stressed in its Nasdaq Investors' Conference presentation that its 7 nm EUV process is de-linked from its 10 nm DUV (deep ultraviolet) node, and that there are separate teams working on their development. The 10 nm DUV node is qualitatively online, and is manufacturing small batches of low-power mobile "Cannon Lake" Core processors.

Cannon Lake is an optical shrink of the "Skylake" architecture to the 10 nm node. Currently there's only one SKU based on it, the Core i3-8121U. Intel utilized the electrical gains from the optical shrink to redesign the client-segment architecture's FPU to support the AVX-512 instruction-set (although not as feature-rich as the company's enterprise-segment "Skylake" derivatives). The jump from 10 nm DUV to 7 nm EUV will present a leap in transistor densities, with Intel expecting nothing short of a doubling. 10 nm DUV uses a combination of 193 nm wavelength ultraviolet lasers and multi-patterning to achieve its transistor density gains over 14 nm++. The 7 nm EUV node uses an extremely advanced 135 nm indirect laser, reducing the need for multi-patterning. The same laser coupled with multi-patterning could be Intel's ticket to 5 nm.

14nm 6th Time Over: Intel Readies 10-core "Comet Lake" Die to Preempt "Zen 2" AM4

If Intel's now-defunct "tick-tock" product development cadence held its ground, the 14 nm silicon fabrication node should have seen just two micro-architectures, "Broadwell" and "Skylake," with "Broadwell" being an incrementally improved optical shrink of 22 nm "Haswell," and "Skylake" being a newer micro-architecture built on a then more matured 14 nm node. Intel's silicon fabrication node advancement went off the rails in 2015-16, and 14 nm would go on to be the base for three more "generations," including the 7th generation "Kaby Lake," the 8th generation "Coffee Lake," and 9th generation "Coffee Lake Refresh." The latter two saw Intel increase core-counts after AMD broke its slumber. It turns out that Intel won't let the 8-core "Coffee Lake Refresh" die pull the weight of Intel's competitiveness and prestige through 2019, and is planning yet another stopgap, codenamed "Comet Lake."

Intel's next silicon fabrication node, 10 nm, takes off only toward the end of 2019, and AMD is expected to launch its 7 nm "Zen 2" architecture much sooner than that (debuts in December 2018). Intel probably fears AMD could launch client-segment "Zen 2" processors before Intel's first 10 nm client-segment products, to cash in on its competitive edge. Intel is looking to blunt that with "Comet Lake." Designed for the LGA115x mainstream-desktop platform, "Comet Lake" is a 10-core processor die built on 14 nm, and could be the foundation of the 10th generation Core processor family. It's unlikely that the underlying core design is changed from "Skylake" (circa 2016). It could retain the same cache hierarchy, with 256 KB per core L2 cache, and 20 MB shared L3 cache. All is not rosy in the AMD camp. The first AMD 7 nm processors will target the enterprise segment and not client, and CEO Lisa Su in her quarterly financial results calls has been evasive about when the first 7 nm client-segment products could come out. There was some chatter in September of a "Zen+" based 10-core socket AM4 product leading up to them.

AMD Doubles L3 Cache Per CCX with Zen 2 "Rome"

A SiSoft SANDRA results database entry for a 2P AMD "Rome" EPYC machine sheds light on the lower cache hierarchy. Each 64-core EPYC "Rome" processor is made up of eight 7 nm 8-core "Zen 2" CPU chiplets, which converge at a 14 nm I/O controller die, which handles memory and PCIe connectivity of the processor. The result mentions cache hierarchy, with 512 KB dedicated L2 cache per core, and "16 x 16 MB L3." Like CPU-Z, SANDRA has the ability to see L3 cache by arrangement. For the Ryzen 7 2700X, it reads the L3 cache as "2 x 8 MB L3," corresponding to the per-CCX L3 cache amount of 8 MB.

For each 64-core "Rome" processor, there are a total of 8 chiplets. With SANDRA detecting "16 x 16 MB L3" for 64-core "Rome," it becomes highly likely that each of the 8-core chiplets features two 16 MB L3 cache slices, and that its 8 cores are split into two quad-core CCX units with 16 MB L3 cache, each. This doubling in L3 cache per CCX could help the processors cushion data transfers between the chiplet and the I/O die better. This becomes particularly important since the I/O die controls memory with its monolithic 8-channel DDR4 memory controller.

Samsung AMD's Second Foundry Partner for "Polaris 30"

AMD's "Polaris 30" silicon at the heart of Radeon RX 590 graphics card is the company's first 12 nm GPU. Unlike NVIDIA, which is exclusively sourcing its "Turing" family of GPUs from TSMC, the "Polaris 30" is coming from not one, but two sources. This, according to AMD in response to a question by TechPowerUp. The two foundries manufacturing "Polaris 30" are GlobalFoundries and Samsung. AMD did not provide us with visual cues on how to tell chips made from either foundries apart (such as serial numbering schemes). Packaging of dies sourced from both foundries is done in China, and the national-origin marking for the chip is on the package, rather than printed on the die.

GlobalFoundries' 12 nanometer FinFET node, called GloFo 12LP, shares a lot of similarities with Samsung's 11LPP, because both are "nodelets" that are derived from an original 14 nm FinFET process blueprint Samsung licensed to GloFo, deployed in its facility in upstate New York, where AMD's "Zen" processors are made. GloFo's 12 nanometer process is a refinement of its 14 nm node, in which 12 nm transistors are etched onto silicon using the same lithography meant for 14 nm. It doesn't improve transistor densities, but provides dividends in power, which explains why "Polaris 30" and "Pinnacle Ridge" have the same die sizes as "Polaris 20" and "Summit Ridge," respectively. This WikiChip article provides a good explanation of how GloFo 12LP is a nodelet.

Intel Could Upstage EPYC "Rome" Launch with "Cascade Lake" Before Year-end

Intel is reportedly working tirelessly to launch its "Cascade Lake" Xeon Scalable 48-core enterprise processor before year-end, according to a launch window timeline slide leaked by datacenter hardware provider QCT. The slide suggests a late-Q4 thru Q1-2019 launch timeline for the XCC (extreme core count) version of "Cascade Lake," which packs 48 CPU cores across two dies on an MCM. This launch is part of QCT's "early shipment program," which means select enterprise customers can obtain the hardware in pre-approved quantities. In other words, this is a limited launch, but one that's probably enough to upstage AMD's 7 nm EPYC "Rome" 64-core processor launch.

It's only by late-Q1 thru Q2-2019 that the Xeon "Cascade Lake" family would be substantially launched, including lower core-count variants that are still 2-die MCMs. This aligns to preempt or match AMD's 7 nm EPYC family rollout through 2019. "Cascade Lake" is probably Intel's final enterprise microarchitecture to be built on the 14 nm++ node, and consists of 2-die multi-chip modules that feature 48 cores, and a 12-channel memory interface (6-channel per die); with 88-lane PCIe from the CPU socket. The processor is capable of multi-socket configurations. It will also be Intel's launch platform for substantially launching its Optane Persistent Memory product series.

CPU Shortages Will Continue Into the Second Quarter of 2019 According to Asustek CEO

A few weeks ago we talked about Intel problems in the production chain. The semiconductor giant was facing a shortage of 14 nm CPUs probably due to Intel allocating volumes from the same 14 nm++ node for its upcoming 9th Generation Core processors. That caused a clear rise in the prices of processors like the Core i7-8700K, which had a launch price of $359 and was hard to find for less than $400 a month ago. Prices have relaxed since then, but are still higher than their launch ones.

Intel's processor shortage could continue in the coming months, and in fact Jerry Shen, CEO of Asustek Computer, explained how the problem will continue until at least the second quarter of 2019. In his words, "the continued CPU supply crunch, escalating US-China trade disputes, and increasing competition in the notebook segment in Europe have pressed down Asustek's "operational visibility" for the fourth quarter of 2018 to the lowest level of 20% compared to an over 50% seen in previous years".

AMD Zen 2 "Rome" MCM Pictured Up Close

Here is the clearest picture of AMD "Rome," codename for the company's next-generation EPYC socket SP3r2 processor, which is a multi-chip module of 9 chiplets (up from four). While first-generation EPYC MCMs (and Ryzen Threadripper) were essentially "4P-on-a-stick," the new "Rome" MCM takes the concept further, by introducing a new centralized uncore component called the I/O die. Up to eight 7 nm "Zen 2" CPU dies surround this large 14 nm die, and connect to it via substrate, using InfinityFabric, without needing a silicon interposer. Each CPU chiplet features 8 cores, and hence we have 64 cores in total.

The CPU dies themselves are significantly smaller than current-generation "Zeppelin" dies, although looking at their size, we're not sure if they're packing disabled integrated memory controllers or PCIe roots anymore. While the transition to 7 nm can be expected to significantly reduce die size, groups of two dies appear to be making up the die-area of a single "Zeppelin." It's possible that the CPU chiplets in "Rome" physically lack an integrated northbridge and southbridge, and only feature a broad InfinityFabric interface. The I/O die handles memory, PCIe, and southbridge functions, featuring an 8-channel DDR4 memory interface that's as monolithic as Intel's implementations, a PCI-Express gen 4.0 root-complex, and other I/O.

AMD Unveils "Zen 2" CPU Architecture and 7 nm Vega Radeon Instinct MI60 at New Horizon

AMD today held its "New Horizon" event for investors, offering guidance and "color" on what the company's near-future could look like. At the event, the company formally launched its Radeon Instinct MI60 GPU-based compute accelerator; and disclosed a few interesting tidbits on its next-generation "Zen 2" mircroarchitecture. The Instinct MI60 is the world's first GPU built on the 7 nanometer silicon fabrication process, and among the first commercially available products built on 7 nm. "Rome" is on track to becoming the first 7 nm processor, and is based on the Zen 2 architecture.

The Radeon Instinct MI60 is based on a 7 nm rendition of the "Vega" architecture. It is not an optical shrink of "Vega 10," and could have more number-crunching machinery, and an HBM2 memory interface that's twice as wide that can hold double the memory. It also features on-die logic that gives it hardware virtualization, which could be a boon for cloud-computing providers.

Intel to Outsource Entry-level CPU and Chipset Fabrication to TSMC

Intel is facing a manufacturing crisis, in which demand has far outstripped supply, and the company is firing up all its silicon fabrication facilities to manufacture 14 nm products, mainly processors under the Core and Xeon brands. We've been hearing reports since early-September of Intel seeking out third-party foundries such as TSMC to manufacture its chipsets. We now get confirmation that TSMC will also manufacture entry-level Intel processors under brands such as Atom, Celeron, and Pentium Silver SoCs, leaving the company's socketed processors to Intel's fabs. DigiTimes does not name the third-party foundry as TSMC, but mentions that the only company that meets Intel's requirements at the moment is TSMC.

Intel At Least 5 Years Behind TSMC and May Never Catch Up: Analyst

Intel's in-house sub-10 nanometer silicon fabrication dreams seem more distant by the day. Raymond James analyst Chris Caso, in an interview with CNBC stated that Intel's 10 nm process development could set the company back by at least 5 years behind TSMC. In its most recent financial results call, Intel revised its 10 nm outlook to reflect that the first 10 nm processors could only come out by the end of 2019. "Intel's biggest strategic problem is their delay on 10nm production - we don't expect a 10nm server chip from Intel for two years," analyst Chris Caso said in a note to clients Tuesday. "10nm delays create a window for competitors, and the window may never again close."

By that time, Intel will have missed several competitive milestones behind TSMC, which is in final stages of quantitatively rolling out its 7 nm process. Caso predicts that by the time Intel goes sub-10 nm (7 nm or something in that nanoscopic ballpark), TSMC and Samsung could each be readying their 5 nm or 3 nm process roll-outs. A Rosenblatt Securities report that came out late-August was even more gloomy about the situation at Intel foundry. It predicted that foundry delays could set the company back "5, 6, or even 7" years behind rivals. Intel is already beginning offload some of its 14 nm manufacturing to TSMC. Meanwhile, AMD is reportedly planning to entirely rely on TSMC to make its future generations of "Zen" processors.

AMD "Navi" GPU Architecture Successor Codenamed "Arcturus"?

Arcturus is the fourth brightest star in the night sky, and could be the a new GPU architecture by AMD succeeding "Navi," according to a Phoronix report. The codename of Navi-successor has long eluded AMD's roadmap slides. The name "Arcturis" surfaced on Phoronix community forums, from a post by an AMD Linux liaison who is a member there. The codename is also supported by the fact that AMD is naming its GPU architectures after the brightest stars in the sky (albeit in a descending order of their brightness). Polaris is the brightest, followed by Vega, Navi, and Arcturus.

AMD last referenced the Navi-successor on a roadmap slide during its 2017 Financial Analyst Day presentation by Mark Papermaster. That slide mentioned "Vega" to be built on two silicon fabrication processes, 14 nm and "14 nm+." We know now that AMD intends to build a better-endowed "Vega" chip on 7 nm, which could be the world's first 7 nm GPU. "Navi" is slated to be built on 7 nm as the process becomes more prevalent in the industry. The same slide mentions Navi-successor as being built on "7 nm+," which going by convention, could refer to an even more advanced process than 7 nm. Unfortunately, even in 2017, when the industry was a touch more optimistic about 7 nm, AMD expected the Navi-successor to only come out by 2020. We're not holding our breath.

TSMC to Build Intel 14nm Processors and Chipsets

Try to wrap your head around Intel contracting TSMC to build some of its processors! With its own 14 nanometer silicon fabrication nodes under stress from manufacturing several generations of Core and Xeon processors simultaneously, leading to market shortages, Intel is looking to contract TSMC to manufacture some of its 14 nm products. Among these are certain models of its desktop processors, and several 300-series chipsets, including the H310, which are currently fabbed on Intel's last 22 nm node, that's probably being converted to 14 nm.

The TSMC contract appears to be moving faster than expected, with the Taiwanese fab eager to demonstrate its competence to Intel and secure future orders as the company is closer than ever in going fully or partly fabless. According to industry observers, Intel is staring at a 1:2 supply-demand ratio, for the countless chip it's building on 14 nm; which may have forced it to contract some of these chip designs to TSMC. Motherboard vendors expect Intel to sort out its supply issues by the end of 2018, with big help from TSMC.

Intel 14nm Processors Face Shortages

Intel's 8th generation Core desktop processors based on the company's 14 nm node are facing shortages in the market, according to a Tom's Hardware report. Tracking prices and availability of popular 8th generation Core SKUs such as the i5-8400, i5-8600K, and i7-8700K, the report notes that retailers are heavily marking up these SKUs above their SEP, and many of whom are running out of stock often. This may not be attributed to heavy demand.

A possible explanation for these shortages could be Intel allocating volumes from the same 14 nm++ node for its upcoming 9th generation Core processors, which debut with three SKUs - i5-9600K, i7-9700K, and i9-9900K. Intel probably wants to launch the three chips not just at competitive prices, but also good enough volumes to win the 2018 Holiday season, and repair its competitiveness damaged by AMD 2nd generation Ryzen over the past couple of quarters.

AMD Athlon Pro 200GE Detailed: An Extremely Cut-down "Raven Ridge" at $55

AMD is giving finishing touches to its Athlon Pro 200GE socket AM4 SoC, which it could position against Intel's $50-ish Celeron LGA1151 SKUs. Leaked slides by PCEva reveals that it's a heavily cut-down 14 nm "Raven Ridge" die. For starters, unlike previous-generation Athlon-branded products on platforms such as FM2, the Athlon 200GE won't lack integrated graphics. Only 3 out of 11 Vega NGCUs will be enabled, translating to 192 stream processors, which should be enough for desktop, 2D, and video acceleration, but not serious gaming, even at low resolutions.

The CPU config is 2-core/4-thread, with 512 KB L2 cache per core, and 4 MB shared L3 cache. The CPU is clocked at 3.20 GHz, with no Precision Boost features. You still get GuardMI commercial-grade hardware security features. There is a big catch with one of its uncore components. The PCIe root-complex only supports PCI-Express 3.0 x4 out of your motherboard's topmost x16 slot, not even x8. Ryzen "Raven Ridge" APUs already offer a crippled x8 connectivity through this slot. AMD claims that the Athlon 200GE will be "up to 19 percent faster" than Intel Pentium G4560 at productivity work. When it launches on 6th September with market availability from 18th September, the Athlon Pro 200GE will be priced at USD $55.
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