Sunday, August 30th 2020

Intel 11th Gen Core "Tiger Lake" Promotional Videos Leak

Promotional videos of Intel 11th Gen Core "Tiger Lake" processors leaked to the web courtesy h0x0d on Twitter. It confirms the new corporate identity of Intel, along with its new logo artistic language. It also confirms the new EVO Powered by Core brand extension, along with a separate case badge for notebooks that use Iris Xe discrete graphics (DG1) in addition to the Xe Gen12 iGPU of "Tiger Lake." Intel has a technology that can get the Xe LP iGPU and dGPU to work in tandem. VideoCardz compiled some interesting frames from the promotional videos, revealing bits such as clock speeds of up to 4.80 GHz (boost), 3.11 GHz (base), the first "Tiger Lake" parts being 4-core/8-thread, the new 10 nm SuperFin transistor, wafer- and die shots of "Tiger Lake" 4c+96EU die, and unless we're mistaken, pictures of a "Tiger Lake" package that uses a DRAM (HBM?) stack on-package, using EMIB. h0x0d also posted videos of the Lenovo Yoga 9i and HP Spectre notebooks based on "Tiger Lake."
Sources: h0x0d (Twitter), VideoCardz
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12 Comments on Intel 11th Gen Core "Tiger Lake" Promotional Videos Leak

#1
jeremyshaw
Not seeing the HBM you are claiming to see. What's the timestamp in the video for that?

if it's the images of the CPU+southbridge package or the PCB layout, neither are indicative of HBM and Intel has been packaging their southbridge into the substrate since at least the 4th gen Core-i CPUs (U series; and the first gen Core-i had a few versions which put the Northbridge on the package [modern phrase: chiplet I/O die with integrated graphics processor]).

Either way, other leaks indicate the U series are getting stuck with 4 cores, again. Intel couldn't even spot one more core in there, eh? Oh, well. Nobody said Intel had to win vs AMD. 2nd place/loser is an acceptable position for Intel, and one they should get used to.
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#3
yotano211
QUANTUMPHYSICS
Wow... we already at 11th?
Every year there is an added 1 to each generation
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#4
Vayra86
Intel taking a step further into bizarre marketing worlds and a step further away from reality.

I wonder how this will fly for them. But new logo's dont win benchmarks.
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#5
Caring1
Vayra86
Intel taking a step further into bizarre marketing worlds and a step further away from reality.

I wonder how this will fly for them. But new logo's dont win benchmarks.
Intel CEO Bob Swan: "We should see this moment [the COVID-19 pandemic] as an opportunity to shift our focus as an industry from benchmarks".
Linus Torvalds: "I hope AVX512 dies a painful death, and that Intel starts fixing real problems instead of trying to create magic instructions to then create benchmarks that they can look good on."
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#6
Vayra86
Caring1
Intel CEO Bob Swan: "We should see this moment [the COVID-19 pandemic] as an opportunity to shift our focus as an industry from benchmarks".
Linus Torvalds: "I hope AVX512 dies a painful death, and that Intel starts fixing real problems instead of trying to create magic instructions to then create benchmarks that they can look good on."
They really can't make up their mind can they. Bob barely finished his sentence and the next PR piece about how Intel beats everyone everywhere comes out... with glaring inconsistencies.

Maybe the corporate disguise identity will help them this time :roll::roll: It really is entertaining to watch them twist and turn around reality and the inevitable upcoming slaughter of their biglittle concept.
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#7
Am*
QUANTUMPHYSICS
Wow... we already at 11th?
Yep -- this must be Skylake+++++
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#8
yeeeeman
QUANTUMPHYSICS
Wow... we already at 11th?
Yeah, we're already at 4000 series at AMD....
Caring1
Intel CEO Bob Swan: "We should see this moment [the COVID-19 pandemic] as an opportunity to shift our focus as an industry from benchmarks".
Linus Torvalds: "I hope AVX512 dies a painful death, and that Intel starts fixing real problems instead of trying to create magic instructions to then create benchmarks that they can look good on."
Bob Swan is not the right man for Intel....I don't know why he's clinging to that seat, he should go and search for other avenues since Intel needs an engineer at its core to run the company.
Vayra86
They really can't make up their mind can they. Bob barely finished his sentence and the next PR piece about how Intel beats everyone everywhere comes out... with glaring inconsistencies.

Maybe the corporate disguise identity will help them this time :roll::roll: It really is entertaining to watch them twist and turn around reality and the inevitable upcoming slaughter of their biglittle concept.
Big little is the future....even AMD is patenting it and probably getting a shot at it.
Increasing IPC in a core means one thing. That core will get fatter and fatter and fatter and you can gate it and turn it off so muchuntil you hit a wall and that is your lowest wattage.
So if AMD or Intel want to double their IPC in the next 5 years (and they need to do it since Apple A14 big core might just have the same IPC as Zen 2 and Skylake), they simply have no other choice than go big little if they wanna keep especially power in check.
And don't forget than AMD Zen 2 core is a relatively modest core in terms of IPC. It is 5-10% better than Skylake which is a core from 2015.
AMD is adding more and more IPC, Zen 3 will be 20% better, Zen 4 hopefully the same or more. All that extra IPC means more units, more power, so they will be forced to go big little as well, unless they find some other technical idea/solution for this problem.
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#9
Vayra86
yeeeeman
Yeah, we're already at 4000 series at AMD....


Bob Swan is not the right man for Intel....I don't know why he's clinging to that seat, he should go and search for other avenues since Intel needs an engineer at its core to run the company.


Big little is the future....even AMD is patenting it and probably getting a shot at it.
Increasing IPC in a core means one thing. That core will get fatter and fatter and fatter and you can gate it and turn it off so muchuntil you hit a wall and that is your lowest wattage.
So if AMD or Intel want to double their IPC in the next 5 years (and they need to do it since Apple A14 big core might just have the same IPC as Zen 2 and Skylake), they simply have no other choice than go big little if they wanna keep especially power in check.
And don't forget than AMD Zen 2 core is a relatively modest core in terms of IPC. It is 5-10% better than Skylake which is a core from 2015.
AMD is adding more and more IPC, Zen 3 will be 20% better, Zen 4 hopefully the same or more. All that extra IPC means more units, more power, so they will be forced to go big little as well, unless they find some other technical idea/solution for this problem.
I think further specialized cores are the future. I think also the recent Intel architecture slides with more variability in resources for each chiplet are in the cards, yes. But the current implementation Intel has... nope. Its a drawback in every situation.
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#10
medi01
Vayra86
Intel taking a step further into bizarre marketing worlds and a step further away from reality.
They are well prepared for that now that Raja The Almighty Koduri is with them.
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#11
efikkan
yeeeeman
Big little is the future....even AMD is patenting it and probably getting a shot at it.
Perhaps, perhaps not. We have heared things like this before.
I'm not a fan of it, and don't believe it belongs on the desktop, since this puts a tremendous burden on the OS scheduler to manage it well, possibly to the extent where the OS needs a firmware module per CPU microarchitecture like on ARM.
There is also a risk that this will end up only looking well in synthetic benchmarks but induce terrible latency in reality.
yeeeeman
Increasing IPC in a core means one thing. That core will get fatter and fatter and fatter and you can gate it and turn it off so muchuntil you hit a wall and that is your lowest wattage.
"Fatter" in terms of transistors, yes, but not necesassarily in terms of die space.
Die sizes:
Sandy Bridge: 18.5 mm²
Skylake: 8.7 mm²
Ice Lake: 6.9 mm²

At the moment, we're hitting a clock speed wall, and will continue to do so until we get wastly different materials. So any architectural improvement which can yield a substantial IPC gain is worth it. As we can see with Intel's 14nm, it remains very energy efficient at ~4 GHz, but gets terribly inefficient at >4.5 GHz. So trading off some max boost clocks for higher IPC is certainly a good idea.
yeeeeman
So if AMD or Intel want to double their IPC in the next 5 years (<snip>), they simply have no other choice than go big little if they wanna keep especially power in check.
Perhaps for mobile devices.
But there are substantial improvements coming down the line. Significant IPC gains may also help energy efficiency, at least for demanding threads. Small cores only makes sense for non-demanding threads.
yeeeeman
and they need to do it since Apple A14 big core might just have the same IPC as Zen 2 and Skylake
IPC is Instructions Per Clock, not performance per clock. Comparing IPC across ISAs is completely pointless. ARM needs more instructions to do the same amount of work, especially compared to advanced x86 instructions which can eliminate a lot of branching logic. A RISC design will never be able to compete with x86 in this way.
yeeeeman
And don't forget than AMD Zen 2 core is a relatively modest core in terms of IPC. It is 5-10% better than Skylake which is a core from 2015.
Actually not. Zen 2 wins with heavy multithreaded workloads because Skylake have to throttle due to the inferior node, resulting in Skylake running much lower clocks than advertised for heavy multithreaded workloads.
yeeeeman
AMD is adding more and more IPC, Zen 3 will be 20% better, Zen 4 hopefully the same or more. All that extra IPC means more units, more power, so they will be forced to go big little as well, unless they find some other technical idea/solution for this problem.
I certainly hope Zen 3 and Zen 4 will push the performance levels forward, but I don't think it's an established fact that Zen 3 will offer "20%" more performance, and under which conditions.

I don't know what architectural innovations AMD have in store, but apparently Golden Cove (Sapphire Rapids) is "significantly bigger" than Sunny Cove (Ice Lake), and Intel are working on things like "threadlets" and ISA improvements. We are nowhere near a theoretical limit in single core speed, but it's a balancing act. For Haswell and Skylake Intel prioritized SIMD performance and cache bandwidth, benefiting many workloads substantially, while others got minimal gains. Going forward, we should expect both AMD and Intel to create more advanced front-ends, more execution ports with more ALUs and FPU/vector units, etc.
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#12
RandallFlagg
Not sure if anyone here bothered to watch those videos from these posts. Said it before am saying it again, there will be much AMD fanboy butthurt when the full performance of these chips becomes public.

This should also stoke some fear into Nvidia / AMD about their dGPU lineups.


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