Friday, June 4th 2021

TSMC 4nm Production Hit By... A Full Quarter Advance?

Here's something that has been sorely missing from tech news: good news. It seems that TSMC's development on the 4 nm manufacturing process is running better than anticipated by the company itself, which has prompted for a full quarter advancement for the test production on TSMC's next miniaturization level. Previously scheduled for test production starting on 4Q 2021, TSMC has announced that it has now moved test production to 3Q 2021.

This could mean an equivalent - or perhaps even better - reduction in volume production and time-to-market, but it's anyone's guess at this point. As notably difficult and onerous as semiconductor development is, problems are more likely to appear than not. 4 nm is expected to bring respectable improvements to the PPA equation for semiconductors over 5 nm - however, TSMC still hasn't disclosed expected gains.
Source: TSMC
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49 Comments on TSMC 4nm Production Hit By... A Full Quarter Advance?

#1
ShurikN
They had us in the first half, not gonna lie.
Posted on Reply
#3
Wirko
Solid State Soul ( SSS )Lets assume we reach 1nm node, whats next after that ?
Ecks, wye, zed, alpha, beta, gamma, and so on, until omega. By the time we reach omega, DRAM manufacturers will already run out of alphabets and will be using Chinese characters.
Posted on Reply
#4
bonehead123
Lets assume we reach 1nm node, whats next after that ?
pm (picometer)
zm (zeptometer)
ym (Yoctometer)
PL (Planck length, widely considered to be the smallest measure of distance, equal to about 1.6 x 10-35m.)

then comes No.Sm.TT...... as in No Smaller than this, hehehe :)
Posted on Reply
#5
londiste
N4 is an N5 optimization.
The next full node is N3.
Posted on Reply
#6
The red spirit
Solid State Soul ( SSS )Lets assume we reach 1nm node, whats next after that ?
We are nowhere close to 1nm and we are still on double digit nanometers. 7nm, 4nm are just marketing junk.

Real nm if Intel "10nm" process would be like 12nm:
en.wikipedia.org/wiki/10_nm_process

TSMC's "7nm" process is closer to 12nm too:
en.wikipedia.org/wiki/7_nm_process

And from all manufacturers Samsung lies the most about actual nms. Their 5nm process is likely 12-14nm.
Posted on Reply
#7
Solid State Soul ( SSS )
The red spiritWe are nowhere close to 1nm and we are still on double digit nanometers. 7nm, 4nm are just marketing junk.

Real nm if Intel "10nm" process would be like 12nm:
en.wikipedia.org/wiki/10_nm_process

TSMC's "7nm" process is closer to 12nm too:
en.wikipedia.org/wiki/7_nm_process

And from all manufacturers Samsung lies the most about actual nms. Their 5nm process is likely 12-14nm.
Hmm, so what does that makes Nvidia's ampere 8nm ?
Posted on Reply
#8
londiste
Solid State Soul ( SSS )Hmm, so what does that makes Nvidia's ampere 8nm ?
Samsung's improved 10nm process.
Posted on Reply
#9
The red spirit
Solid State Soul ( SSS )Hmm, so what does that makes Nvidia's ampere 8nm ?
Closer to 14 nm
Posted on Reply
#10
TumbleGeorge
In all nodes important characteristic is not transistor thickness. But all manufacturers write exactly this number.
Posted on Reply
#11
Wirko
It's funny, everyone but TSMC loves and uses the "TSMC 4nm" designation. TSMC are reluctant to use it, they rather call it N4.
Posted on Reply
#12
Richards
Fake names
The red spiritCloser to 14 nm
Lies intel is nit in the same league as Samsung
Posted on Reply
#13
thevoiceofreason
And half of the capacity will immediately go into smartphone SoCs :mad:
In 2021 Apple+Qualcomm+Broadcom+Mediatek was exactly 50%.
Posted on Reply
#14
PapaTaipei
When you realise that every new node are more expensive per transistors and not much efficient, and that they have to disable a lot of them, the gains are debatable.
Posted on Reply
#15
Imsochobo
Solid State Soul ( SSS )Hmm, so what does that makes Nvidia's ampere 8nm ?
not that far off tsmc 1st gen 7nm (radeon 7) but some ways away from current 7nm from tsmc.
I'd say on par with intel 10nm ?
Posted on Reply
#16
The red spirit
RichardsLies, Intel is not in the same league as Samsung
Any data to back up this claim?
Posted on Reply
#17
DeathtoGnomes
God forbid any other manufacturer ever have early results like this, let alone report such things. But, will this lead to early production as well, that is the big Q.
Posted on Reply
#18
Wirko
thevoiceofreasonIn 2021 Apple+Qualcomm+Broadcom+Mediatek was exactly 50%.
Are you writing this to us from the future?
Posted on Reply
#19
DeathtoGnomes
WirkoAre you writing this to us from the future?
The magic 8-ball says YES.

Posted on Reply
#20
dyonoctis
thevoiceofreasonAnd half of the capacity will immediately go into smartphone SoCs :mad:
In 2021 Apple+Qualcomm+Broadcom+Mediatek was exactly 50%.
Iirc, smartphone don't really use "inbetween" nodes
Posted on Reply
#21
mtcn77
PapaTaipeiWhen you realise that every new node are more expensive per transistors and not much efficient, and that they have to disable a lot of them, the gains are debatable.
Omg is this a joke, wow! The transistors are a joke to you? This has got to be pretty unfortunate for TSMC, yippie Intel...
The red spiritAnd from all manufacturers Samsung lies the most about actual nms.
Scale is junk, the cost is resistance. You pay it in performance if you consider scale the norm.
Posted on Reply
#22
The red spirit
mtcn77Scale is junk, the cost is resistance. You pay it in performance if you consider scale the norm.
Can you speak in English?
Posted on Reply
#23
mtcn77
The red spiritCan you speak in English?
Generally not, I stop and think...
Posted on Reply
#24
mechtech
There's money in them silicon wafers......................
Posted on Reply
#25
Totally
bonehead123pm (picometer)
zm (zeptometer)
ym (Yoctometer)
PL (Planck length, widely considered to be the smallest measure of distance, equal to about 1.6 x 10-35m.)

then comes No.Sm.TT...... as in No Smaller than this, hehehe :)
150 pm is pretty much the floor unless, some figures out how to fabricate chips using sub-atomic particles.
Posted on Reply
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