Friday, November 22nd 2024
AMD's Future Ryzen SoCs May Feature New Chip-Stacking Technology
AMD has recently filed a patent revealing plans to implement "multi-chip stacking" in future Ryzen SoCs, as Wccftech reports, quoting a post on X from @coreteks: "New patent from AMD shows how future Zen SoCs could look. Basically a novel packaging design that enables compact chip stacking and interconnection by having them partially overlap, as in this figure. The dotted line is a larger die stacked on top of those smaller ones". The patent details a new approach where smaller chiplets partially overlap with a larger die, creating space for additional components and functions on the same die. This strategy aims to improve the efficiency of the contact area, thus making room for higher core counts, larger caches, and increased memory bandwidth within the same die size. The proposed stacking will reduce the physical distance between components through overlapping chiplets, thus minimizing interconnect latency and achieving faster communication between different chip parts. The design will also improve power management, as the segregated chiplets allow for better control of each unit through power gating.
Even if long-time rival Intel has lost some of its momentum (and market share) this year, AMD's chance to push ahead with its intention to become number one in the market is to continue to innovate. In the same way that its 3D V-Cache technology made the X3D processor lineup so successful, this chip stacking approach could play a major role in future AMD Ryzen SoCs. It seems that AMD is committed to moving away from the monolithic design era and taking the road of multi-chiplet; however, it can be a long wait until (and if) this chip stacking will complete the journey from patents to design, production, and final product.
Sources:
Wccftech, @coreteks
Even if long-time rival Intel has lost some of its momentum (and market share) this year, AMD's chance to push ahead with its intention to become number one in the market is to continue to innovate. In the same way that its 3D V-Cache technology made the X3D processor lineup so successful, this chip stacking approach could play a major role in future AMD Ryzen SoCs. It seems that AMD is committed to moving away from the monolithic design era and taking the road of multi-chiplet; however, it can be a long wait until (and if) this chip stacking will complete the journey from patents to design, production, and final product.
38 Comments on AMD's Future Ryzen SoCs May Feature New Chip-Stacking Technology
hc34.hotchips.org/assets/program/conference/day2/Mobile%20and%20Edge/Meteor_Lake_Hotchips%20_%20Wilfred%20_%20final_submit%20(1).pdf
Does anyone know what this technique is? Post the link here if you find it please.
AMD could use it to transfer heat from the bottom side of the dies to the coolers' heatsink.
And even if it doesn't improve latency directly, it can do it indirectly: less distance means less power, less power means higher clocks, and higher clocks can also reduce latency.
Would IF be able to sustain higher clocks from either moving to silicon or from power reduction? I don't truly know - I think the GPU/HPC implementations have gone primarily wider for more bandwidth.
Gonna be interesting to see what AMD does.
The cooler could be connected to the motherboard via a USB cable, for example.
Enthusiasts have tried cooling CPUs with Peltiers since time immemorial, CPU cooler manufacturers have given it a go and from ones you mentioned at least Intel has dabbled into doing something with it. It has not broken into mainstream and there are good reasons for it. There are application to Peltiers and that includes chip cooling at times but these are very specific very niche use cases.
- First, it consumes considerable amount of power to function in the first place.
- Second, also related to the first one - while its cold side does get cold the hot side also gets much more hot. Not only hot because of the heat it moves from cold side but because of the wattage it pulls to function.
- Third, there is a limit to the amount of heat a specific unit is able to remove. IIRC a CPU sized piece (say, 50x50mm) usually can handle like 100W or so.
From practical aspects, you still need a way to cool off that hot side. And on the cold side condensation tends to be a thing which electronics dislikes.
Btw, TEC is usually the keyword for Peltier in CPU coolers if you want to search and read up on it.