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Micron and MediaTek First to Validate LPDDR5X

Micron Technology, Inc. announced today that MediaTek Inc. has validated Micron's low-power double data rate 5X (LPDDR5X) DRAM for MediaTek's new Dimensity 9000 5G flagship chipset for smartphones. Micron is the first semiconductor company to sample and validate this fastest, most advanced mobile memory in the industry and has shipped the first batch of samples of LPDDR5X built on its first-to-market 1α (1-alpha) node. Designed for high-end and flagship smartphones, Micron's LPDDR5X allows the smartphone ecosystem to unlock the next wave of data-intensive applications powered by artificial intelligence (AI) and 5G innovation.

The market delivery and validation of Micron's industry-leading 1α-based LPDDR5X solidifies its product innovation and leadership in the mobile ecosystem, following industry-first launches for LPDDR5, 1α-based LPDDR4X, 176-layer NAND-based UFS 3.1 and uMCP5 solutions. This most recent milestone follows quickly on the heels of JEDEC's July release of the LPDDR5X extension to LPDDR5, created to offer higher bandwidth and memory speed for enhanced 5G communication and performance while still conserving power. Micron has validated samples supporting data rates up to 7.5 Gb/s, with samples supporting data rates up to 8.533 Gb/s to follow. Peak LPDDR5X speeds of 8.533 Gb/s deliver up to 33% faster performance than previous-generation LPDDR5.

"Innovating cutting-edge smartphone experiences requires memory technology built to address the massive bandwidth demands of the mobile market," said Raj Talluri, senior vice president and general manager of Micron's Mobile Business Unit. "Our collaboration with MediaTek to validate the world's most advanced mobile memory empowers the ecosystem to deliver the next wave of rich mobile features enhanced by 5G and AI."

MediaTek Announces Flagship Dimensity 9000 5G SoC on TSMC 4 nm

A few years ago, MediaTek decided to leave the high-end mobile device SoC space as it decided to focus on the mid-range and entry level market, but as of today, that is no longer the case. The company has announced its new flagship Dimensity 9000 SoC and it packs all the latest cutting edge mobile SoC features you'd expect to see.

The Dimensity 9000 is based entirely on the new Arm v9 architecture and the chip itself is built in TSMC's 4 nm node, which gives MediaTek a lead on all its competitors, but Apple. As for the Arm cores in question, the main core is a Cortex-X2 at 3.05 GHz, which is accompanied by three Cortex-A710 cores at 2.85 GHz and four power efficient Cortex-A510 cores at 1.8 GHz. All of these new Arm cores were only announced at the end of May this year, so MediaTek has clearly been burning the midnight oil to get the Dimensity 9000 out before its competitors' new chips based on the Arm v9 architecture.

Intel "Meteor Lake" Chips Already Being Built at the Arizona Fab

With its 12th Gen Core "Alder Lake-P" mobile processors still on the horizon, Intel is already building test batches of the 14th Gen "Meteor Lake" mobile processors, at its Fab 42 facility in Chandler, Arizona. "Meteor Lake" is a multi-chip module that leverages Intel's Foveros packaging technology to combine "tiles" (purpose built dies) based on different silicon fabrication processes depending on their function and transistor-density/power requirements. It combines four distinct tiles across a single package—the compute tile, with the CPU cores; the graphics tile with the iGPU: the SoC I/O tile, which handles the processor's platform I/O; and a fourth tile, which is currently unknown. This could be a memory stack with similar functions as the HBM stacks on "Sapphire Rapids," or something entirely different.

The compute tile contains the processor's various CPU core types. The P cores are "Redwood Cove," which are two generations ahead of the current "Golden Cove." If Intel's 12-20% generational IPC uplift cadence holds, we're looking at cores with up to 30% higher IPC than "Golden Cove" (50-60% higher than "Skylake."). "Meteor Lake" also debuts Intel's next-generation E-core, codenamed "Crestmont." The compute tile is rumored to be fabricated on the Intel 4 node (optically a 7 nm-class node, but with characteristics similar to TSMC N5).

Samsung Develops Industry's First LPDDR5X DRAM

Samsung Electronics Co., Ltd., the world leader in advanced memory technology, today announced that it has developed the industry's first 14-nanometer (nm) based 16-gigabit (Gb) Low Power Double Data Rate 5X (LPDDR5X) DRAM, designed to drive further growth throughout the high-speed data service applications including 5G, artificial intelligence (AI) and the metaverse.

"In recent years, hyperconnected market segments such as AI, augmented reality (AR) and the metaverse, which rely on extremely fast large-scale data processing, have been rapidly expanding," said SangJoon Hwang, senior vice president and head of the DRAM Design Team at Samsung Electronics. "Our LPDDR5X will broaden the use of high-performance, low-power memory beyond smartphones and bring new capabilities to AI-based edge applications like servers and even automobiles."

JEDEC Publishes the New LPDDR5X Memory Standard

JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced the publication of JESD209-5B, Low Power Double Data Rate 5 (LPDDR5). JESD209-5B includes both an update to the LPDDR5 standard that is focused on improving performance, power and flexibility, and a new LPDDR5X standard, which is an optional extension to LPDDR5.

Taken together, LPDDR5 and LPDDR5X are designed to significantly boost memory speed and efficiency for a variety of uses including mobile devices, such as 5G smartphones and artificial intelligence (AI) applications. Developed by JEDEC's JC-42.6 Subcommittee for Low Power Memories, JESD209-5B is available for download from the JEDEC website.
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