Wednesday, November 12th 2014

TSMC 16FinFET Plus Process Achieves Risk Production Milestone

TSMC today announced its 16-nanometer FinFET Plus (16FF+) process is now in risk production. This enhanced version of TSMC's 16FF process operates 40% faster than the company's planar 20-nanometer system-on-chip (20SoC) process, or consumes 50% less power at the same speed. It offers customers a new level of performance and power optimization targeted at the next generation of high-end mobile, computing, networking, and consumer applications.

TSMC's 16nm process offers an extended scaling of advanced SoC designs and is verified to reach speeds of 2.3GHz with ARM's "big" Cortex-A57 in high-speed applications while consuming as little as 75mW with the "LITTLE" Cortex-A53 in low-power applications. It is making excellent progress in yield learning, and has achieved the best technology maturity at the same corresponding stage as compared to all TSMC's previous nodes.

"Our successful ramp-up in 20SoC has blazed a trail for 16FF and 16FF+, allowing us to rapidly offer a highly competitive technology to achieve maximum value for customers' products," said TSMC President and Co-CEO, Dr. Mark Liu. "We believe this new process can provide our customers the right balance between performance and cost so they can best meet their design requirements and time-to-market goals."

TSMC's comprehensive 16FF+ design ecosystem supports a wide variety of EDA tools and hundreds of process design kits with more than 100 IPs, all of which have been silicon validated. Backed by the resources of the biggest design ecosystem in the industry, TSMC and its customers are starting intensive design engagements, paving the way for future product tape-outs, pilot activities and early sampling.

The 16FF+ process is on track to pass full reliability qualification later in November, and nearly 60 customer designs are currently scheduled to tape out by the end of 2015. Due to rapid progress in yield and performance, TSMC anticipates 16FF+ volume ramp will begin around July in 2015.

"TSMC 16FF+ process technology enables Avago to design highly optimized custom silicon solutions for networking applications in cloud datacenters and enterprise networks," said Hock Tan, President and CEO of Avago Technologies Limited. "TSMC's 16FF+ process technology in combination with Avago's industry leading SerDes, memory, processor cores, and design implementation techniques deliver unparalleled time-to-market, performance and power benefits to OEM customers."

"Sixteen-nanometer FinFET Plus technology provides compelling performance per watt advantages, enabling a myriad wave of market inflection points such as Internet of Things, 5G networks and software defined networks," said Tom Deitrich, Senior Vice President and General Manager for Freescale's Digital Networking group. "Powering the new virtualized network, a new family of Layerscape multicore processors using ARM and Power Architecture technologies will be Freescale's first offerings to leverage this innovative process technology."

"Our collaboration with TSMC on 16FF+ technology will give LG strong competitiveness with respect to power, performance and area in the mobile AP market," said Bo-ik Sohn, Senior Vice President at LG Electronics. "We believe that the product made through our partnership with TSMC will meet the widespread consumer demand for distinctive mobile technology."

"TSMC is a trusted technology partner, helping to drive MediaTek's success over the past decade to deliver market leading SoCs," said CJ Hsieh, President of MediaTek. "With TSMC's first ever FinFET 3D architecture and enhanced plus version, MediaTek advances mobile and home entertainment SoCs demonstrating even faster speed, optimized power and reduced chip size. The performance boosts and power reduction for MediaTek's processors and modem technologies, compared to previous generations, has proven TSMC's 16FF+ to be a highly competitive process technology for our chipsets."

"NVIDIA and TSMC have collaborated for more than 15 years to deliver complex GPU architectures on state-of-the-art process nodes," said Jeff Fisher, Senior Vice President, GeForce Business Unit, NVIDIA. "Our partnership has delivered well over a billion GPUs that are deployed in everything from automobiles to supercomputers. Through working together on the next-generation 16nm FinFET process, we look forward to delivering industry-leading performance and power efficiency with future GPUs and SOCs."

"Our partnership with TSMC enables us to address evolving semiconductor technologies and to provide state-of-the-art solutions for our customers in the automotive, industrial and ICT fields," said Hisao Sakuta, Chairman & CEO of Renesas Electronics Corporation. "Now, we want to take full advantage of the 16FF+ technology to deliver added values for our customers in the advanced automotive information and ICT markets."

"TSMC is once again demonstrating their leadership in the industry by delivering their 16FF+ process with exceptional results," said Moshe Gavrielov, President and CEO of Xilinx. "This risk production milestone achievement and our continued close collaboration is enabling Xilinx to realize the industry's highest FPGA performance per watt and an unprecedented level of programmable systems integration with the industry's first All Programmable MPSoC and 3rd Generation 3D ICs."
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12 Comments on TSMC 16FinFET Plus Process Achieves Risk Production Milestone

#1
GhostRyder
Sweet, that means we are one step closer to it being in full swing which is exactly what we need. I am sad its only at this point but it means we might be able to see something late next year!
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#2
Casecutter
GhostRyder, post: 3192268, member: 149328"
Sweet, that means we are one step closer to it being in full swing which is exactly what we need. I am sad its only at this point but it means we might be able to see something late next year!
Yeah, then fill their most lucrative market segment first... corporate partners and HPC have first dib's on the production so consider that into any decision of when gaming enthusiasts might get anything. The Tesla crowed is what they will service first and it been a while so I'm sure they're clamoring more than gamer are and there money is much greener.
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#3
64K
It's good to see progress on 16nm. I think a single 16nm Pascal full chip will be enough for almost all games at max settings on 4K and that is when I will go 4K. Right now I think Nvidia and AMD will release a line of 20nm gaming GPUs next year and then 16nm in 2016 but that's just speculation on my part.
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#4
GhostRyder
Casecutter, post: 3192294, member: 94772"
Yeah, then fill their most lucrative market segment first... corporate partners and HPC have first dib's on the production so consider that into any decision of when gaming enthusiasts might get anything. The Tesla crowed is what they will service first and it been a while so I'm sure they're clamoring more than gamer are and there money is much greener.
Well of course but we can only hope the process goes off with as little hiccups as possible this time so we can see it sooner. 20nm had so many problems which is why its delayed so long.

64K, post: 3192305, member: 148270"
It's good to see progress on 16nm. I think a single 16nm Pascal full chip will be enough for almost all games at max settings on 4K and that is when I will go 4K. Right now I think Nvidia and AMD will release a line of 20nm gaming GPUs next year and then 16nm in 2016 but that's just speculation on my part.
I agree with you but from what has been listed it sounds like Nvidia will stick with 28nm for the next line as well while AMD goes to 20nm and then both will hit 16nm. Of course that to is speculation and partially my speculation based on what has been leaked.
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#5
Steevo
AMD can't afford to not use 20nm on all their products currently, they have been held back by the lack of ability to achieve bulk at smaller processes.

Die space costs money, shrinking the dies going into all the consoles will give them a higher return, also it should improve the per watt performance of the CPU and GPUs which are all looking very long in the tooth.
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#6
HumanSmoke
Casecutter, post: 3192294, member: 94772"
Yeah, then fill their most lucrative market segment first... corporate partners and HPC have first dib's on the production so consider that into any decision of when gaming enthusiasts might get anything. The Tesla crowed is what they will service first and it been a while so I'm sure they're clamoring more than gamer are and there money is much greener.
TSMC and Samsung are locked in a battle for the high volume markets (hence Apple pushing TSMC - see second page of the link in this post), and as such it has already been pretty much confirmed that the initial 16nmFF contracts are heading to mobile-centric product lines. Qualcomm's modem tech I think is already confirmed, Apple's A9 is looking very likely. If you look at the order book names their sales volumes, and the fact that 30%+ of TSMC's revenue stems from just two companies (Qualcomm and Apple). MediaTek's white box phone and tablet revenue is also expanding at a prodigious rate. In the greater scheme of things, Nvidia and AMD's graphics products are junior players.
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#7
Casecutter
HumanSmoke, post: 3192458, member: 98425"
TSMC and Samsung are locked in a battle for the high volume markets (hence Apple pushing TSMC - see second page of the link in this post), and as such it has already been pretty much confirmed that the initial 16nmFF contracts are heading to mobile-centric product lines. Qualcomm's modem tech I think is already confirmed, Apple's A9 is looking very likely. If you look at the order book names their sales volumes, and the fact that 30%+ of TSMC's revenue stems from just two companies (Qualcomm and Apple). MediaTek's white box phone and tablet revenue is also expanding at a prodigious rate. In the greater scheme of things, Nvidia and AMD's graphics products are junior players.
So your saying even if Nvidia is ready to shrink a GM200 on 16nmFF, it's going to be a while before they amass any volume. Then given most of all that is allocated first to professional and HPC it appears it's going to be a long slow haul.
From that second article I find it interesting that Hynix is so strong at 6th place.
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#8
HumanSmoke
Casecutter, post: 3192519, member: 94772"
So your saying even if Nvidia is ready to shrink a GM200 on 16nmFF, it's going to be a while before they amass any volume.
I think so. TSMC have a very bad habit of announcing processes as operational well ahead of time. Even with volume production underway, Apple/Qualcomm/MediaTek will take the bulk of the new process wafer starts- both because of the size of the contract (and TSMC is fighting tooth and claw with Samsung for Finfet business), and because the process ramp will be smoother with smaller ASIC's. If a wafer has say X (say 30 for arguments sake) number of defects per wafer then the chances of salvageable die candidates goes up rapidly as die size decreases. A rough estimate for a 551mm^2 (GK110) sized die against a 89mm^2 SoC (Apple A8's size)...98 die candidates for the big GPU, 673 die candidates for the SoC.

Casecutter, post: 3192519, member: 94772"
Then given most of all that is allocated first to professional and HPC it appears it's going to be a long slow haul.
Qualification and runtime validation are pretty strict for pro parts in any case, so my guess is that they wont tape out until TSMC are confident of the process on large silicon
Casecutter, post: 3192519, member: 94772"
From that second article I find it interesting that Hynix is so strong at 6th place.
Third largest DRAM producer after Samsung and Micron/Elpida
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#9
Steevo
HumanSmoke, post: 3192612, member: 98425"
I think so. TSMC have a very bad habit of announcing processes as operational well ahead of time. Even with volume production underway, Apple/Qualcomm/MediaTek will take the bulk of the new process wafer starts- both because of the size of the contract (and TSMC is fighting tooth and claw with Samsung for Finfet business), and because the process ramp will be smoother with smaller ASIC's. If a wafer has say X (say 30 for arguments sake) number of defects per wafer then the chances of salvageable die candidates goes up rapidly as die size decreases. A rough estimate for a 551mm^2 (GK110) sized die against a 89mm^2 SoC (Apple A8's size)...98 die candidates for the big GPU, 673 die candidates for the SoC.


Qualification and runtime validation are pretty strict for pro parts in any case, so my guess is that they wont tape out until TSMC are confident of the process on large silicon

Third largest DRAM producer after Samsung and Micron/Elpida

I wonder how contracts with AMD might change if they fail to deliver again, especially when they are on a per wafer, dead or alive, TSMC get paid.
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#10
HumanSmoke
Steevo, post: 3193374, member: 19251"
I wonder how contracts with AMD might change if they fail to deliver again, especially when they are on a per wafer, dead or alive, TSMC get paid.
Might be pretty safe to assume that there are a lot of crossed fingers for GloFo's ramp of Samsung's 14nm-XM process in AMD's boardroom. Sounds like TSMC might be first to market (at least ahead of Samsung/GloFo) but that doesn't instil a lot of confidence given TSMC's record when they try to up the tempo. One consolation is that AMD's woes will also be Nvidia's from a company perspective.

I'm pretty sure that at least some of AMD's 300 series will still be on 28nm. 16nm is too far away realistically, and 20nm has already demonstrated that it isn't cut out for high power IC's. Given that the scuttlebutt is that at least one (Fiji) might sport HBM it seems a contradiction in terms to suggest it will be 20nm given IMC's demand a good power budget...and Fiji is supposedly sporting a very wide memory interface by GPU standards. I'd also note that HBM is limited to 4GB (4 x 1GB stacks) in it's first iteration - wide interface and high bandwidth but a pretty lousy framebuffer/marketing point, so it might be possible that Fiji has a tiered memory fit-out (HBM + GDDR5) assuming the latency differential can be addressed - which would argue even more against 20nm.
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#11
Steevo
HumanSmoke, post: 3193383, member: 98425"
Might be pretty safe to assume that there are a lot of crossed fingers for GloFo's ramp of Samsung's 14nm-XM process in AMD's boardroom. Sounds like TSMC might be first to market (at least ahead of Samsung/GloFo) but that doesn't instil a lot of confidence given TSMC's record when they try to up the tempo. One consolation is that AMD's woes will also be Nvidia's from a company perspective.

I'm pretty sure that at least some of AMD's 300 series will still be on 28nm. 16nm is too far away realistically, and 20nm has already demonstrated that it isn't cut out for high power IC's. Given that the scuttlebutt is that at least one (Fiji) might sport HBM it seems a contradiction in terms to suggest it will be 20nm given IMC's demand a good power budget...and Fiji is supposedly sporting a very wide memory interface by GPU standards. I'd also note that HBM is limited to 4GB (4 x 1GB stacks) in it's first iteration - wide interface and high bandwidth but a pretty lousy framebuffer/marketing point, so it might be possible that Fiji has a tiered memory fit-out (HBM + GDDR5) assuming the latency differential can be addressed - which would argue even more against 20nm.
All this poses another question, if they have the R&D done for both, and what contingency plan they have to use if 20nm for high end GPU's falls through. Seems like they are crippling the GPU division to barely make gimped APU's run fast enough to compete.
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#12
HumanSmoke
Steevo, post: 3193579, member: 19251"
All this poses another question, if they have the R&D done for both, and what contingency plan they have to use if 20nm for high end GPU's falls through.
My guess is that if 20nm isn't a go (and they should have known either way long ago) the designs would have been both rejigged for 16nmFF/FF+ and 28nm (on a large die). I'm also guessing that AMD has to take some risks now WRT to their position with Nvidia, and also provide a competitive compute situation to move HSA along from talk to implementation.
Steevo, post: 3193579, member: 19251"
Seems like they are crippling the GPU division to barely make gimped APU's run fast enough to compete.
AMD have been cornholing ATi since they took over, its just way more apparent now that the ATi hierarchy has left/been replaced/fired and fully integrated into AMD. The graphics division now shoulders the burden of developing graphics architecture (with much reduced manpower and funds), while the processor division reaps the benefit from the end product.
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