Monday, July 24th 2017

Western Digital Announces Four-Bits-Per-Cell (X4) Technology on 3D NAND

Western Digital Corp. today announced its successful development of four bits per cell, X4, flash memory architecture offering on 64-layer 3D NAND, BiCS3, technology. Building on its pioneering innovation of X4 for 2D NAND technology and past success in commercializing it, the company has now developed X4 for 3D NAND by leveraging its deep vertical integration capabilities. These include silicon wafer processing, device engineering to provide sixteen distinct data levels in every storage node, and system expertise for overall flash management. BiCS3 X4 technology delivers an industry-leading storage capacity of 768 gigabits on a single chip, a 50 percent increase from the prior 512 gigabit chip that was enabled with the three bits per cell (X3) architecture. Western Digital will showcase removable products and solid-state drives built with BiCS3 X4 and systems capabilities in August at the Flash Memory Summit in Santa Clara, California.

"The implementation of X4 architecture on BiCS3 is a significant development for Western Digital as it demonstrates our continued leadership in NAND flash technology, and it also enables us to offer an expanded choice of storage solutions for our customers," said Dr. Siva Sivaram, executive vice president, Memory Technology, Western Digital. "The most striking aspect in today's announcement is the use of innovative techniques in the X4 architecture that allows our BiCS3 X4 to deliver performance attributes comparable to those in BiCS3 X3. The narrowing of the performance gap between the X4 and X3 architectures is an important and differentiating capability for us, and it should help drive broader market acceptance of X4 technology over the next several years."
This latest achievement follows a nearly three-decade long legacy of industry firsts in flash innovation, including the industry's multi-level cell (MLC) flash technologies using two bits (X2) and three bits (X3) per cell.

The company expects to productize its 3D NAND X4 technology across multiple end-use applications that can take advantage of the higher capacity points supported by X4. Future generations of 3D NAND technology, including the 96-layer BiCS4, are also expected to feature X4 capabilities.
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9 Comments on Western Digital Announces Four-Bits-Per-Cell (X4) Technology on 3D NAND

#1
Gasaraki
So this is the BiCS chips that Toshiba just put in their XG4 SSD. Funny how long WD took to announce theirs.
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#2
silentbogo
Gasaraki said:
So this is the BiCS chips that Toshiba just put in their XG4 SSD. Funny how long WD took to announce theirs.
The announcement has been circling around since last year. FlashForward was a joint project of Toshiba chip division and Sandisk(WD), so the tech in upcoming XG5, WD Blue 3D and Sandisk Ultra 3D is the same.
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#3
hellrazor
When do we start getting SSDs that let us choose to run them in SLC, MLC, TLC, QLC, etc.?
Posted on Reply
#4
silentbogo
hellrazor said:
When do we start getting SSDs that let us choose to run them in SLC, MLC, TLC, QLC, etc.?
Never
Posted on Reply
#7
bug
Prima.Vera said:
1TB = 100$ ?
Probably not, but I too await that day.
Posted on Reply
#8
trparky
btarunr said:
continued leadership
I always thought that Samsung was leading the pack in the flash memory technology camp.

That must be PR speak to make them look better to investors.
Posted on Reply
#9
bug
trparky said:
I always thought that Samsung was leading the pack in the flash memory technology camp.

That must be PR speak to make them look better to investors.
Technically, Samsung doesn't have QLC yet, so that would be leadership (don't know where the "continued" comes from).
But in marketing speak, "leadership" only means they're towards the head of the pack. And when the pack only has a handful of members, everyone can claim leadership!
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