Micron has today announced that it started sampling RDIMMs based on DDR5 technology to its industry partners. Designed for server operations, these DDR5 modules come in RDIMM form-factor and feature Error-Correcting Code (ECC) technology for removing any error that occurs inside electronic circuits. The new DDR5 standard offers a massive performance uplift compared to the previous generation of DDR4 memory. For starters, DDR5 will double the MT/s transfer rate to 6400 MT/s, double the speed of the original 3200 MT/s speed for DDR4 that was established by JEDEC. The bandwidth of the new DDR memory is supposed to be 32 GB/s, which is 25% faster than the original 25.6 GB/s bandwidth of DDR4.

With DDR5, the SDRAM prefetch buffer data size is being doubled to 16 data words per memory access, making for a 16n prefetching throughput. Another improvement is that the highest possible density for DDR5 chips is now being up to 64 Gb per chip. Additionally, DDR5 is supposed to bring the power needed for chip operation down to 1.1 volts, which is around 8% lower than what DDR4 achieved. There are also features like MIR (Mirror Pin) which provides better DIMM signaling, and more options for PRECHARGE and REFRESH commands that can now operate on a per bank basis, so specific banks can be refreshed in bank group. It is also worth pointing out that DDR5 chips are manufactured using 1znm memory manufacturing process.