Monday, March 16th 2026
AMD Zen 6 "Medusa Point" CPU Spotted on Geekbench with 10 Cores, 32 MB L3 Cache
A fresh leak from Geekbench has surfaced listing an unannounced AMD processor with the OPN (Ordering Part Number) code 100-000001713-31. As for the platform, that is listed as Plum-MDS1, a somewhat direct hint to Medusa Point, AMD's next-gen mobile APU family based on Zen 6. The chip is a 10-core, 20-thread with a 2.4 GHz base clock, though actual test results show it running closer to 1.3-2 GHz, unsurprising for an engineering sample this early in development. Each core gets 1 MB of L2 cache, and the L3 comes in at 32 MB, up from 24 MB on Strix Point and 16 MB on Hawk Point. This is 50% more cache than the current 10-core parts like the Ryzen AI 9 365. The test system had 32 GB of memory installed, type unspecified. Benchmark numbers aren't worth reading into at this stage, as the chip spent most of the test hovering around 1.39 GHz and barely peeked above 2 GHz, well below what a final retail part on a 3 nm process would run at. Too early to draw any conclusions from the scores.
Shipping manifests from Planet3DNow linked to the "Medusa" codename suggest a 4C+4D layout, standard and density-optimized cores, though that doesn't exactly explain the 10-core count seen in Geekbench. One theory is that two additional low-power cores sit in the IO die, bringing the total to ten. The part is expected to be a 28 W TDP mobile chip for the FP10 socket. Medusa Point is shaping up to combine Zen 6 CPU cores with a mix of RDNA 5 and RDNA 3.5 graphics, plus an updated NPU. A launch around CES 2027 fits the AMD usual cadence, meaning there is likely a long wait ahead; however, this Geekbench entry confirms that testing is already happening, whether at AMD itself or at one of its early hardware partners.
Sources:
VideoCardz, BenchLeaks, Planet3DNow
Shipping manifests from Planet3DNow linked to the "Medusa" codename suggest a 4C+4D layout, standard and density-optimized cores, though that doesn't exactly explain the 10-core count seen in Geekbench. One theory is that two additional low-power cores sit in the IO die, bringing the total to ten. The part is expected to be a 28 W TDP mobile chip for the FP10 socket. Medusa Point is shaping up to combine Zen 6 CPU cores with a mix of RDNA 5 and RDNA 3.5 graphics, plus an updated NPU. A launch around CES 2027 fits the AMD usual cadence, meaning there is likely a long wait ahead; however, this Geekbench entry confirms that testing is already happening, whether at AMD itself or at one of its early hardware partners.



12 Comments on AMD Zen 6 "Medusa Point" CPU Spotted on Geekbench with 10 Cores, 32 MB L3 Cache
Same reason AMD is releasing RDNA 2/3/3.5 CPU/APUs in 2026.
It could be either, or the 4m thing which is 3.5 with maybe one or two extra improvements for AI and a more PR friendly name.
I haven't looked at the leaks so just guessing.
iGPU will only be important in mobile and for those who use dGPU passthrough via iGPU's display engine (RIS2 is built into display engine so non-RDNA4 dGPU owners can get an upgrade by using passthrough). For everyone else with a dGPU, you can transcode videos on both GPUs to use otherwise wasted silicon.
"Halo" parts will eventually get RDNA5 (gfx13xx) mobile, while gfx11xx remains on mainstream APUs to maintain an optimized die-area iGPU that's important in keeping costs down.
Ryzen 9 9900X: ~3477 single core score / 5.65GHz = 615 SC/GHz (Zen 5)
10 core Zen 6: ~2241 single core score / 3.4GHz = 659 SC/GHz (Zen 6)
This is about a 7% IPC gain.