Sunday, May 31st 2026
AMD Unveils the EXPO-ULL (Ultra Low-Latency) Memory Profile Standard
AMD at Computex announced the new EXPO Ultra Low Latency memory OC profile standard (EXPO-ULL). This is an SPD profile extension, just like Intel XMP and the original EXPO, but is a standard that prescribes extremely tight memory timings for memory speeds typically marketed to AMD systems, such as DDR5-6000 and DDR5-6400. AMD Ryzen 7000 series and Ryzen 9000 series processors are limited in how fast their memory can be clocked when compared to Intel's DDR5 platforms, but there's room to significantly tighten memory timings.
Memory vendors were simply selling their mid-range DDR5-6000 and DDR5-6400 memory with timings typical of those speeds as AMD EXPO products. AMD's intervention sees memory vendors ship DDR5-6000 and DDR5-6400 kits with significantly tightened timings, so there is a tangible performance benefit being offered to PC enthusiasts versus opting for JEDEC DDR5-6000/6400 kits. Memory vendors onboard with the EXPO-ULL program include G.Skill, Kingston, Klevv, Lexar, Team Group, V-Color, and ADATA XPG. AMD provided first-party testing of how EXPO-ULL memory provides an up to 13% increase in FPS versus generic JEDEC memory kits, and average FPS gains of 4%. The company didn't specify a release date, but we could expect EXPO-ULL memory kit launches from the above vendors throughout 2026.
Memory vendors were simply selling their mid-range DDR5-6000 and DDR5-6400 memory with timings typical of those speeds as AMD EXPO products. AMD's intervention sees memory vendors ship DDR5-6000 and DDR5-6400 kits with significantly tightened timings, so there is a tangible performance benefit being offered to PC enthusiasts versus opting for JEDEC DDR5-6000/6400 kits. Memory vendors onboard with the EXPO-ULL program include G.Skill, Kingston, Klevv, Lexar, Team Group, V-Color, and ADATA XPG. AMD provided first-party testing of how EXPO-ULL memory provides an up to 13% increase in FPS versus generic JEDEC memory kits, and average FPS gains of 4%. The company didn't specify a release date, but we could expect EXPO-ULL memory kit launches from the above vendors throughout 2026.
72 Comments on AMD Unveils the EXPO-ULL (Ultra Low-Latency) Memory Profile Standard
I don't believe all memory kits need active cooling for ULL, but if you push the timing down, raise the voltage and or frequency the chances go up. Firstly isolating the memory by itself and those variables. Next the external variables like case airflow and video card heat output. So if you want to go around and tell everyone tREFi is not a problem on its own, that could be applicable to a large number of low voltage low frequency memory kits....but the real world isn't a setup with fix variables.
You need proof.... I know. You as asking for single variable isolation proof that it doesn't work. Besides the 8000 Neon kit (which you discounted), I would have to retest to disprove you even more. When I do the overclocking, tREFi is added first and I have a fan on the memory. I don't waste my time anymore seeing what memory can do passively cooled.... It's not much btw.
I could easily prove my point with a. Real world setup by taking 6000 CL26 memory, blow 450 watts of heat from a video card on it and crash the memory. All that would prove is your still wrong that memory doesn't need active cooling at all. It wouldn't disprove that tREFi on its own it's not a problem. However, they go hand in hand which is the main point I've been making all along.
You can’t disprove something further, that you have not tested. It’s a simple concept.
Here, I run the attached SS daily 450w from my 5080 blasting my kit at 1.53vdd with max tREFI at 8400 without any issues. A scenario which greatly exceeds any potential kit at 1.3,1.4, or 1.45v that would likely be released.
If your method for overclocking memory doesn’t consist of thoroughly isolating and checking individual timings and spending a lot of timing checking for stability and what variables are causing errors, you’re not much of a memory overclocker/tuner and that oc’ing memory just might not be for you - it’s okay. It’s a tedious process, I know.
Water cooling and active cooling definitely raise the ceiling on whats capable once going over 1.5vdd, but does not change the fact DDR5 is capable of running max tREFI in a normal case environment without added direct cooling.
So exhaustingly… get back to me with some tREFI testing, otherwise you have no proof.
I gave you many chances to change your statement that tREFi is never the problem. Here is that proof you so desperately needed. Only 3c difference and that is enough sometimes :)
Exhibit A - 6000 MT/s 1.35V CL30. EXPO - Auto - No Errors
Exhibit B - 6000 MT/s 1.35V CL30. EXPO - with 65K tREFi - Error
You can stop pissing on the floor now. I am going to return to actual review work. What a waste of my time....
How to fix? Run a refresh in a fixed interval, which is essentially what the tREFI timing controls. So, why not run a refresh cycle often? Why intentionally increase the refresh window? The answer is pretty simple, the CPU cannot access the memory while it is executing a refresh cycle. This value represents the approximate amount of cycles that the memory will be available before a cycle is spent refreshing the contents of the array. Higher interval means the memory is available for longer (with noticeable implications on latency and bandwidth), but it also means that you are running the risk of losing data because the memory cells may discharge before they are refreshed. So it's an inverse correlation between temperature and performance, very low tREFI will allow memory to operate very hot, at the cost of being relatively slower as the CPU will wait on refresh cycles far more often.
32K is the sweet spot between performance and reliability in my opinion, you'll want to keep your RAM under 55°C. To run 65K, you'll want load temps below 50°C, at 131k you're already probably looking at around 40°C load temps. It's even possible to run a 262144-cycle interval, but you'll want your RAM on cold. Probably 30°C load temps, at most. No air cooled kit handles this.I'm not sure that whatever you are doing here is worth it, AMD CPUs just don't help with this. That's why EXPO-ULL makes sense. Your timings are very good, your kit must be a lot newer/better than my Trident Z5 6800 (which was the prime kit for 12th Gen builds), I've been optimizing my system's RAM while I have some downtime until the new cabling kit for my RTX 5090 gets here, to achieve 8000 stable, I had to reduce tREFI from 65535 to 32767. I had errors literally 10 hours into the run with 65K, no matter how carefully I optimized the timings or voltages. Mind you, I'm nowhere near 1.5 VDDQ here, that is just asking for a crash. 1.35 MC/IVR, 1.4350 DRAM/VDDQ on BIOS (sensors read 1.44-1.45V), 1.175 SA. That's what I have here, and this seems realistically my kit's limit.
And yes, that is 121K% Karhu stable, tested over nearly 26 hours. Been testing with random applications, ran some y-cruncher on this too to validate. It's what I'll use when I finish my rebuild.
This on a beat up Windows installation, btw:
I’m more confused how you managed to get your dimms peak at 65c in 20 mins with a gskill kit at 1.35v, the highest I’ve ever seen is 53-55c after 12+ hour tests at 1.48-1.53v. For clarification are we testing on a testbed with 0 airflow again and an aio?I’m well aware theres very little point to 8400 on single CCD chip as the performance gains or relative performance to say 6400-6600 are tiny if any, it’s simply an illustration of what settings were being questioned actually working in relativity extreme conditions. Additionally it’s what I run on a daily basis, error free with a 450w gpu dumping air directly into the kit.
Yes this setup was passive airflow of the room. No fan on the memory. This test was to counter your statement that maxing out memory tREFi will never be a issue. This is simply factually incorrect.
Moreover since you moved the goal post multiple times and I still managed to fulfill the requirements of 1:1 ratio, proof that stable before and proof it was not stable with max tREFi. Even a added bonus of using 1.35v memory.
We probably could forgone this debate if I explained what tREFi was and how it works in the first place. I made a assumption that someone memory overclocking since 2012 would know that already. That is my fault, I will do better to counter your statements in the future with detailed explanation of how things work before just linking examples. It makes more sense looking back why you were dead set on this statement.
Anyone with a brain knows a kit at 65c is going to error out, those temps are not normal and will guarantee failure without changing anything. You’re on a test bench, if you really want to continue to be disingenuous here, that’s fine with me.
It's like your agreeing with me this entire time but don't want to change your original stance.
Additionally you’re now claiming zero airflow on a test bench is the same as being in a case with airflow even if poor, which also is not true. I’m offering up a worst case scenario at 1.53vdd with tight timings, literally the edge of what’s possible and im leveling out at 48-49c after ~12hrs of testing with no issues.
Adjusting tRFC and tREFI are some of the easiest adjustments to improve performance, and I don’t doubt those will be the first timings they’ll adjust in these new profiles. I also don’t think the majority of vendors will be providing active memory cooling kits as they’re like incompatible with the majority of peoples setups, nor necessary in many cases as the majority of these kits are unlikely to exceed 1.4v on AM5. This would also be adding extra cost on already prohibitively expensive kits as is.
On a closed case in ambient conditions, it's an express ticket to instability. Hot days may actually make the computer a complete mess. But if you're living in the north of Canada during winter, you'll be fine lol
It is not unreasonable to say that 65K tREFI at flagship specs (8000-8400 is the uppermost range for UDIMMs) will require active cooling in most cases, and even then it might not be reliable enough. 32767 is a much safer, and just as performant bet.
If you really want to get a 1-up on me, you should have required showing JEDEC 1.1v. that is unlikely to error out even without heatspeaders.
Have you considered your case is the active airflow factor I've been talking about? Because it very well can be. In your setup, the airflow is high enough that neither the GPU dumping heat into the memory or memory its own is enough to error out your memory at 1.55vdd. congratulations you have airflow going across the memory and enough to keep the temps low enough it doesn't crash.It will be just like the current expo, vendors can either include the extra 7 timings or leave it blank which means the MB does it own thing like XMP for those values. What I am not sure about is if you have one value at zero. Because the entire block is activated from a string. Something I should do and flash memory to find out.
tREFi It's more likely it will be in 16k range as a safety net. A few brands will do 32k with a fan included or a second (OC profile) like Corsair has done with the Dominators.
Commenting on the nonstandard results of a test bench creating excessive temps is an observation, not changing any requirements. How many people will run a memory kit like this on AM5? Little to none. Now to say what a median temp is in a typical pc running at expo at 1.35-1.45v, it’s hard to say without survey data but I’d expect it falls much closer 40-45c than 65c+ (software readouts). At this lower temperature range there would certainly be room to adjust tREFI without requiring active and direct memory cooling.
What I will comment on about my setup is that I think it’s a more realistic representation of what temperatures and air flow would be like for the majority of end users/consumers even though I’m using very high vdd for not having any active memory cooling. And in showing that I’m providing evidence memory fan kits likely aren’t a requirement to target refresh window timings in these new profiles
I’m unsure why jedec standards are being referenced at all, or intel for that matter as neither are the target for the new ULL profiles and conflating data between the two platforms (AMD and Intel) is useless as different limitations exist.
They should do something like this:
So while you're not wrong it's not really realistic
AMD could perfectly well use the "main die" from the image above (the die with the x86 cores) in about 90% of its CPUs sold to the home market and would use the same chiplets it uses in server CPUs in home CPUs with more than 8 cores.
It seems logical but it's extremely inefficient from an architectural perspective.
Such design will mean that AMD would have to make different dies for all productions in both server/workstation and desktop (most mobile is already its own thing being monolithic with few exceptions), which defeats one of the main points why they went with chiplets across their whole segment except mobile (and in mobile it's also because the chiplet idle power consumption is too much for most mobile uses).
They're reporting that tREFI, tRRDS and tRW are the new timings they're allowing module makers to modify.
They're also allowing VDDP voltage modification, but I'm not sure about specifics because Steve said "lock".
I have a CL26 6000 Kit