Tuesday, July 28th 2026
Intel "Nova Lake-S" 12 Xe3P iGPU to Draw Up to 65 Watts
Intel's upcoming "Nova Lake-S" is gearing up for a launch later this year. However, rumors suggest that certain "Nova Lake-S" models with large integrated graphics might require significant power, increasing the TDP and peak power. According to the well-known Intel leaker Jaykihn on X, Intel's 16-core CPU SKU with 12 Xe3P cores will need specialized power delivery, with 65 W dedicated to integrated graphics. This SKU includes four P-Cores, eight E-Cores, and four LPE-Cores, along with 12 Xe3P GPU cores. This 4+8+8+12 core configuration is one of the few processors where integrated graphics require two VCCGT phases. In regular SKUs, VCCGT is a single-phase power rail for the integrated graphics inside the processor. However, since Intel aims to enhance its iGPU performance with "Nova Lake," a single phase is insufficient.
Previously, we learned that Intel's top-end, overclocking-focused, dual compute die "Nova Lake-S" CPU with 52 cores will feature a PL2 mode with a power level of 474 W. This also includes the possibility of three 8-pin CPU power connectors on high-end Z990 motherboards, an intriguing design choice considering that most enthusiast boards typically have two 8-pin EPS CPU connectors. The three 8-pin connectors are mainly intended for the highest-end overclocking designs, rather than being necessary for running the dual compute die designs. Motherboards with either two or three EPS connectors are still expected to support Intel's upcoming high-end 44-core and 52-core processors on the 175 W platform. However, we are likely to see various configurations, and motherboard designs are preparing for higher TDPs. Below image is illustration only.Finally, we also know that the lower-end SKUs are expected to arrive first. Intel has SKUs coming with either one or two compute dies, featuring up to eight "Coyote Cove" P-Cores and 16 "Arctic Wolf" E-Cores, along with four LPE-Cores that are part of the I/O die. Depending on the SKU, Intel can include a single compute die for up to 28 cores total or two compute dies for a 52-core CPU SKU. It seems that the single compute die version will arrive first, with the dual compute die variants following. The 28-core "Nova Lake-S" DS version, a new SKU segment, is expected to launch in Q1 of 2027. For the regular overclocking-focused "K" SKUs, Intel reportedly plans an early Q2 launch between March and April.
Source:
Jaykihn on X
Previously, we learned that Intel's top-end, overclocking-focused, dual compute die "Nova Lake-S" CPU with 52 cores will feature a PL2 mode with a power level of 474 W. This also includes the possibility of three 8-pin CPU power connectors on high-end Z990 motherboards, an intriguing design choice considering that most enthusiast boards typically have two 8-pin EPS CPU connectors. The three 8-pin connectors are mainly intended for the highest-end overclocking designs, rather than being necessary for running the dual compute die designs. Motherboards with either two or three EPS connectors are still expected to support Intel's upcoming high-end 44-core and 52-core processors on the 175 W platform. However, we are likely to see various configurations, and motherboard designs are preparing for higher TDPs. Below image is illustration only.Finally, we also know that the lower-end SKUs are expected to arrive first. Intel has SKUs coming with either one or two compute dies, featuring up to eight "Coyote Cove" P-Cores and 16 "Arctic Wolf" E-Cores, along with four LPE-Cores that are part of the I/O die. Depending on the SKU, Intel can include a single compute die for up to 28 cores total or two compute dies for a 52-core CPU SKU. It seems that the single compute die version will arrive first, with the dual compute die variants following. The 28-core "Nova Lake-S" DS version, a new SKU segment, is expected to launch in Q1 of 2027. For the regular overclocking-focused "K" SKUs, Intel reportedly plans an early Q2 launch between March and April.

32 Comments on Intel "Nova Lake-S" 12 Xe3P iGPU to Draw Up to 65 Watts
Efficiency is the performance to power ratio. It can be measured in frames per watt.
A more efficient GPU is capable of better performance at a given power draw.
Example, the RX 9070 XT defaults to 304W, with a maximum (on most cards) of *up to* 375W, and yet you can get about 90% of the performance at 250W (~80% power) with an undervolt.
Example 2: Despite being a much less powerful GPU, the B390 can actually outperform the 8060S at low power limits (15-25W) due to its better efficiency.
Efficiency is a measure of work done compared to power drawn. You cannot judge this based on the power number alone. A 65 watt GPU that is twice as fast as a 40 watt GPU is more efficient, because it would take the 40 watt GPU 80 watts total to match the output of the 65 watt part.
Without performance metrics, a power rating is meaningless. You need perf/W, whether that be in frames per watt, or pixels rendered, or some kind of workload.
Previous big iGPU attempts were irrelevant as they always paired it with the i7's, the highest of the lineup. So if you wanted the iGPU, you were paying for the extra CPU, which is useless to you. I always wanted them to have a i3 lineup + decent GPU. So if the i3 itself costs $150, then they can charge $250, or extra $100 for the bigger iGPU. Which many people will see it as reasonable. I think even $150 extra is good. I can't see even at $100 how this is not attractive to Intel either. It's an i3, which they will sell anyway, but get to charge extra for graphics.Xe3P should be at least 25% faster per Xe core according to rumors. I think it should be close to 50% faster as RDNA5 competition coming just few months later will be much faster than Pantherlake's GPU, and Xe4 is much further away.
Regardless, in a desktop format, with improved Xe3P, and uncorked in regards to power limit, this is potentially an attractive part for value gamers.It IS efficient. You are confusing low power use with efficiency. Efficiency is a relative metric, with performance being one part of the equation. A 486 CPU is very low power, but it isn't "efficient". A 250W 285K is more "efficient" than the 4W 486, because it's lot faster than the power difference.
Rumors on the Intel side point towards a Halo competitor with RZL, so late 2027-mid 2028, which would be using Xe3p. This would indicate Intel believes it can compare favorably enough with RDNA 5 or else it would have been canceled.That's why PTL's Xe3 implementation has 16MB cache. It's also why Strix/Gorgon Halo have Infinity Cache unlike their regular APU counterparts despite having twice the memory bandwidth.
Honestly I expect the "large" variant of the iGPU tile to be external more than I do the 4+8 tile though. Even if Intel can gain PPA by moving the 4+8 compute tile to N2P, it's so much volume that IFS is going to lose by not making it on 18A. Unlike the large iGPU tile which will be comparatively more niche. Plus, I expect the iGPU to gain more from the move to N2P than the compute tile might.
But that's completely irrelevant to the efficiency discussion.
Your Halo system will be a powerhog, expensive value part in 3-4 years, whereas a dGPU can be replaced and part of the cost recouped by selling. iGPUs have to be cheap. This 4+8+12 config is a right combo, as using a mass produced, standard platform means you can swap the CPU out for faster CPU, or if it breaks(although CPUs rarely do).
The point I wanted to make with RDNA5 is that it's going into PS6 handheld at end of 2027, and a 15W part is said to perform like 30W Pantherlake. Now, the scaling isn't linear, but I expect it to be at least 50% better than Pantherlake Xe3P at the same power. That means Xe3P being 25% isn't enough, especially because we don't see Xe4 until 2028-2029. This is why I hope Xe3P is another 50% gain over Xe3.It's not just the cache. Xe3 improves Hi-Z depth culling performance:
Culling refers to eliminating scenes that are rendered but not seen by the player. By eliminating that you reduce memory bandwidth use for all layers of the memory subsystem, from the diminuitive L1, to the large VRAM/shared memory. The specific microbenchmark for Depth Writes, related to occlusion culling has improved by a dramatic amount on Xe3. Intel's work paid off, as Pantherlake with pretty much same memory config outperforms predecessor Xe2 Lunarlake by 50%.
So whereas compute increased, they did work to offset the increase in bandwidth needed by the extra compute. Otherwise, they would have needed LPDDR6-1200 to beat Lunarlake by 50%, if it wasn't for combo of Depth Writes improvement + doubled GPU cache. For the 8-->16MB GPU cache, Intel says there's about 25% reduction in traffic, meaning it's equal to increasing memory bandwidth by 33%. 50% is also at same power level. Xe3 also scales with higher power, whereas Xe2 in Lunarlake kinda stops. Xe3 improves utilization of the shaders as well, which Xe1/Xe2 struggled as seen in Tom Peterson's overview. It's actually really nice, and Intel did a good job with Pantherlake.
Pantherlake SoC in general also brings memory compression, that's why it benches quite high in memory benchmarks.
www.notebookcheck.net/Framework-Laptop-13-Pro-review-The-king-of-repairability-is-back.1351246.0.html
You can see from the review above the Asus Expertbook with 8533 beats the XPS 14 with 9600 memory. The architecture is quite balanced, so using lower memory speeds isn't catastrophic for the iGPU. This is because Intel has an iGPU first approach(where it hurts them in dGPUs), whereas AMD has a dGPU first approach. It's easier and cheaper for AMD to repurpose the smallest dGPU die for the iGPU, which makes it not so optimal. Intel also gets iGPUs out first, whereas AMD gets dGPUs out first.
But seriously, having one phase for this wouldn't work, so at least two, but tbh I'd like three or four.