AleksandarKThe 28-core "Nova Lake-S" DS version, a new SKU segment

Huh... what is DS supposed to be/mean? Also, any idea about the launch window of the bLLC models?

@wNotyarD

Here:

AleksandarK in Intel to Launch 28-Core "Nova Lake-S" Before 52-Core VersionIntel is gradually laying the groundwork for the launch of its Core Ultra 400 "Nova Lake-S" desktop processors with a basic branding overhaul. However, the company is reportedly preparing different la…

DS is bLLC and K is unlocked vanilla.

Seems Intel will target the gaming crowd first.
They want to make a good impression, unlike last time.
Understandable since all the major reviewers are having primarily gamer focused audiences.

Sol_Badguy@wNotyarD

Here:

AleksandarK in Intel to Launch 28-Core "Nova Lake-S" Before 52-Core VersionIntel is gradually laying the groundwork for the launch of its Core Ultra 400 "Nova Lake-S" desktop processors with a basic branding overhaul. However, the company is reportedly preparing different la…

DS is bLLC and K is unlocked vanilla.

Seems Intel will target the gaming crowd first.
They want to make a good impression, unlike last time.
Understandable since all the major reviewers are having primarily gamer focused audiences.

Thanks. Must have missed it among all prefixes, suffixes and whatnotfixes being thrown around.

Being it that way, though, where does the non-K non-DS lineup stand, if one comes to fruition?
Will the DS (bLLC) models be non-overclockable, or will Intel also make DSK/KDS/X/whatever processors which are both OC-able and bLLC-equipped?

This will be the first exposure of avx10.2 and apx, but also their first chip with xe3p. The xe3p has up to 12 cores, as on Panther Lake, but adds new fp8 and mxfp4 processing. It reportedly also adds hardware sparsity support, which should double the non-sparse matrix processing rate. It will have cudimm support, enabling 256GB of high speed mem on the board.

I'm guessing the real news here is somebody had RAM to put together a test system :nutkick:

So, what does the DS stand for? Degradation silicon? :twitch:

Again?!?

AleksandarKIntel's upcoming "Nova Lake-S" series of desktop processors is set to bring some exciting changes. As previous rumors suggested, the company is incorporating the AVX-512 and APX instruction sets into this new processor lineup. Late last year, Intel published its 60th Architecture Instruction Set Extensions and Future Features manual, indicating that ultra-fast vector processing with 512-bit width is returning to desktops after years of absence from this sector. Thanks to @InstLatX64 on X, we have learned that the company is testing two SKUs—a 24-core model running at 3.4 GHz and a 28-core model running at 3.2 GHz—both featuring AVX-512 and APX instruction support. This further supports the claim that Intel's desktop processors are returning to their full potential.

Powered by "Coyote Cove" P-Cores and "Arctic Wolf" E-Cores, both models will support AVX-512 and APX, aligning software optimization and support with the HEDT and Xeon server segments that already use these vector and advanced accelerators. Initially, Intel chose to disable AVX-512 for the "Alder Lake" and "Raptor Lake" client-oriented CPU lineups, meaning only server-grade Xeon CPUs benefited from the accelerated 512-bit data paths. This decision was due to differences in P-Core and E-Core designs, which complicated software optimization on the consumer side. However, with "Nova Lake," these features are finally making a comeback.

The Core Ultra 400 "Nova Lake-S" desktop processors will undergo a basic branding overhaul. Intel is reportedly planning different launch dates for various SKUs. The company is preparing SKUs with either one or two compute dies, featuring up to 8 "Coyote Cove" P-Cores, 16 "Arctic Wolf" E-Cores, and 4 LPE-Cores as part of the I/O die. It seems the single compute die version will arrive first, followed by the dual compute die variants. The 28-core "Nova Lake-S" DS version, a new SKU segment, is expected to launch in Q1 of 2027. For the regular overclocking-focused "K" SKUs, Intel reportedly plans an early Q2 launch between March and April, while 52-core flagship SKU will appear in late May.

I think a lot of people and especially x3d cpu owners, are going to be surprised by the performance of Nova Lake with implmentation of APX instruction set. Intel is definitely directly trying to acheive the overall performance crown for multithreading first and at least match Amd in top end gaming performance. I am just looking for maximum performance in an HEDT light environment and only interested in the overal performance flagship 52 core 288mb bllc version. Definiely should be a little cheaper than threadripper 9960x and memory while ridiculously expensive, is cheaper than the required rdimm for the threadripper.

lemans24I think a lot of people and especially x3d cpu owners, are going to be surprised by the performance of Nova Lake with implmentation of APX instruction set.

In terms of ISA improvements, it's the biggest we've seen in decades, much more significant performance wise than x86-64. (Except for SIMD, but that's not apples to apples.)

But one important detail to keep in mind is that we'll likely not see much of these advancements at launch, since it will require recompilation. Luckily, unlike AVX, it wouldn't require using manual optimizations to extract significant performance, a flag and recompilation is all APX needs. But the state of the compilers are in question. GCC and LLVM has had support for a while, and MSVC added experimental support back in May, so we shouldn't expect anything to show the full potential for APX anytime soon. The real potential in APX comes from the new instructions for conditional load, store, compare and test, and for the compilers to translate branched sections of code into branchless machine code, and adding such optimizations will likely take years. So even if we see a handful of (mostly open source) tools and applications with APX support around launch time, it will still likely be just a taste of the potential.

Those workloads which will benefit the most will be latency sensitive tasks, which includes general application use and system responsivity, most of which aren't usually directly benchmarked. The exception is gaming, where we should expect to see great benefits from APX, but it will also have the slowest adoption rate, as games usually lag behind in compiler use and use the worst of the three.

Those who will likely see the greatest gains will be Linux users, where APX along with AVX-512 will mark a new era of performance in productivity.

lemans24Intel is definitely directly trying to acheive the overall performance crown for multithreading first and at least match Amd in top end gaming performance. I am just looking for maximum performance in an HEDT light environment and only interested in the overal performance flagship 52 core 288mb bllc version. Definiely should be a little cheaper than threadripper 9960x and memory while ridiculously expensive, is cheaper than the required rdimm for the threadripper.

Unfortunately, Intel doesn't currently offer their workstation parts capable of running at comparable clocks to their mainstream offerings, but APX may even out this difference somewhat, since they throttle less with mixed loads, which means with future high-end workstations the overall responsiveness might surpass Nova Lake, kind of like the old true HEDT platforms did with similar clocks.

Another great potential of APX is it will help keep wider CPU designs saturated, so it will incentivize designing larger cores with much higher IPC vs. pushing the clocks to higher extremes. This means in the future we might see workstation/server cores which have much larger cores than their mainstream counterparts, running at lower clocks, but still crushing it in performance.

efikkanIn terms of ISA improvements, it's the biggest we've seen in decades, much more significant performance wise than x86-64. (Except for SIMD, but that's not apples to apples.)

But one important detail to keep in mind is that we'll likely not see much of these advancements at launch, since it will require recompilation. Luckily, unlike AVX, it wouldn't require using manual optimizations to extract significant performance, a flag and recompilation is all APX needs. But the state of the compilers are in question. GCC and LLVM has had support for a while, and MSVC added experimental support back in May, so we shouldn't expect anything to show the full potential for APX anytime soon. The real potential in APX comes from the new instructions for conditional load, store, compare and test, and for the compilers to translate branched sections of code into branchless machine code, and adding such optimizations will likely take years. So even if we see a handful of (mostly open source) tools and applications with APX support around launch time, it will still likely be just a taste of the potential.

Those workloads which will benefit the most will be latency sensitive tasks, which includes general application use and system responsivity, most of which aren't usually directly benchmarked. The exception is gaming, where we should expect to see great benefits from APX, but it will also have the slowest adoption rate, as games usually lag behind in compiler use and use the worst of the three.

Those who will likely see the greatest gains will be Linux users, where APX along with AVX-512 will mark a new era of performance in productivity.


Unfortunately, Intel doesn't currently offer their workstation parts capable of running at comparable clocks to their mainstream offerings, but APX may even out this difference somewhat, since they throttle less with mixed loads, which means with future high-end workstations the overall responsiveness might surpass Nova Lake, kind of like the old true HEDT platforms did with similar clocks.

Another great potential of APX is it will help keep wider CPU designs saturated, so it will incentivize designing larger cores with much higher IPC vs. pushing the clocks to higher extremes. This means in the future we might see workstation/server cores which have much larger cores than their mainstream counterparts, running at lower clocks, but still crushing it in performance.

Yes, I have a 1950x threadripper and I/o is still really good but upgrading to threadripper 9960x is way too much because of the price of memory. I can get 128gb non rdimm memory for half the price and that is still 4 times what I would have paid only a year ago.
Since I need to upgrade as soon as possible, I have settled on 270k plus and will upgrade later on after Nova Lake/ Zen 6 become available for retail. I build and run high performance options trading systems in C# and Rust so hopefully the Apx instruction set will be available with Rust compilers within the next 2 years where I need the performance the most.

Zen 6 looks really amazing too but the I/o for nvme drives is slightly better on Intel platform and if bLLC is really good, will most likely upgrade to Nova Lake flagship in a few years.

Threadripper would be and still is my first choice but will get one for server usage later down the line. Ai coding tools are amazing now and I really need to upgrade my dev workstation first before getting an additional production server so Nova Lake/Zen 6 need to do double duty until then.

lemans24Since I need to upgrade as soon as possible, I have settled on 270k plus and will upgrade later on after Nova Lake/ Zen 6 become available for retail. I build and run high performance options trading systems in C# and Rust so hopefully the Apx instruction set will be available with Rust compilers within the next 2 years where I need the performance the most.

Any chance you can hold on for about ~6 months?
It sounds like your workload might need some memory too, so that temporary system might be costly. Or if you can make due with just 32 GB and a basic motherboard for your development system, and run the big workloads on the old Threadripper?

I can't speak to how quickly Rust will get proper support, but there are some Rust work being done for GCC. C# is obviously not ideal for anything performance critical or memory constrained. It all depends on the kind of libraries you use, and whether you are in charge of the project or not. But don't forget, the best options for performance is always going to be C or C++, and then compiler support and library support wouldn't be a headache.

lemans24Zen 6 looks really amazing too but the I/o for nvme drives is slightly better on Intel platform and if bLLC is really good, will most likely upgrade to Nova Lake flagship in a few years.

No one knows how Zen 6 will stack up performance wise vs. Nova Lake.
But we do know a bit about the IO, and AM5 is going to fall short for "workstation" use if you need 16 lanes for a high-performance GPU.
That extra L3 cache is not likely to have a large impact either way for this kind of load.

efikkanAny chance you can hold on for about ~6 months?
It sounds like your workload might need some memory too, so that temporary system might be costly. Or if you can make due with just 32 GB and a basic motherboard for your development system, and run the big workloads on the old Threadripper?

I can't speak to how quickly Rust will get proper support, but there are some Rust work being done for GCC. C# is obviously not ideal for anything performance critical or memory constrained. It all depends on the kind of libraries you use, and whether you are in charge of the project or not. But don't forget, the best options for performance is always going to be C or C++, and then compiler support and library support wouldn't be a headache.


No one knows how Zen 6 will stack up performance wise vs. Nova Lake.
But we do know a bit about the IO, and AM5 is going to fall short for "workstation" use if you need 16 lanes for a high-performance GPU.
That extra L3 cache is not likely to have a large impact either way for this kind of load.

Yes, at the microsecond level of performance, C# is not reliable enough and I can write in both C++ and Rust. Really need ultra high performance when reading market data feed during crazy market volatility without slowing down the computer. More L3 cache will definitely come in handy and APX instructions will be needed by my core processing when you move through 100k + tps.

I have already budgeted an upgrade which would just be a motherboard and cpu. Expensive, yes but trading as soon as possible will make it up.

52 core flagship with bLLC looks really amazing for the system I am building. Will wait for reviews and decide from their.

For now 270k plus is a good deal for a dev workstation I can build in the next few months.

I am sure Nova Lake will have teething issues especially with the flagship chip that I am mainly interested in so 270k plus will do until I am ready to upgrade again.

lemans24Yes, at the microsecond level of performance, C# is not reliable enough and I can write in both C++ and Rust.

With those kinds of requirements you need to master low-level optimizations, including avoiding heap allocations in performance critical code, limiting random function calls and even avoiding system calls, and most importantly traversing the data in the most efficient order and avoiding software bloat at all cost. If you don't already, learn how to profile and analyze the generated machine code, and it might surprise you how tiny of a change can make a massive performance change for a code section.

lemans24More L3 cache will definitely come in handy and APX instructions will be needed by my core processing when you move through 100k + tps.

If your code is sensitive to L3 cache, you primarily should look at cache optimizations, which basically means reducing bloat, avoiding unnecessary function calls and keeping the code as dense as possible.

lemans24Really need ultra high performance when reading market data feed during crazy market volatility without slowing down the computer.

Congrats if you're in the tiny portion of day traders making a profit.
The best of luck. :)