Wednesday, January 30th 2019

AMD Updates Wafer Supply Agreement with GlobalFoundries to Free Itself of "7nm Tax"

AMD in its Q4-2018 Earnings Report disclosed that it has amended its Wafer Supply Agreement (WSA) with GlobalFoundries that frees it from paying a "7 nanometer tax." Under the older version of WSA, AMD would have had to pay a penalty to GlobalFoundries if it sourced processors from any other semiconductor foundry. The company got preferential pricing in return for the exclusivity. With GlobalFoundries discontinuing development of cutting-edge processes such as 7 nm and 5 nm, it makes sense for AMD to seek out other foundry partners, such as TSMC, and an amendment to the WSA was needed. With this amendment in place, AMD can go ahead and source 7 nm dies from TSMC without paying penalties to GlobalFoundries (GloFo).

With its "Zen 2" microarchitecture, AMD is going big on multi-chip modules, in which only those components that can tangibly benefit from the switch to the 7 nm node, namely the CPU cores, would be built on 7 nm dies, called "CPU chiplets," while components that don't need the miniaturization just yet, such as the processor's memory controller, PCIe root-complex, etc., will be built on separate dies called "I/O controllers." These dies will continue to be 14 nm, and likely supplied by GloFo. Final packaging of 7 nm CPU chiplets from TSMC, and 14 nm I/O controllers from GloFo, will happen at GloFo's facilities in China or Malaysia. AMD in its amendment committed to purchasing 14 nm and 12 nm chips from GloFo between 2019 and 2021, which means the MCM approach to processors is here to stay.
Source: Overclock3D
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13 Comments on AMD Updates Wafer Supply Agreement with GlobalFoundries to Free Itself of "7nm Tax"

#2
Dbiggs9
Lisa said Navi & Ryzen 2Q Launch So expect AMD Stock to be ryzen 2019 Q3,4 2020 1H (Q4 results Call).
Epcy, Ryzen 3000 series & Navi margins 38-41%
AMD with it's large orders gives them higher priority over NVIDIA at TSMC Rome is 8 chips alone Ryzen 3000 series 2 chips.
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#3
bug
Under the older version of WSA, AMD would have had to pay a penalty to GlobalFoundries if it sourced processors from any other semiconductor foundry. The company got preferential pricing in return for the exclusivity.
Basically, they didn't free themselves from anything. They got a better price in exchange for exclusivity so far.
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#4
f22a4bandit
bug, post: 3984574, member: 157434"
Basically, they didn't free themselves from anything. They got a better price in exchange for exclusivity so far.
The amendment slide states AMD is free to use any foundry for 7nm and beyond without any one-time payments or royalties. That's freeing themselves from something, would you not agree?
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#5
bug
f22a4bandit, post: 3984748, member: 88569"
The amendment slide states AMD is free to use any foundry for 7nm and beyond without any one-time payments or royalties. That's freeing themselves from something, would you not agree?
Considering GF cut back on their 7nm ambitions, not taxing AMD if they took their business elsewhere was pretty much a given. But yeah, if I look at it the way you put it, it can make sense.
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#6
lexluthermiester
This is just common sense. Technically, GloFo was in breach of contract by dropping 7nm/5nm development as that was clearly the direction AMD was going to go. The amendment was required as such.
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#7
bug
lexluthermiester, post: 3986221, member: 134537"
This is just common sense. Technically, GloFo was in breach of contract by dropping 7nm/5nm development as that was clearly the direction AMD was going to go. The amendment was required as such.
Yeah, but then again common sense and lawyers... you know.
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#8
seronx
As far as I know the actual breach was AMD.
At the time, GF was investing about 85% of its R&D dollars and 95% of its capital equipment budget in 7nm (and below). Tom found that his customers split into three groups:
  1. People who were never going to use 7nm or below.
  2. People who intended to use 7nm but for whom GF was not relevant.
  3. People GF was already engaged with at 7nm.
The view of the first category was that GF's investments were not aligned with their needs since it was mostly going on a process roadmap they would not use. The second group were the big 7nm potential customers, where GF was irrelevant since it was always going to be too late, and with too little capacity. The third group, which included IBM and AMD among others, were worried whether GF was financially strong enough to fund a dual technology roadmap, and also that GF would not be big enough to be more than ~30% of their capacity for the long haul.
https://community.cadence.com/cadence_blogs_8/b/breakfast-bytes/posts/gtc-globalfoundries-report
In 7nm, our plan was never to have more than 50% of their volume just due to customer diversity.
https://community.cadence.com/cadence_blogs_8/b/breakfast-bytes/posts/gtc182

AMD didn't want to do two foundries, when they could do it on one fab. Which foundry T will have better volume than that of Globalfoundries for the 7nm 193i and 7nm EUV nodes.
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#9
mtcn77
I just want to know whether GF could service AMD some FinFET+12FDX for custom MCM desktop cpus that are probably only going to use just a single chiplet. AMD could make a tradeoff in efficiency for transistor switch latency. It is as if the TDP isn't the main issue going forward with single threaded performance any more(Dennard Scaling).

12FDX seems to have a practical limit @150mm², but this is all well documented and plus AMD is the king of semi-custom, amirite?
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#10
seronx
mtcn77, post: 3987067, member: 85046"
12FDX seems to have a practical limit @150mm²
That limit is just a soft-limit. Once you go past that point FinFETs become better options. However, on a roadmap that would never go FinFET. That limit is not present nor advisable.

28nm -> 22FDX -> 12FDX with large dies are completely okay. Rather than going 28nm bulk -> 20nm planar bulk -> 14nm planar bulk, etc.

22FDX's limit compared to FinFETs is around 180 mm squared.
12FDX's limit compared to FinFETs is around 270 mm squared.
With the most current version of the FEOL/MOL/BEOL.

If channel mobility goes up, so does drive current.
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#11
mtcn77
seronx, post: 3987085, member: 86156"
However, on a roadmap that would never go FinFET.
I'm missing the point as to why FDX and FinFET don't go together. It seems to me they aren't totally corresponding to the same use which is lowering dynamically switching power - FDX is better at static power efficiency.
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#12
seronx
mtcn77, post: 3987095, member: 85046"
I'm missing the point as to why FDX and FinFET don't go together. It seems to me they aren't totally corresponding to the same use which is lowering dynamically switching power - FDX is better at static power efficiency.
Both lower dynamic switching power. The FDX map is better on power curve, while the FinFET map is better on the performance curve. However, FDX has a larger feasible range of voltages to operate within.

Why FDSOI and FinFET don't go together. Is that those that went FinFET have already designed around FinFET's issues. However those that are going FDSOI route, will simply bypass FinFETs all together.

FDSOI => Lower cost, lower development time, more cool/less power, etc.
FinFET => Higher cost, longer development time, more hot/higher power, etc.

Going both requires big pockets.

A pure FDSOI chiplet design is better for power.
A pure FinFET chiplet design is better for performance.
A mixed FDSOI+FinFET chiplet design requires FinFET development time and FinFET cost.
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#13
mtcn77
seronx, post: 3987099, member: 86156"
Going both requires big pockets.
Well, guess what? The past CEO at IBM who is the current CEO "CTO" at GF directly challenged the board at IBM when they greenlighted '7nm' and I don't think he erred on the point:
  1. 7nm is 3 times more expensive which is what bankrupted IBM's foundry business,
  2. 12nm is not that much more expensive than 14nm,
  3. A cross development between FDX and FinFET is bound to be expensive, but remember the CEO who is at play here, he does not want 7nm!
I think I might have a point here if not mistaken.

*PS: I'll have to check whether it was just '7nm' singularly or '7nm FinFET' that they were aiming for at the time, but out the top of my mind I think it was 7nm FinFETs.

We actually were pursuing both FinFETs and FD-SOI, and at the end of the day, IBM’s focus was on performance at any cost. FinFET is a great technology for that, but if you're looking for something that is more in the consumer space, you need to balance performance with power and cost, you know FD-SOI is a clear winner.
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