Samsung has reportedly booked the entire planned output of its second fab in Taylor, Texas, and most of it is going to AMD. According to an exclusive from Korea's Maeil Business Newspaper, citing industry sources, Taylor Fab 2 will make HBM base dies for AMD and NVIDIA on a 2 nm process, with AMD's orders making up the bulk of it. Apparently, AMD's volume alone is enough to stretch the fab's capacity. Samsung declined to comment, saying it can't confirm customer-related details.

These aren't AMD's CPUs or GPUs, though. The base die is the logic chip at the bottom of an HBM stack, and Samsung plans to pair the Texas-made dies with DRAM produced in South Korea and ship them as finished HBM. Its current HBM4 and the sampled HBM4E use 4 nm base dies, so 2 nm or smaller seems aimed at later HBM generations. The deal also follows Lisa Su's visit to Samsung in October, where Samsung reportedly wanted foundry orders from AMD in return for the HBM that AMD urgently needs. A March MOU had already made Samsung the primary HBM4 supplier for the Instinct MI455X.

Printed circuit boards (PCBs) are the foundation of every PC component, as they mount everything and connect the entire system using electrical components, wiring, and more. However, we are about to enter another phase of consumer electronics price hikes, as these PCBs are now experiencing severe component shortages projected to last until 2030. According to Nikkei Asia, an unnamed executive from an American PC maker told the publication that PCB manufacturers are confirming this situation, with some predicting that orders placed today may not be fulfilled until late 2028.

American PC Maker for Nikkei AsiaEven though PC shipments could decline again next year, we are still struggling to secure enough PCB supplies to meet our needs.

SK hynix reported its latest Q3 2026 quarterly results with a record $78.129 billion in net revenue. However, the company also shared a market outlook, highlighting its long-term supply agreements and plans for expansion with new fab capacity and facilities under construction. For the consumer market, the outlook is grim as SK hynix expects memory demand to continue outpacing supply through 2030. The main supply constraint is the complexity of leading-edge semiconductor nodes and the lengthy lead times for fab construction, which take years to translate into regular mass production volumes.

Despite sustained demand, pricing is also on an upward trajectory, with the average selling price of memory modules in Q3 increasing by over 20% compared to Q2. This is concerning, as it suggests that the prices of consumer electronics devices might jump by more than 20% once memory inventory is depleted. Although SK hynix expects a decrease in PC and smartphone shipments, this will be offset by a strong rollout of AI data centers. About 14 major customers, including most hyperscalers, have signed 5-year long-term agreements, which will account for over 50% of total capacity sold for 2027 and 2028.

Michael Dell doesn't think the memory shortage is anywhere near over. Speaking with The Wall Street Journal, Dell's chairman and CEO said things will get worse next year, as the AI data center buildout keeps soaking up DRAM and HBM supply. According to him, the bottleneck for Dell isn't demand, since the company is sitting on roughly $95 billion worth of AI server orders it hasn't delivered yet, the largest backlog in its history. Memory is what's holding those shipments back, as AI accelerators need plenty of HBM, while the servers around them still rely on conventional DRAM.

Relief also looks quite far away. New memory fabs take around four years to build, so Dell apparently doesn't expect meaningful new supply until 2029 or 2030. That aligns with Micron's CEO, who recently said supply will be much tighter in 2027 and 2028 than it is this year. Interestingly, SK hynix's CEO said something similar, expecting the memory shortage to last through 2030. Dell is reportedly coping by buying DRAM only when final assembly is close and by locking in long-term supply agreements, though there's no word on how much of that applies to its consumer products.

NVIDIA's supply commitments climbed to $279 billion in the quarter ended July 26, up from $119 billion the quarter before. The company says the increase is primarily related to memory procurement. Morgan Stanley estimates that NVIDIA has claimed about 37.3% of global high-bandwidth memory (HBM) supply for 2027, with Alphabet at 36% and AMD at 12.1%. That adds up to roughly 85%, leaving everyone else to split the rest. These are Morgan Stanley's estimates, as reported by The Inference.

About $267 billion of the commitments come due by the end of fiscal 2029, according to the filing. NVIDIA reported record revenue of $96.2 billion for the quarter, but memory costs are weighing on margins. Gross margin was 75% and is guided to 74% this quarter, with a trough of 71% to 72% expected in the January quarter. CFO Colette Kress tied that pressure to memory pricing. Operating cash flow also fell to $24.1 billion from $50.3 billion the quarter before. Jensen Huang said on September 17 that he expects NVIDIA to sell twice as many chips next year, and the company's formal guidance is about 70% revenue growth.

Blizzard recently revealed that it is working on a new open-world shooter as a continuation of the StarCraft series, and, given the recent push from Xbox for Xbox exclusives, the expectation was that the StarCraft would be an Xbox exclusive of some sort. However, new information has emerged that this may not be the case for the RTS-turned-shooter.

According to a Blizzard representative responding to Kotaku, the studio "can only say for now that StarCraft won't be exclusive," although the representative declined to provide more specifics. For the time being, it's safe to assume that StarCraft will launch on PC and Xbox, at least—given the close relationship between Xbox consoles and PC, and the "hybrid" branding surrounding the Xbox Helix—but it's unclear whether the game will also launch on PlayStation 5.

Blizzard has confirmed a new StarCraft game during the BlizzCon 2026 Opening Ceremony, thus ending a wait that stretched back to StarCraft II's last expansion in 2015. The game is simply called StarCraft, not StarCraft III, and it drops the series' real-time strategy roots entirely, pivoting to an open-world, story-driven shooter. It's set in the Koprulu Sector roughly 70 years after the events of Legacy of the Void, with Blizzard describing it as a fresh story. The project is led by Dan Hay, previously creative director on several Far Cry games at Ubisoft. During the reveal, Hay said the game would be fought "not from above, but down in the mud, in the fire," which signals clear changes in gameplay mechanics.

The announcement trailer leaned entirely on cinematics, showing Dominion soldiers training and eventually fighting the Zerg, with no gameplay footage shown yet. A 2030 release is a long way off, and Blizzard has been upfront that the game is still early in development. That gives the studio plenty of room to reveal actual gameplay before launch, though it also means specifics on combat systems, world structure, or platforms are still unknown. Given how quiet the franchise has been since 2016's Nova Covert Ops, it's honestly a bit of a surprise Blizzard chose to reinvent StarCraft as a shooter rather than return to its RTS format, though I suspect that's exactly why it's getting attention now.

Intel has officially processed one million 300 mm silicon wafers using High Numerical Aperture (High NA) Extreme Ultraviolet (EUV) lithography, as confirmed by the company yesterday. Using High-NA in silicon manufacturing presents many challenges due to the additional complexity it introduces, but for Intel, the opposite is true. Initially, Intel installed ASML's TWINSCAN EXE:5000 High-NA EUV systems in 2024 for research and testing of the 14A node. However, since then, Intel has found more useful ways to employ High-NA tools beyond the 14A node, extending their use to the 18A node, which was previously believed to be exclusive to 14A.

For a select subset of "Panther Lake" SKUs, Intel is etching a few layers of silicon using High-NA exposure, instead of solely relying on Low-NA. Furthermore, Intel is offering this High-NA setup to external customers, as it could be beneficial for them as well. In collaboration with ASML, Intel has completed acceptance testing at Intel Foundry for its 14A node to enhance wafer output. This is done using TWINSCAN EXE:5200B, which is ASML's second version of High-NA EUV scanners, following the TWINSCAN EXE:5000 that Intel initially used for its 14A trial runs. Intel previously reported processing over 30,000 wafers in a single quarter, achieving simplified manufacturing by reducing the steps needed for a specific layer from 40 to fewer than 10, resulting in significantly faster cycle times.

SK hynix expects the current memory shortage to persist through the end of 2030, with no clear signs of a slowdown yet, according to CEO Kwak Noh-Jung. Speaking after the company's groundbreaking ceremony for its new Indiana packaging facility, Kwak said any eventual slowdown would likely be the result of a gradual easing rather than the sharp price crashes memory markets have previously seen, per Reuters. SK hynix had previously flagged tight supply lasting through 2028 for commodity DRAM, so this latest comment pushes that prediction out further.

Kwak's reasoning is that memory products have moved away from being purely commodity parts. AI-driven demand has pushed customers toward customized DRAM and HBM configurations, which makes future demand easier for manufacturers to forecast and less prone to the abrupt oversupply swings that caused previous crashes.

Rapidus has laid out its advanced packaging roadmap at the 2026 OCP APAC Summit, with eight-reticle-size interposers and 600 x 600 mm panel-level processing as the targets for around 2030. The roadmap was presented by Rapidus Design Solutions CTO Rozalia Beica and shows steps through interposer sizes from four reticles (3,320 mm²) to six (4,980 mm²) and eventually eight (6,640 mm²) by 2030. The 600 x 600 mm panel format is the most important target of that plan as the yield advantage at panel scale is substantial. CTO Beica illustrated the output difference in a simple manner: an eight-reticle interposer yields four units on a standard 300 mm wafer, nine on a 300 x 300 mm panel, 36 on a 510 x 515 mm panel, and 49 on a 600 x 600 mm panel. Taiwanese rival TSMC has its own CoWoS interposer roadmap showing plans aiming for 5.5 reticles in 2026, 9.5 in 2027, and 14 reticles in 2028. However, the two companies are taking different manufacturing approaches. Rapidus is betting on panel-level processing rather than wafer-based scaling.

The 600 mm panel strategy is underway, with Rapidus demonstrating the format and working with Lam Research's Kallisto electroplating system to develop 2.xD packaging with redistribution layers formed on 600 mm glass carriers. We reported in late 2025 that Rapidus produced the first large-format glass interposer prototype and plans to enter mass production in 2028. Last year, Rapidus taped out a 2 nm GAA test chip using ASML EUV tools claiming a transistor density of 237 MTr/mm². Its FY2026 plan brings the Rapidus Chiplet Solutions pilot line into full operation to verify 2.xD and 3D packaging processes.

Samsung Foundry has been consistently upgrading its chip-making tools. However, despite the availability of the new generation of EUV lithography, the company has not yet committed to using High-NA EUV lithography tools from ASML. According to ZDNet Korea, this is expected to change with the development of Samsung's 1 nm node, scheduled for 2030. This will be one of the last introductions of High-NA EUV machinery across leading-edge semiconductor node designs. Intel is gradually scaling up its 14A node to risk production with High-NA EUV tools, while TSMC is expected to introduce it in 2029. Samsung being one of the last does not necessarily mean the company is in a rush, as it is currently performing well with the existing Low-NA EUV tools.

For reference, TSMC claims it can maintain a competitive advantage using the existing Low-NA EUV technology for now, scaling nodes down and introducing improvements with each generation. Low-NA tools are also half the price of the premier High-NA EUV systems. The most advanced High-NA EUV machine from ASML costs around $400 million, which is an incredibly expensive piece of machinery, even for a modern semiconductor fab. Hence, TSMC has refrained from using it for now as it can achieve similar advantages with the current Low-NA technology, and Samsung appears to be following this decision.

A very grim picture is being painted over the consumer PC space as Lenovo is now claiming that memory price increases will become the new norm. According to the latest report from Wall Street News China, Lenovo stated at ISC 2026 that the upward trajectory for memory prices has just begun, meaning that these increases will become a standard expectation. This is disappointing news for the majority of PC enthusiasts who were hoping for stabilization in DRAM and NAND Flash pricing, as these increases are pushing the cost of consumer electronics beyond previous levels of affordability.

Lenovo, one of the largest PC OEMs, frequently conducts channel checks with its DRAM and NAND Flash suppliers. The company is adept at projecting demand, allowing it to understand where the demand and supply ratio is heading. According to the company's analysis, even though Samsung, SK hynix, and Micron are accelerating the construction of new semiconductor fabs to expand capacity, this is simply not enough to meet demand. It is unclear whether this means that the new capacity coming online is insufficient or if the current capacity projections are inadequate. Either way, Lenovo projects that shortages of DRAM and NAND Flash will last longer than originally anticipated.

Samsung is steadily working towards its goal of creating 1000-layer NAND Flash storage modules. However, as manufacturing complexities increase, the company cannot achieve this with a single chip. Instead, it is turning to advanced packaging solutions to stack two 450-layer V-NAND modules into a single 900-layer V-NAND chip. According to ET News, which first reported this manufacturing achievement, Samsung is using Cell Multi-Bonding (CMB) technology, a variant of wafer stacking achieved through hybrid bonding. This process forms a permanent bond between two silicon chips using embedded metal bumps that are fused together to create a single chip. Multiple dies, or in Samsung's case, multiple whole silicon wafers, can be connected by stacking two chip back ends together. Samsung's proprietary process, called CMB, paves the way for 1000-layer V-NAND chips by 2030.

Early last year, Samsung unveiled its 10th-generation V-NAND technology, enabling over 400 layers on a single module. The company also introduced hybrid bonding for the first time, indicating that the technology has since been refined. Interestingly, wafer bonding on already thick 450-layer designs is challenging due to wafer warping. Thankfully, Samsung developed microscopic chucks to address this, along with new bonding techniques to correct overlay issues and misalignment errors when wafers are bonded together. Within the NAND itself, Samsung created new bitline and wordline structures to help manage power consumption and maintain reasonable individual chip sizes.

With the reputation Cyberpunk 2077 currently has, it's easy to forget that the game launched in a rough state, afflicted by major performance and polish issues. According to a recent talk by CDPR's lead technical writer, Jarosław Ruciński and senior technical writer, Adrian Fulneczek, at a Ditigal Dragons panel, the studio doesn't intend to make the same mistake twice. According to the pair (via Gamesradar) , the studio has addressed the main cause of the issues that afflicted the Cyberpunk 2077 launch—specifically poor documentation. During the development of Cyberpunk 2077, the studio created more than 8,000 pages of documentation with a tool called Confluence, after which, the development team decided to migrate to a cloud instance of the tool, which further fragmented the documentation. As Fulneczek explains, the studio stopped prioritizing maintaining the documents entirely as a result, which led to difficulties understanding those documents both within CDPR and at its international partner studios.

Coming out of the tumultuous Cyberpunk 2077, CDPR has "learned its lesson" and integrated documentation into its development process. Now, before anything is allowed to go through a development gate, to the next stage of development, it has to be documented properly. Institutional knowledge and documentation are no longer restricted to specific teams, with everyone working on the studio's projects having access to the same knowledge base, even across separate projects. This helps cut back on duplicate work and lets the whole company benefit from breakthroughs that happen in individual projects. Neither Cyberpunk 2 nor The Witcher 4 have release dates attached to them at the time of writing, but Cyberpunk 2 is expected to launch sometime in 2030, while The Witcher 4 is thought to be past the pre-production phase.

Star Wars: Fate of the Old Republic has been out in the open now, with the game's director, Casey Hudson, formerly of BioWare, promising a pre-2030 launch in late 2025. Now, in a recent statement to Bloomberg about the upcoming game and a recent investment by NetEase veteran, Simon Zhu, Hudson has commented on the both the development process and scope of Star Wars: Fate of the Old Republic. Critically, Hudson says that "bigger isn't necessarily better," and explains his aversion to drawn-out games, saying that "if I'm excited about a game, and then I find out it's 200 hours long, even if I have no ambition to actually finish it, I wonder, if I put 20 hours in, will I even be out of act one?"

Hudson added that there will be ways to extend your fun in Fate of the Old Republic via replayability and alternative storylines that can be explored in subsequent play-throughs. He also commented on the development process, stating that "making games that take five or seven years—none of us want to do that," reiterating his previous commitment to a pre-2030 release for Fate of the Old Republic. On the topic of generative AI, Hudson had harsh words, calling the tech "creatively soulless," and rejecting its use in the game design and development process. The new Star Wars game will be receiving funding from Simon Zhu's newly announced holding company, GreaterThan Group, which was officially announced on May 12, 2026, and has a $40 million bank balance with another $60 million in funding commitments from "gaming and tech entrepreneurs."

AMD's CPU offerings will soon expand into more categories, specializing in different tasks and use cases. During the latest Q1 earnings call, AMD CEO Dr. Lisa Su confirmed that customers are increasingly interested in specialized EPYC solutions and that future CPU generations will cater to different customer needs. This means that agentic AI will receive a dedicated EPYC CPU SKU, HPC workloads will have their own EPYC CPU SKU, AI training and inference will get a separate EPYC SKU, and cloud workloads will have a distinct SKU. This expansion of task-specialized CPU designs will go beyond the "Venice" CPU platform, which is expected to be released this year. At CES 2026, AMD confirmed that EPYC "Venice" will be a highly dense CPU package with up to 256 cores and 512 threads of "Zen 6c" cores, while the regular "Zen 6" configuration will have a maximum of 96 cores and 192 threads.

With this generation of EPYC CPUs based on the "Zen 6" core IP, AMD will promote "Venice" CPUs broadly, while the "Venice" CPU generation will be complemented by the "Verano" CPUs. These appear to use the same "Zen 6" microarchitecture but have optimizations specifically designed for AI infrastructure. Contrary to previous assumptions that "Verano" would be a "Zen 7" IP, it is now confirmed to be part of the 6th-generation EPYC CPU family. This indicates that AMD is starting its CPU customization for different workloads as early as this year. As the server CPU market is projected to reach $120 billion by the end of this decade, less than 3.5 years away in 2030, it makes sense to have different CPU SKUs for each task and capture a significant portion of that revenue. Server CPUs are also expected to grow at a 35% compound annual growth rate, which is impressive for a relatively mature market.

NVIDIA today announced the world's first family of open source quantum AI models, NVIDIA Ising, designed to help researchers and enterprises build quantum processors capable of running useful applications. To achieve useful quantum applications at scale, significant breakthroughs are needed in quantum processor calibration and quantum error correction. AI is key for turning today's quantum processors into large-scale, reliable computers. Open models empower developers to build high-performance AI while maintaining total control over their data and infrastructure.

Named after a landmark mathematical model that dramatically simplified the understanding of complex physical systems, the NVIDIA Ising family provides high-performance, scalable AI tools for quantum error correction and calibration — two of the most critical challenges in building hybrid-quantum classical systems. Ising models run the world's best quantum processor calibration and enable researchers to tackle much larger, more complex problems with quantum computers by delivering up to 2.5x faster performance and 3x higher accuracy for the decoding process needed for quantum error correction.

Earlier this week we reported that the memory shortage was going to persist until late 2028, but news out of Korea now suggests it might stick around all the way until 2030. SK Group Chairman Chey Tae-won is quoted by The Korea Times saying that "The shortage stems from a lack of wafer capacity, and securing additional wafers takes at least four to five years," continuing "We expect the industry-wide supply shortfall to persist at over 20 percent through 2030."

The company is apparently looking at ways to stabilise pricing, but as to when this will happen, is anyone's guess at this point in time. In this specific case, it's down to SK hynix CEO Kwak Noh-jung to try and resolve the immediate situation. SK Group doesn't seem interested in building fabs outside of South Korea either, as Chey also told The Korea Times that "Korea already has the infrastructure in place, allowing for a much faster response. That is why we are concentrating our efforts here." There is at least some good news here, as it doesn't seem like SK hynix will put its entire focus on HBM memory, as the company is aware that might lead to further shortages of DRAM, which will affect the broader tech industry.

We've already seen signs that Cyberpunk 2's development is in full swing at CD Projekt Red, with the game studio earlier this year expanding its development team for the upcoming Unreal Engine 5-based game. Previously, no release date for the new game had been revealed, teased, or even proposed by the usual sources, but a Polish analytics firm, Noble Securities (via Strefa Inwestrów), has posited that Cyberpunk 2 would launch in 2030, specifically Q4, 2030, which would make the game a holiday release. The firm also predicts that the recently delayed final update for The Witcher 3 will land as early as May 2026 and the launch of The Witcher 4 in Q4 2027.

In addition to the launch dates, we also got a prediction for the budget of Cyberpunk 2, which the firm says will likely end up around the $419 million mark, which aligns with the reported ~$436 million budget of Cyberpunk 2027. A late launch lines up with the launch of Cyberpunk 2077, which launched in December, and it makes sense from a business point of view, since that is when gaming sales peak. Of course, being this far away from the projected launch date means that things are highly volatile—this being especially true in the current gaming landscape, where delays seem more common than ever.

Star Wars: Fate of the Old Republic (FotoR) was unveiled at The Game Awards, last week. Prior to introductory events unfolding in Los Angeles, the games industry rumor mill had generated speculation about various "Knights of the Old Republic" (KotoR) remake or reboot projects. Days ago, Lucasfilm and Arcanaut Studios unveiled a spiritual successor—many attendees and stream watchers were surprised by the collaborators' teaser trailer. Long-time franchise fans were happy to see Casey Hudson—a former BioWare veteran—introduce his latest project. SW: Fate of the Old Republic's game director has worked on a number of popular titles, including: Knights of the Old Republic (2003), Jade Empire (2005), the original Mass Effect trilogy (2007 to 2012), and Anthem (2019).

Predictably, well-known figures weighed in with skeptical opinions and predictions. Jason Schreier—of Bloomberg fame—a very recently booted up development cycle: "Lucasfilm says the studio (Arcanaut) was founded this year, which means that 2030 is an 'optimistic' guess. Maybe it'll be a PlayStation 7 game." Schreier's expertise—as a journalist and author—mostly covers the making of modern AAA titles; usually mega expensive and time-consuming affairs. In theory, FotoR's development team "has it easy" due to their game being a "narrative-driven single-player action RPG," rather than a huge open world experience. In a response seemingly directed at outsider estimates, Hudson commented: "don't worry about the 'not till 2030' rumors. Game will be out before then. I'm not getting any younger!"

Dai Nippon Printing Co., Ltd. (DNP) today announced the development of a nanoimprint lithography (NIL) template featuring a circuit line width of 10 nanometers (nm: 10-9 meter). The new template enables patterning for logic semiconductors equivalent to the 1.4 nm generation and meets the miniaturization needs of cutting-edge logic semiconductors used in devices such as smartphones, data centers, and NAND flash memory.

Background and Aims
In line with the shift to more sophisticated devices seen in recent years, demands have emerged for even greater miniaturization in cutting-edge semiconductors, leading to advances in Extreme Ultra-Violet (EUV) lithography-based production. EUV lithography, however, requires substantial capital investment, energy consumption, and operating costs in building production lines and the exposure process. This has fed into the pressing need to balance a reduction in manufacturing costs with a lowering in the environmental burden.

During a conference about a month ago in Japan, Seagate has disclosed a massive milestone for heat-assisted magnetic recording (HAMR) technology—a prototype platter capable of storing roughly 6.9 TB of data. The company stated it has already run simulations for platters that reach 8 TB of capacity, but that is still a distant dream. Seagate's roadmap points to production-ready platters above 7 TB in the early 2030s and hints at an eventual path toward densities in the neighborhood of 15 TB per platter or more. For now, this 6.9 TB platter unlocks a HAMR HDD with the capacity of roughly 55 TB, ideal for high-density storage system. No information on read/write speeds was provided.

This kind of step change and gradual capacity increase matters most where raw capacity and cost per TB are the primary concerns. Data center cold tiers, backup servers, media archives, large NAS arrays and video editing vaults would all benefit from drives that pack far more storage into each chassis. Fewer drives mean simpler arrays, lower power and cooling demands, and less rack real estate to manage, which together can shrink the total cost of ownership for very large storage deployments. Especially with the modern content creation, AI workloads, and everything else in the digital world, storage requirements are skyrocketing.

Micron has announced a significant revision to the schedule for its semiconductor campus near Clay, New York, with initial production now set to begin at the end of 2030. According to company filings and permit documents, the construction timeline for the first manufacturing facility has been extended from three years to four, and regulators have approved this adjusted schedule. Additionally, Micron has amended its $6.1 billion CHIPS Act agreement to reallocate approximately $1.2 billion from the Clay project to expedite expansion in Boise, Idaho, allowing the Idaho site to become operational well before the New York facility. This is part of Micron's strategy to maintain at least 40% of its DRAM manufacturing operations in the U.S.

The revised schedule significantly delays the following phases of the Clay campus and changes the project's long-term outlook. According to the new plan, the second fab is now set to begin in mid-2030 and is expected to be completed around 2034. Similar delays have affected the third and fourth fabs. As a result, the completion of the entire four-fab campus has been pushed from the original target of 2040 to closer to 2045. This delay also affects the introduction of community support initiatives, such as childcare, housing, and transit improvements, which are intended to benefit the campus workforce. Local officials attribute the slowdown primarily to labor shortages and extended construction cycles.

Texas Instruments (TI), a global semiconductor company that designs, manufactures, and sells analog and embedded processing chips, today announced the opening of its newest state-of-the-art assembly and test factory in Melaka, Malaysia, TIEM2. This new factory features advanced factory automation to bump, probe, assemble and test billions of analog and embedded chips annually that are vital for nearly every type of electronic system - from vehicles to smartphones to data centers.

TI's new six-level factory in Melaka - which is in production - spans more than 900,000 square feet and connects to TI's existing Melaka assembly and test factory. The combined facilities now encompass more than 1.4 million square feet of manufacturing space to transform processed semiconductor wafers into finished chips.

Apple is making a notable comeback in the VR/MR market with its upgraded Vision Pro, which still uses OLEDoS display panels. The device aims to drive the next generation of head-mounted devices by enhancing computing power and weight distribution.

TrendForce's latest report on "2025 Near-Eye Display Market Trends and Technology Analysis" indicates that OLEDoS, the preferred display technology for mid-to-high-end VR/MR devices, is experiencing significant breakthroughs in both supply chain and application areas. Consequently, OLEDoS adoption in VR/MR is projected to rise to 58% by 2030.