Back in the now distant 2018, the semiconductor industry had three major players in contract leading-edge node manufacturing: TSMC, Samsung, and GlobalFoundries. At that time, Intel did not accept external clients. However, as node design became increasingly expensive—requiring multi-billion dollar investments—and more complex, with many players encountering yield and manufacturing difficulties, GlobalFoundries announced that it was stopping its 7 nm node development indefinitely. This left only two companies in the leading-edge race, but GlobalFoundries continued to develop unique semiconductor solutions that did not focus on smaller transistor sizes.

Today, the company is back at a similar stopping point but with a unique solution called FDX Fusion, based on fully-depleted silicon-on-insulator (FD-SOI) technology. Unlike traditional CMOS, GlobalFoundries takes substrate isolation a step further by creating a fully insulating layer beneath the channel. This enables highly specialized capabilities, such as ultra-low-power in-memory computing, seamless integration of embedded non-volatile memory (like eMRAM), and highly efficient dense logic designs. With FDX Fusion, GlobalFoundries claims 7 nm-class node characteristics in terms of size and twice the transistor density of the first-generation 22FDX node, which was designated as a 22 nm-class design.

Chinese semiconductor maker SMIC has increased its market share as the world's third-largest chipmaker. According to the latest report from TrendForce, SMIC now holds 5.4% of the semiconductor manufacturing market share in Q2 this year, a slight increase from 5.1% in Q1. In the three-month period ending in June, SMIC generated about $3 billion in revenue from domestic companies producing homegrown silicon. This marks a significant improvement compared to $2.2 billion in Q2 2025, with a slight increase in market share from that period's 5.1%. This indicates that overall capacity has increased across the supply chain.

SMIC's most advanced manufacturing nodes include the SMIC N+2, a 7 nm-class node used by Huawei to manufacture its Ascend series of AI accelerators and other infrastructure parts, and the SMIC N+3, a 5 nm-class node for its customers. The company uses DUV to print silicon designs but faces significant challenges in achieving its silicon ambitions as it currently has no access to EUV tools, since ASML has restricted exports of its EUV scanners, and it is the only company manufacturing EUV machinery at scale.

According to sources close to The Information, a Chinese company Shanghai Yuliangsheng Technology has reportedly begun limited production of immersion DUV lithography machines. This Shanghai-based company aims to produce five systems for delivery this year, with an estimated production of about 20 immersion DUV machines by 2027. While this may not seem like a large number, it represents a significant effort in developing homegrown DUV machine production, reducing reliance on third-party suppliers like ASML. The Shanghai company plans initial deliveries to SMIC, CXMT, and Hua Hong, which will integrate these machines into their production processes.

For those unfamiliar, immersion deep ultraviolet (DUV) machines use an argon-fluoride (ArF) excimer laser to produce DUV light at a 193 nm wavelength. This light travels through a layer of ultra-purified water placed above the final lens, which imprints circuit designs onto a wafer. Although this may sound straightforward, immersion DUV lithography tools are highly complex machines that ASML has been mass-producing for years. By comparison, ASML shipped 131 immersion DUV machines last year, showing the smaller scale of the Chinese production. Additionally, Chinese immersion DUV also imports some key components from Japan, while most are being sourced from China.

According to the latest information from the second quarter financial results, ASML is considering raising prices for its Low-NA EUV tools, which is reportedly upsetting its customers. ASML CFO Roger Dassen has noted that the company is looking into price increases for these tools, aligning its pricing strategy with product value. As the company continues to enhance the productivity of its tools, ASML plans to adjust pricing accordingly. The company operates a business unit called Installed Base Management, which focuses on maintaining and improving existing machines. Most of the recent productivity gains have come from ASML's software that operates EUV machines, and the company recently confirmed that:

ASML CFO Roger DassenWhen it comes to Low-NA pricing, of course, you know that we keep on increasing the productivity of the Low-NA tool. Of course, that gives us a pretty strong runway for potential price improvements going forward... Value-based pricing is the concept that we follow within ASML. In the current environment, of course, the value for customers is higher than in other circumstances.

According to Economic Daily News, TSMC is overhauling Fab 15A in Central Taiwan Science Park, transitioning it from 28/22 nm to 4 nm production. Old equipment is being cleared out and replaced with new tooling, and the total bill (cleanrooms and machinery included) is expected to top NT$100 billion (US$3.16 billion). The displaced 28/22 nm tools aren't going to waste either, heading to TSMC facility in Dresden, Germany, which is ramping toward mass production in 2027 on mature nodes aimed at the automotive and industrial market. Fab 15B stays on 7 nm for now. Further up the process roadmap, TSMC's 1.4 nm fab at the Phase 2 Central Taiwan site in Taichung is coming together faster than planned. Groundwork is mostly completed and construction bidding is expected to start shortly. If things keep moving at this pace, trial production could start as early as Q3 2027, with full mass production following in the second half of 2028.

There are also talks of 1 nm arriving at the Central Taiwan site earlier than previously expected. Worth noting that 1.4 nm isn't part of TSMC's US fab plans at all. Once all four Phase 2 fabs are running at capacity, the Taichung complex is expected to be the single largest production base for AI and HPC chips anywhere in the world. In April, TSMC introduced its A13 (1.3 nm) process at the 2026 North America Technology Symposium as a direct shrink of the previously announced A14 (1.4 nm) node. The new node offers around 6% area reduction, along with improved performance and power efficiency through design-technology co-optimization. The A13 node remains fully backward compatible with A14 design rules to allow easier migration. TSMC A13 node is expected to enter mass production in 2029, one year after A14.

ASML says it has boosted the light source power in its EUV lithography systems to 1,000 watts, up from roughly 600 W today. According to a Reuters report, the company claims the increase could enable up to 50% more chip output by the end of the decade. More source power translates directly into higher throughput. ASML says customers could process around 330 wafers per hour by 2030, compared to about 220 wafers per hour today, lowering the cost per chip. EUV light at a 13.5 nm wavelength is generated by firing a CO₂ laser at microscopic droplets of molten tin, creating plasma that emits EUV radiation. The light is then collected and directed through precision optics supplied by Carl Zeiss AG. To reach 1,000 W, ASML doubled the droplet rate to roughly 100,000 per second and shifted to a two-pulse laser shaping approach instead of a single pulse. The company says there is a path toward 1,500 W and potentially even 2,000 W over time.

ASML is the only supplier of commercial EUV scanners, used by major chipmakers including TSMC, SK Hynix, and Intel. The tools are considered critical to advanced node production and have been subject to export restrictions to China. The move is aimed at maintaining ASML's lead as U.S. companies, such as Pat Gelsinger's xLight EUV startup and Chinese efforts to develop competing lithography systems continue to ramp. Chinese companies have reportedly been sourcing parts from older ASML machines through secondary markets. Huawei is leading the charge, working to build a homegrown AI supply chain as a way around foreign tech restrictions. The company set up a large semiconductor manufacturing facility in Guanlan focused on 7 nm chips for its own processors. The Chinese government had initially aimed to have a working prototype from this effort by 2028.

Samsung Foundry has struck gold as its utilization rate has jumped to an impressive 80% this quarter. This comes after many years of struggling to achieve a good utilization rate, while competitors like TSMC have consistently led the adoption of newer nodes and gained a massive customer base. However, the situation has now changed, and Samsung's foundries are now operating at about 80% of total capacity, consistently producing silicon, with the Pyeongtaek Campus P2 and P3 leading the charge. Previously, these lines were only achieving a 50% booking rate last year and even struggled with insufficient production volume in the second half of 2024. Samsung uses these sites to manufacture 4 nm, 5 nm, and 7 nm nodes, which are now considered "mature," as the leading edge shifts to sub-3 nm production.

Part of the foundry revival is attributed to the strong demand for its 6th-generation HBM, coming in the form of HBM4 with a custom base die manufactured on the 4 nm node. While competitors are making HBM4 base dies on older nodes, Samsung is using a 4 nm custom base die that provides higher design density for any logic that ASIC makers want to implement. This can include some data processing that will aid the main accelerator in AI workloads. This has translated into high demand for Samsung Foundry products from external customers, who are now keeping production at high capacity.

Tesla has finalized the development of its AI5 automotive processor, allowing for production at TSMC and Samsung facilities. This advancement also revives the previously halted Dojo 3 supercomputer project. CEO Elon Musk announced that the AI5 chip will offer performance on par with NVIDIA's "Hopper" architecture, with two AI5 units equaling the power of a single "Blackwell" processor. The revival of Dojo 3 project was rumored with Intel joining as a key packaging partner, marking a shift from Tesla's earlier dependence on TSMC for complete manufacturing. Intel will manage assembly and testing using its EMIB technology, which connects multiple dies via silicon bridges instead of a full-wafer interposer. This method is better suited to Tesla's large Dojo modules that combine several 654 mm² chips into a single package.

Also based on previous information, Samsung will produce the D3 training chips at its Texas facility using a 2 nm process, leaving Intel to oversee packaging operations exclusively. This division of labor addresses capacity constraints and provides Tesla with more flexibility in customizing interconnect layouts. For the AI5 automotive chips, both Samsung and TSMC will create distinct versions, but Tesla aims to ensure identical software performance across both. Initial projections suggest the AI5 could operate at just 150 W while matching the performance of NVIDIA's H100 accelerator that requires 700 W. This efficiency is achieved by removing general-purpose graphics subsystems and optimizing the architecture specifically for Tesla's neural processing.

News via Reuters is suggesting that the Chinese government has started to mandate that Chinese semiconductor manufacturers have to use at least 50 percent locally produced chipmaking equipment in new or expanded fabs. Reuters claim that there's no official regulation to the matter, but Chinese chipmakers have been informed by local authorities that they need to provide procurement tenders that prove that at least half of the equipment they're buying are from local companies. This has apparently been the case when several different Chinese companies have applied to build new fabs or when they've applied for extensions of current fabs.

It's important to remember that a lot of the equipment in these fabs aren't related to the actual production of semiconductors, even if there are Chinese companies that are capable of producing some of the equipment needed for the semiconductor production side of things. However, it's also important to remember that China wants to be more self-reliant when it comes to semiconductor manufacturing and the end goal is for local companies to use only locally produced equipment in their fabs. Considering that the world's leading semiconductor manufacturers all rely on Dutch ASML for cutting edge photolithography machines, it's unlikely that this shift will happen any time soon. With the current technology export restrictions, this is also a step for China to show the world that they can do this on their own, without imported machines or components. According to Reuters, orders for 421 locally produced lithography machines and parts were placed in 2025. At the same time, China has set aside around US$49 billion to help boost the local semiconductor sector.

TrendForce's latest research indicates that the global foundry industry continued to profit in 3Q25, fueled by strong demand for AI in HPC and new consumer-electronics chips and IC peripherals. Revenue was primarily driven by advanced processes at 7 nm and below, with support from high-value wafers. Chinese foundries also expanded their business through supply-chain diversification. As a result, total revenue for the top 10 foundries increased by 8.1% QoQ to nearly US$45.1 billion.

TrendForce notes that expectations for 2026 demand have become cautious amid geopolitical headwinds. Furthermore, DRAM shortages and quarterly price increases since mid-2025 continue to strain downstream production costs. Even though automotive and industrial-control segments are preparing to resume restocking toward the end of 2025, the 4Q25 uptick in foundry utilization will be limited. Consequently, revenue growth among the top 10 is projected to narrow significantly in the fourth quarter.

Chinese company SMIC has officially achieved volume production of its newest 5 nm-class node called SMIC N+3. This is officially China's most advanced semiconductor node produced without any extreme ultraviolet (EUV) lithography tools, relying on the deep ultraviolet (DUV) to manufacture its silicon. In the latest analysis of the Huawei Kirin 9030 SoC, the TechInsights has confirmed that the chip has officially been manufactured using the new advanced node, bringing Chinese semiconductor independence one step closer to reality. This node is a full generation ahead of the older SMIC N+2, which is 7 nm-class node Huawei has been using to manufacture its Ascend series of AI accelerators and other infrastructure parts.

However, this is not without drawbacks. Since SMIC uses DUV to print silicon designs, the company faces significant challenges in realizing its silicon ambitions. For printing smaller nodes, EUV scanners offer more possibilities due to their much smaller wavelength of 13.5 nm, compared to the smallest DUV immersion scanner wavelength of 193 nm. TechInsights has confirmed that SMIC's N+3 node, despite achieving impressive DUV multi-patterning implementation, encounters significant yield challenges, particularly due to the aggressively scaled metal pitch. As a result, the Huawei Kirin 9030 SoC is likely produced at an operating loss, with a significant portion of dies being discarded or used for downgraded chips.

China's largest chipmaker, SMIC, is conducting trials of an immersion deep-ultraviolet (DUV) lithography scanner made by Shanghai Yuliangsheng Technology, a step toward building a local wafer fabrication equipment industry and reducing dependence on Western suppliers. The project, codenamed "Mount Everest", is tied through investors and collaborators to SiCarrier. It is reportedly assembled mostly from domestic parts, while a handful of components still come from abroad. SMIC is likely at an early testing stage, achieving first light or initial patterning rather than running the scanner inside a full production flow. The U.S. Commerce Department added Yuliangsheng to its entity list in late 2024, which gives the effort strategic urgency and helps explain the push to localize the remaining supply chain and qualify the machine for factory use.

The Yuliangsheng system is described as an immersion DUV scanner aimed at 28 nm class processes and similar in capability to older Twinscan designs from around 2008. In theory, chipmakers can push such tools toward 7 nm or even 5 nm technologies by using multi-step patterning, but that route increases process complexity, reduces yields, and requires much tighter overlay control and process stability. All of SMIC's current 7 nm and 5 nm nodes are manufactured using quad-patterning, which requires the scanner to perform as many as four laser shots to embed its print onto silicon, all to achieve a more modern node. SMIC is also expected to continue relying on ASML equipment for its most advanced products, while domestic tools mature. The company plans to begin integrating qualified local DUV machines into production lines as soon as 2027. Even if the current trials succeed, closing the technological gap to the world's leading lithography vendors and achieving competitive sub-10 nm yields will take several more years of redesign, qualification, and scaling.

According to the Financial Times, gathering data from satellite images and industry intelligence, Huawei has endeavored to develop a domestic AI supply chain to bypass foreign tech restriction influence. In Guanlan, China, Huawei started developing a complete facility for manufacturing semiconductors on 7 nm technology for its custom processors. Out of frustration with SMIC's low output capacity, Huawei has secured the entire silicon production, from sourcing materials, chemicals, and wafer fab equipment to chip-making equipment to actual chip design. According to Dylan Patel of SemiAnalysis, "Huawei has embarked on an unprecedented effort to develop every part of the AI supply chain domestically from wafer fabrication equipment to model building," adding, "We have never seen one company attempt to do everything before."

It is also reported that Huawei's rivals in silicon manufacturing, SMIC and SMEE, have deployed engineers to help Huawei develop its own manufacturing flow. A few companies, all backed by Huawei with funding and research, are the backbone of this operation. SiCarrier, which we reported on back in March, supplies optical and X-ray inspection tools, atomic force microscopes, and alignment systems for metrology; gas-based and atomic layer deposition tools for film coating; plasma etchers for patterning; rapid thermal processors for material tuning; and electrical testing platforms for reliability screening. SwaySure and Fujian Jinhua supply memory chips, Si'En and Pehgjin supply power chips, and PWX and PST deal with logic.

TSMC has acknowledged fundamental visibility limitations in its semiconductor supply chain, stating in its latest annual report that it "inherently lacks visibility regarding the downstream use or user of final products." This disclosure relates to an incident where 7 nm chips manufactured for Sophgo were later identified in Huawei's Ascend 910B/C AI accelerators, whose hardware is subject to US export restrictions. The contract foundry outlined its standard process: receiving GDS files through intermediaries, validating technical specifications, creating photomasks, and fabricating wafers without insight into end applications. Subsequent analysis revealed that those very chips matched Huawei's specifications, providing components for approximately one million dual-chiplet AI accelerator units, with two million dies shipped to Huawei.

The report warns that compliance violations by supply-chain partners, such as failing to secure proper import, export or re-export permits, could trigger regulatory investigations and penalties, even when TSMC adheres to its established protocols. US already proposed a $1 billion fine for TSMC. This visibility gap just shows that challenges in semiconductor manufacturing, where complex distribution networks obscure the path between fabrication and deployment, are not easily overcome. Foundries are facing increasing pressure to enhance tracking capabilities despite the inherent limitations of the contract manufacturing model. US sanctions on Chinese companies are growing their walls even higher, and this could mean that sanction-abiding companies might avoid doing business with Chinese entities altogether to avoid getting fined.

Earlier today, TechPowerUp covered the alleged performance prowess of Huawei's CloudMatrix 384 system super node. According to SemiAnalysis opinion, the system's Ascend 910C AI accelerators are a generation behind—in terms of chip performance—when compared to NVIDIA's GB200 "Blackwell" AI GPU design. SMIC seemed to be in the picture, as Huawei's main fabrication partner—possibly with an in-progress 5 nm node process. Instead, SemiAnalysis has surmised that the Ascend 910C is based on plenty of non-native technologies. Huawei's (current and prior) "aggressive skirting of export controls" has likely enabled the new-gen AI chip's better than expected performance stats. SemiAnalysis documented the early sample's origins: "while the Ascend chip can be fabricated at SMIC, we note that this is a global chip that has HBM from Korea (Samsung), primary wafer production from TSMC (Taiwan), and is fabricated by 10s of billions of wafer fabrication equipment from the US, Netherlands, and Japan...One common misconception is that Huawei's 910C is made in China. It is entirely designed there, but China still relies heavily on foreign production."

Despite China's premiere foundry business making pleasing in-roads with a theorized "7 nm N+2" manufacturing test line, Huawei has seemingly grown impatient with native immature production options. Today's SemiAnalysis article presents a decent dose of inside knowledge: "while SMIC does have 7 nm, the vast majority of Ascend 910B and 910C are made with TSMC's 7 nm. In fact, the US Government, TechInsights, and others have acquired Ascend 910B and 910C and every single one used TSMC dies. Huawei was able to circumvent the sanctions on them against TSMC by purchasing ~$500 million of 7 nm wafers through another company, Sophgo...It is rumored Huawei continues to receive wafers from TSMC via another 3rd party firm, but we cannot verify this rumor." Another (fabless) Chinese chip design firm—Xiaomi—appears to still have direct/unrestricted access to TSMC manufacturing lines, albeit not for enterprise-grade AI products.

As the US works to bring more semiconductor manufacturing back home, the machines needed to turn silicon into the world's most advanced processors are becoming pricier and harder to get, thanks to tariffs. Foundries building new fabs report that the specialized equipment they rely on, everything from extreme ultraviolet (EUV) lithography steppers to chemical vapor deposition chambers, carries a roughly 15% premium compared with similar gear sold overseas. Several forces are at play. The raw materials, high-grade quartz for vacuum enclosures, and exotic metal alloys for precision optics have climbed in price. At the same time, key components like ultra-accurate motion stages and alignment sensors are in short supply, sometimes stretching lead times for critical subsystems well beyond 18 months. For a fab racing to move from a 7 nm to a 5 nm process, those delays can mean missing tight ramp-up targets and pushing out product launches.

Smaller chipmakers feel the squeeze the hardest. With fewer orders to negotiate volume discounts, second-tier foundries may see their capital budgets balloon by 20 percent or more. In response, some are taking a mixed approach, sourcing commoditized tools such as oxidation furnaces and rapid thermal processors from multiple suppliers while reserving single-vendor deals for high-stakes systems like EUV scanners. Government support through the CHIPS Act offers a partial safety net, helping to subsidize capital expenditures. Yet even with grants and tax credits, the challenges will remain. Success will hinge on tight coordination between fabs, equipment makers, and policymakers to tame rising costs, shorten delivery schedules, and keep America's chip renaissance on track.

According to a recent Center for Strategic and International Studies report, Huawei got its hand on approximately two million Ascend 910B logic dies through shell companies that misled TSMC. This acquisition violates US export controls designed to restrict China's access to advanced semiconductor technology. The report details how Huawei leveraged intermediaries to procure chiplets for its AI accelerators before TSMC discovered the deception and halted shipments. These components are critical for Huawei's AI hardware roadmap, which progressed from the original Ascend 910 (manufactured by TSMC on N7+ until 2020) to the domestically produced Ascend 910B and 910C chips fabricated at SMIC using first and second-generation 7 nm-class technologies, respectively. Huawei reportedly wanted TSMC-made dies because of manufacturing challenges in domestic chip production. The Ascend 910B and 910C reportedly suffer from poor yields, with approximately 25% of units failing during the advanced packaging process that combines compute dies with HBM memory.

Despite these challenges, the performance gap with market-leading solutions still remains but has narrowed considerably, with the Ascend 910C reportedly delivering 60% of NVIDIA H100's performance. Huawei has executed a strategic stockpiling initiative, particularly for high-bandwidth memory components. The company likely acquired substantial HBM inventory between August and December 2024, when restrictions on advanced memory sales to China were announced but not yet implemented. The semiconductor supply chain breach shows that enforcing technology export controls is challenging, and third parties can still purchase silicon for restricted companies. While Huawei continues building AI infrastructure for both internal projects and external customers, manufacturing constraints may limit its ability to scale deployments against competitors with access to more advanced manufacturing processes. Perhaps a future domestic EUV-based silicon manufacturing flow will allow Huawei to gain access to more advanced domestic production, completely circumventing US-imposed restrictions.

When the US imposed sanctions on Chinese semiconductor makers, China began the push for sovereign chipmaking tools. According to a study conducted by the Emerging Technology Observatory (ETO), Chinese institutions have dramatically outpaced their US counterparts in next-generation chipmaking research. Between 2018 and 2023, nearly 475,000 scholarly articles on chip design and fabrication were published worldwide. Chinese research groups contributed 34% of the output—compared to just 15% from the United States and 18% from Europe. The study further emphasizes the quality of China's contributions. Focusing on the top 10% of the most-cited articles, Chinese researchers were responsible for 50% of this high-impact work, while American and European research accounted for only 22% and 17%, respectively.

This trend shows China's lead isn't about numbers only, and suggests that its work is resonating strongly within the global academic community. Key research areas include neuromorphic, optoelectric computing, and, of course, lithography tools. China is operating mainly outside the scope of US export restrictions that have, since 2022, shrunk access to advanced chipmaking equipment—precisely, tools necessary for fabricating chips below the 14 nm process node. Although US sanctions were intended to limit China's access to cutting-edge manufacturing technology, the massive body of Chinese research suggests that these measures might eventually prove less effective, with Chinese institutions continuing to push forward with influential, high-citation studies. However, Chinese theoretical work is yet to be proven in the field, as only a single company currently manufactures 7 nm and 5 nm nodes—SMIC. Chinese semiconductor makers still need more advanced lithography solutions to reach high-volume manufacturing on more advanced nodes like 3 nm and 2 nm to create more powerful domestic chips for AI and HPC.

AMD is launching new Socket AM4 processor SKUs well into 2025, eight years into the platform's lifecycle. The company just launched six new processor models under the Ryzen 5005G series. These span the Ryzen 7, Ryzen 5, and Ryzen 3 tiers, and are all desktop APUs based on the 7 nm "Cezanne" monolithic silicon that combines up to 8 "Zen 3" CPU cores with an iGPU based on the "Vega" graphics architecture, featuring up to 8 compute units (CU). There's nothing [much] to report about the 5005G series, except that they are iGPU speed bumps of existing SKUs. These are not meant to be confused with the 5000GT series, which were CPU speed-bumps of the chips AMD launched in 2024.

Among the six new SKUs, the top-spec part is the Ryzen 7 5705G, which maxes out the silicon, enabling the full 8-core/16-thread "Zen 3" CPU with 512 KB of L2 cache per core and 16 MB of shared L3 cache; and the iGPU with all 8 CUs. This chip comes with CPU clock speeds of 3.80 GHz base with 4.60 GHz boost, with 2.20 GHz max engine clock for the iGPU. The CPU clock speeds are unchanged compared to the Ryzen 7 5700G, but the iGPU gets a 10% increase in max engine clock. The Ryzen 7 5705GE is an energy efficient variant with 3.20 GHz base and 4.60 GHz boost for the CPU to achieve a 35 W TDP, but the iGPU engine clock gets the same 200 MHz speed bump.

On Wednesday (February 19), Apple announced the upcoming launch of its "budget-friendly" iPhone 16e smartphone model. The Cupertino, California-based company has refreshed its entry level product tier—starting at $599—with modernized internals. Apple's new design houses an A18 chipset, as well as their much-discussed debut modem design. The C1 is a custom 5G part; fully developed in-house. Previously, modern iPhone product ranges have been fitted with Qualcomm 5G modems. As expected, Apple contracted with TSMC for the production of A18 and C1 silicon—the A-type SoC is based on a 3 nm process node (TSMC N3E). Their proprietary modem baseband design utilizes 4 mm, while the receiver uses a 7 nm process—according to insiders.

Taiwan's Commercial Times reckons that TSMC will be the "biggest beneficiary" from the aforementioned agreement with Apple. Ctee TW's latest report cites industry analysis; soothsayers estimate annual shipments reaching roughly 22 million units annually. Additional whispers suggest that the C1 modem will turn up in non-iPhone devices—namely next-gen Watches and iPads, by next year. The report also mentions that upcoming Mac products are slated for C1 upgrades. Further leaks have linked project "Ganymede" to a "C2" custom 5G modem design—inside sources believe that a 3 nm TSMC process is on the cards. Another codename—"Prometheus"—was leaked by insiders; possibly referencing a future "C3" model.

The semiconductor industry is expected to start 18 new fab construction projects in 2025, according to SEMI's latest quarterly World Fab Forecast report. The new projects include three 200 mm and fifteen 300 mm facilities, the majority of which are expected to begin operations from 2026 to 2027.

In 2025, the Americas and Japan are the leading regions with four projects each. The China and Europe & Middle East regions are each tied for third place with three planned construction projects. Taiwan has two planned projects, while Korea and Southeast Asia have one project each for 2025.

DeepComputing, a pioneer in RISC-V innovation, today announced a strategic partnership with Andes Technology Corporation, a leading provider of high-efficiency, low-power 32/64-bit RISC-V processor cores. Together, the two companies collaborate to develop the world's first RISC-V AI PC, powered by Andes' 7 nm QiLai SoC. This innovated low-power PC will come equipped with Ubuntu Desktop and aims to redefine AI computing by combining industry-leading hardware and software designed specifically for RISC-V.

The collaboration marks a significant milestone in the evolution of AI PCs, which utilize artificial intelligence to enhance productivity, creativity, entertainment, security, and more. The power-efficient RISC-V AI PC, based on the QiLai SoC, integrates a multi-core CPU, vector processor, GPU, and various peripherals for optimal performance, and AI workload handling. This product is designed to cater to developers and enterprises looking for advanced, open-standard RISC-V solutions.

GPU chip packages of the "Navi 4x" generation of GPUs could be generationally smaller than their predecessors, according to leaked package dimensions of the "Navi 44" chip put out by Olrak29_. With its next-generation Radeon RX gaming GPUs based on the RDNA 4 graphics architecture, AMD has decided to focus on gaining market-share in the performance and mainstream segments, ceding the enthusiast segment to NVIDIA. As part of its effort, the company is making RDNA 4 efficient at every level—architecture, process, and package.

At the architecture level, RDNA 4 is expected to improve performance, particularly the performance cost of ray tracing, through a more specialized ray tracing hardware stack. At the process level, AMD is expected to switch to a more efficient foundry node, with some reports suggesting the TSMC 4 nm, such as the N4P or N4X. For a mid-range GPU like the "Navi 44," which succeeds the "Navi 23" and "Navi 33," these mean a rather big leap from the 7 nm or 6 nm DUV nodes. The leak suggests a smaller package, measuring 29 mm x 29 mm. In comparison, the "Navi 23" package measures 35 mm x 35 mm. The smaller package could make these GPUs friendlier with gaming notebooks, where mainboard PCB real-estate is at a premium.

addlink Technology, a leader in digital storage innovation, proudly announces the launch of its advanced M.2 Gen 5 SSD series, the G55 and G55H. Designed for AI professionals, gamers, and hardware enthusiasts, these SSDs promise to transform your storage experience. Achieve blazing speeds up to 10,300 MB/s with the G55 and G55H Gen 5 x4 SSDs, powered by a low-power TSMC 7 nm process controller. Offering performance 50% faster than Gen 4 and up to 20 times faster than SATA SSDs, these drives are fully optimized for the latest Intel and AMD Gen 5 platforms.

The G55H is equipped with a premium heatsink to ensure consistent peak performance without throttling. Its slim 8.75 mm profile guarantees compatibility with most PCs and the PlayStation 5, providing unparalleled performance without compromise. The G55 features an ultraslim 2.3 mm design with high-density flash memory on one side, using 50% less power than other Gen 5 x4 SSDs. This makes it perfect for professionals who require high performance on the go without overheating or sacrificing battery life.

The grass isn't always greener on the other side, especially as we're running out of sides in the advanced semiconductor manufacturing sector. A recent report by Business Korea highlights Samsung Securities' July publication titled "Geopolitical Paradigm Shift and Industry," which paints a less-than-optimistic picture of Samsung's current state of affairs. The report even evaluates a possible spinoff of Samsung Foundry. The Korean tech giant has faced various business setbacks related to its state-of-the-art 3 nm Gate-All-Around (GAA) FET node. Reports indicate that this node only manages to yield 10-20% of working silicon, making potential customers reluctant to secure partnerships with Samsung. Samsung Securities projects that Samsung Foundry, along with the LSI division, will suffer a 500 billion won (about $385 million) loss this year.

Poor yields and difficulty securing customers have left Samsung facing tough choices, including the possible sale of its massive Foundry unit, which manufactures logic for external customers. It's noteworthy that Samsung is one of only three companies left in the advanced semiconductor manufacturing field, alongside TSMC and Intel. Many companies struggled to deliver results when transitioning to sub-7 nm nodes. Global Foundries dropped out of the race to focus on mature nodes, while Intel faced delays. TSMC has been the only company so far to consistently set and execute its goals, positioning itself as the industry leader. With low yields on the 3 nm GAA FET node, Samsung currently holds 11.5% of the global foundry market share in Q2, while TSMC dominates with 62.3%.