Tuesday, September 24th 2019

AMD Could Release Next Generation EPYC CPUs with Four-Way SMT

AMD has completed design phase of its "Zen 3" architecture and rumors are already appearing about its details. This time, Hardwareluxx has reported that AMD could bake a four-way simultaneous multithreading technology in its Zen 3 core to enable more performance and boost parallel processing power of its data center CPUs. Expected to arrive sometime in 2020, Zen 3 server CPUs, codenamed "MILAN", are expected to bring many architectural improvements and make use of TSMC's 7nm+ Extreme Ultra Violet lithography that brings as much as 20% increase in transistor density.

Perhaps the biggest change we could see is the addition of four-way SMT that should allow a CPU to have four virtual threads per core that will improve parallel processing power and enable data center users to run more virtual machines than ever before. Four-way SMT will theoretically boost performance by dividing micro-ops into four smaller groups so that each thread could execute part of the operation, thus making the execution time much shorter. This being only one application of four-way SMT, we can expect AMD to leverage this feature in a way that is most practical and brings the best performance possible.
AMD isn't the first to implement this kind of solution to its processors. IBM has been making CPUs based on POWER ISA for years now that feature four or even eight-way SMT and they are one of the key reasons why POWER CPUs are so powerful. Nonetheless, we can hope to see more details about Zen 3 core design decisions as we approach 2020 and launch of Milan CPUs. Source: Hardwareluxx
Add your own comment

159 Comments on AMD Could Release Next Generation EPYC CPUs with Four-Way SMT

#51
FordGT90Concept
"I go fast!1!11!1!"
AnarchoPrimitiv, post: 4121807, member: 168101"
There seems to be this shortcut to thinking that so many "gamers" [that claim to be enthusiasts] constantly perform, namely the completely unfounded assumption and belief that "gaming" comprises the majority of use cases for x86 CPUs and that "gaming", and pleasing gamers, is the paramount concern, or should be, of AMD/Intel when that's not the case.
Sony and Microsoft will not be interested in 4-way SMT in future consoles, for example. That's tens of millions of units, potentially into the hundreds of millions.
Posted on Reply
#52
notb
For all the people that know so little about processors:
1) Intel offered 4 threads per core in Xeon Phi.
2) 4-way SMT was also included in processors by IBM, Sun and MIPS.

So despite AMD being called "innovative" by some in this thread, they're actually pretty late with this feature.
Sorry to ruin the AMD hype party.

Moreover, there's not much gain from 4-way SMT in general tasks, so don't expect this to be magically twice as fast. This works best in highly optimized compute clusters.
Posted on Reply
#53
theoneandonlymrk
FordGT90Concept, post: 4121857, member: 60463"
Sony and Microsoft will not be interested in 4-way SMT in future consoles, for example. That's tens of millions of units, potentially into the hundreds of millions.
True but they do buy custom chips based on Ip , they don't necessarily use all of it plus the cache and resources would likely increase for smt4 which would marginally improve smt2 performance if they cut smt 4 functions.
Posted on Reply
#54
Steevo
techguymaxc, post: 4121852, member: 190760"
https://www.pugetsystems.com/labs/hpc/Windows-10-with-Xeon-Phi-733/

If you can run an O.S. on it, it's a general purpose microprocessor, and I think that qualifies it for this discussion.
LOL, people have created "processors" in minecraft. Windows 10 has RISC versions for awhile.

https://www.theregister.co.uk/2018/06/18/microsoft_e2_edge_windows_10/

Does it mean its a good idea? No. So how about semantics of three layer deep "we could, but should we?" is left alone and we focus on what going to improve performance.
Posted on Reply
#55
R0H1T
notb, post: 4121859, member: 165619"
So despite AMD being called "innovative" by some in this thread, they're actually pretty late with this feature.
Sorry to ruin the AMD hype party.
Yeah well sorry to burst your bubble but Phi was a huge failure in the end, so bad that Intel couldn't pay others to take the remaining chips off of them.
Posted on Reply
#56
techguymaxc
Steevo, post: 4121861, member: 19251"
LOL, people have created "processors" in minecraft. Windows 10 has RISC versions for awhile.

https://www.theregister.co.uk/2018/06/18/microsoft_e2_edge_windows_10/

Does it mean its a good idea? No. So how about semantics of three layer deep "we could, but should we?" is left alone and we focus on what going to improve performance.
The proposition was raised that Intel had not yet created a processor with 4-way SMT. They have. /end discussion
Posted on Reply
#57
R0H1T
It wasn't a processor, it was a co-processor specifically designed for HPC :rolleyes:
Posted on Reply
#58
notb
R0H1T, post: 4121862, member: 131092"
Yeah well sorry to burst your bubble but Phi was a huge failure in the end, so bad that Intel couldn't pay others to take the remaining chips off of them.
People here said this is something Intel can't do. It's not true. End of story.

And Phi wasn't a failure because of its SMT implementation.
Posted on Reply
#59
Steevo
techguymaxc, post: 4121865, member: 190760"
The proposition was raised that Intel had not yet created a processor with 4-way SMT. They have. /end discussion
HAHAHAHA, /end discussion

Nah brah. I never said Intel didn't have it, if I did, good job on proving they had it on a niche product that doesn't matter, I was discussing how it might affect the performance of the core. Intel has it, but it sucked, IBM has it, and it works. AMD is going to try it, and its probably better left in server space.

You replied to my comment about the difference in CISC and RISC designs with a statement that Phi ran Windows 10, poorly, I can make things that work good work poorly as well, but in the name of time and sanity I choose not to. But /end discussion..... thats awesome. Go you.... far away.
Posted on Reply
#60
thesmokingman
FordGT90Concept, post: 4121760, member: 60463"
I highly doubt AMD is going to divorce the core design between Epyc and Ryzen. If they are, it's fine; if not, AMD is pulling another Bulldozer with this one.
Yea, totally because AMD don't know what they are doing am I right?
Posted on Reply
#61
techguymaxc
R0H1T, post: 4121871, member: 131092"
It wasn't a processor, it was a co-processor specifically designed for HPC :rolleyes:
And you can run an Operating System on it. It's based on Pentium micro-architecture, and it runs general purpose x86 code natively.

How much more does this duck need to quack?
Posted on Reply
#62
R0H1T
I'm not sure, does running windows on x86 now counts as a special achievement?
Posted on Reply
#63
techguymaxc
Steevo, post: 4121876, member: 19251"
HAHAHAHA, /end discussion

Nah brah. I never said Intel didn't have it, if I did, good job on proving they had it on a niche product that doesn't matter, I was discussing how it might affect the performance of the core. Intel has it, but it sucked, IBM has it, and it works. AMD is going to try it, and its probably better left in server space.

You replied to my comment about the difference in CISC and RISC designs with a statement that Phi ran Windows 10, poorly, I can make things that work good work poorly as well, but in the name of time and sanity I choose not to. But /end discussion..... thats awesome. Go you.... far away.
Sorry for quoting your entire post.

Given the fact that I did not mention CISC or RISC in my response, it's pretty obvious I wasn't commenting on that portion of your post.
Posted on Reply
#64
notb
R0H1T, post: 4121871, member: 131092"
It wasn't a processor, it was a co-processor specifically designed for HPC :rolleyes:
A co-processor is still a processor. It's just put in a different place in a server, so it gets a fancy name.

Phi is x86 compliant. People have successfully run OSes on it (even Windows).
Xeon Scalable is an evolution of Phi, so it shouldn't be hard for Intel to include 4-way SMT.
Posted on Reply
#65
techguymaxc
R0H1T, post: 4121881, member: 131092"
I'm not sure, does running windows on x86 now counts as a special achievement?
How much more context do we need to clarify this matter? Are we reading different threads or something?

Aldain said this:
Aldain, post: 4121702, member: 170164"
Are you F stupid?? When did intel implement 4 way smt??
I responded with information about Intel microprocessors which feature 4-way SMT.

Any commentary on the economic or technical success of products derived from this micro-architecture have no bearing on the fact that it exists.
Posted on Reply
#66
ShrimpBrime
Lol. 320w cpu @ 1.1-1.3ghz .... designed for cloud computing. (had to research it)

Umm, I'll take the AMD SMT (any) desktop processor at 105w @ 3.8ghz instead lol.
Posted on Reply
#67
Steevo
techguymaxc, post: 4121879, member: 190760"
And you can run an Operating System on it. It's based on Pentium micro-architecture, and it runs general purpose x86 code natively.

How much more does this duck need to quack?
I need it to quack 4 quacks simultaneously per core while running Crysis at 4K. Can it do that? Can I surf the web while using a USB to serial adapter to download software to a device, while listening to music, while using a USB to CAN protocol adapter to configure or load firmware to other nodes and fit in my laptop bag?
Posted on Reply
#68
theoneandonlymrk
cucker tarlson, post: 4121757, member: 173472"
epyc is not for gaming.
will likely never be introduced to gaming pc.
there's a way to fit 4 8 core cxx's onto a die.why go with 4 way smt ? that's only beneficial when you're maxing out cores on the die.
That's nonesense, the server blades to run cloud xbox and ps5 games, are going to be made using epyc a special one too? :) edited for clarity :)
Posted on Reply
#69
R0H1T
notb, post: 4121883, member: 165619"
A co-processor is still a processor. It's just put in a different place in a server, so it gets a fancy name.

Phi is x86 compliant. People have successfully run OSes on it (even Windows).
Yes & what was your point exactly, that 4 way SMT for AMD is not a major achievement ~ sure, I guess this why highlighting a product which was supposed to compete in HPC, but failed spectacularly is something noteworthy then?
techguymaxc, post: 4121884, member: 190760"
How much more context do we need to clarify this matter? Are we reading different threads or something?
Your point is noted, now remind us why running an OS on it is probably listed as an achievement(?) when it failed at its primary task?
Posted on Reply
#70
techguymaxc
Steevo, post: 4121886, member: 19251"
I need it to quack 4 quacks simultaneously per core while running Crysis at 4K. Can it do that? Can I surf the web while using a USB to serial adapter to download software to a device, while listening to music, while using a USB to CAN protocol adapter to configure or load firmware to other nodes and fit in my laptop bag?
If it can't run Crysis is it not a CPU in your opinion?

Guess the 90% of CPUs throughout history that don't utilize the x86 ISA aren't CPUs in your book.

Must be hard being that myopic. What's your prescription?

R0H1T, post: 4121889, member: 131092"
Yes & what was your point exactly, that 4 way SMT for AMD is not a major achievement ~ sure, I guess this why highlighting a product which was supposed to compete in HPC, but failed spectacularly is something noteworthy then?
This isn't anywhere near as difficult as you're making this. Aldain said "Intel never made a CPU with 4-way SMT", I provided the proof that they have. I made no commentary on its success or viability as a commercial product.
Posted on Reply
#71
cucker tarlson
theoneandonlymrk, post: 4121888, member: 82332"
That's nonesense, the blades to run cloud xbox and ps5 games are going to be made using epyc a special one too? :)
please say that again in English.
Posted on Reply
#72
theoneandonlymrk
voltage, post: 4121695, member: 173691"
So, they are now just doing what INTEL has been doing all along, except for the die shrinkage issue. More density is what INTEL has had Over AMD up until now.

NOTHING Innovative about that, at all. AND Amd is about to even start using the +++ HA HA!

AMD, just like apple, nothing new, just copy other peoples ideas and claim as if they thought of it themselves.
this is the post that started the Amd are copying intel with smt sentiment, already proven as baseless, regardless intel have not YET made smt4 earn them good repeatable money yet.
Posted on Reply
#73
thesmokingman
techguymaxc, post: 4121884, member: 190760"
Any commentary on the economic or technical success of products derived from this micro-architecture have no bearing on the fact that it exists.
Neener neener?

Turds are turds, even if yer first with a turd?
Posted on Reply
#74
ShrimpBrime
theoneandonlymrk, post: 4121898, member: 82332"
this is the post that started the Amd are copying intel with smt sentiment, already proven as baseless, regardless intel have not YET made smt4 earn them good repeatable money yet.
AMD SMT and Intel HT are not the same, they are and aren't. It's like a redhead vs a blonde.
Posted on Reply
#75
theoneandonlymrk
cucker tarlson, post: 4121897, member: 173472"
Please say that again in English.
if your going to be a gramma tart , get your shit right .

IF your a gramma tart ,you should well know all sentences start with a capital, im not.
Posted on Reply
Add your own comment