Thursday, January 12th 2023

SK hynix Obtains Industry's First Validation for 1anm DDR5 DRAM on the 4th Gen Intel Xeon Scalable Processor

SK hynix Inc. (or "the company", www.skhynix.com) announced today that its DDR5 product for servers using 1anm, the fourth generation of the 10 nm process technology, has been validated on the 4th Gen Intel Xeon Scalable processor (formerly codenamed Sapphire Rapids) for the first time in the industry. "The validation of the 1anm DDR5 compatibility by Intel for its newest processor that supports DDR5 for the first time is monumental," SK hynix said. "We will seek a fast turnaround in the semiconductor memory industry by actively responding to the growing server market through DDR5, which is already in mass production."

The validation of the company's 1anm DDR5 product, which adopts 1anm technology using the EUV lithography process, is for 4th Gen Intel Xeon Scalable processors, Intel's latest server CPU launched on January 10th. The 4th Gen Intel Xeon Scalable processor has been cited as a key to a turnaround in the industry, given that the launch of a next-generation server CPU requires server replacement and thus, results in a rapid increase in demand for high-performance memory chips. Experts predict that DDR5, expected to meet customers' such needs, will soon become the flagship product in the server DRAM market.
SK hynix's DDR5 delivers an outstanding performance per watt and carbon emissions reduction effect to server customers as it reduces power consumption by up to 20% compared to DDR4, while boosting performance by 70% or more.

SK hynix also announced that its 1ynm DDR5, the second generation of the 10 nm process technology, has also successfully completed the validation of memory compatibility with Intel. SK hynix expects provision of various DDR5 products including 16Gb and 24Gb storage capacities to boost sales of server DRAM.

"The company is in close cooperation with a number of customers for wider adoption of DDR5 following the launch of the 4th Gen Intel Xeon Scalable processor and will strengthen its leadership in the ever-growing server market," said Sungsoo Ryu, Head of DRAM Product Planning at SK hynix.

"Intel has been working diligently with SK hynix, JEDEC and the industry to bring DDR5 to life from initial inception to the scalable, reliable memory subsystem at the heart of our latest processor technology," said Dr. Dimitrios Ziakas, Vice President of Memory and I/O Technologies at Intel. "The 4th Gen Intel Xeon Scalable processor takes advantage of DDR5 enhanced memory features to deliver the bandwidth, performance and scaling capacity needed by our data center customers across a vast array of workloads and applications."

Meanwhile, SK hynix, in collaboration with Intel, published a DDR5 white paper, which includes the features of DDR5 and the superior performance of the company's 1anm DDR5. The company expects the white paper to be used as a reference for server customers who plan to adopt SK hynix's DDR5 in the future.
Source: SK hynix
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3 Comments on SK hynix Obtains Industry's First Validation for 1anm DDR5 DRAM on the 4th Gen Intel Xeon Scalable Processor

#1
AnarchoPrimitiv
Is anyone familiar with memory fabrication? If it's a 10nm process, why is it called 1anm? Is that just a micron name?
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#2
TheLostSwede
News Editor
AnarchoPrimitivIs anyone familiar with memory fabrication? If it's a 10nm process, why is it called 1anm? Is that just a micron name?
I believe all of the memory manufacturers uses some kind of digit letter acronymn for their memory process below 20 nm.
It makes it harder to know exactly what node they use and they can progress with multiple sub 20 nm nodes to keep investors happy, as they can shrink by 1 nm per year or so...
I believe Micron with with 1x, 1y and 1z and has started with Greek letters now.

Posted on Reply
#3
Wirko
AnarchoPrimitivIs anyone familiar with memory fabrication? If it's a 10nm process, why is it called 1anm? Is that just a micron name?
DRAM nanometres are actually less deceptive than logic nanometres.

Recently I did some calculations from (scarce) data available about recent nodes. DRAM is roughly 12x as dense as SRAM in bits/mm2, or 2x as dense in transistors/mm2. Can't remember exactly which nodes I took but it doesn't matter much, SRAM has shrunk very little from 7 to 3 nm.

Logic transistors are still shrinking significantly of course (and they are still larger than those in SRAM memory).
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