Monday, December 15th 2025

AMD and Samsung Said to Discuss 2 nm Foundry Deal for Future EPYC CPUs

According to a report from Sedaily, cited by TrendForce, Samsung Electronics' Device Solutions (DS) Division is in discussions with AMD over manufacturing its chips on Samsung Foundry's second-generation 2 nm process known as SF2P. Samsung's 2 nm technology is competing directly with TSMC's N2 and Intel's 18A, both using the Gate-All-Around (GAA) transistor architectures. Industry sources say a decision on moving forward with a formal agreement could come as early as January next year, with actual production being more a matter of "when" rather than "if". As part of the talks, Samsung is expected to run AMD designs through a multi-project wafer (MPW) program in the near term. This would allow both companies to evaluate SF2P's performance and yields before committing to volume manufacturing. The chip involved is believed to be AMD's next-generation EPYC "Venice" server CPU, according to Global Economic News. If the MPW results meet AMD's expectations, sources say it could open the door for AMD to adopt a dual-foundry strategy, pairing Samsung with TSMC. Such a move would not be limited to server products, and could eventually extend to future consumer CPUs, including the "Olympic Ridge" Ryzen lineup.

Separately, the report highlights the AI-focused partnership between Samsung and AMD. Despite Samsung's challenges in entering NVIDIA's HBM supply chain, it has secured a strong position with AMD. Samsung is already supplying HBM3E 12-layer memory for AMD's MI350 accelerators and is considered well positioned for HBM4, which is expected to debut alongside AMD next-generation MI450 products. From Samsung's perspective, adding AMD as a foundry customer would further support its recent recovery. Sedaily notes that Samsung Foundry has picked up momentum after winning orders from major clients such as Tesla and Apple. At the same time, industry sources point to TSMC capacity constraints and rising wafer prices, those factors making Samsung an alternative.
Sources: TrendForce, Sedaily, Global Economic News, Edaily
Add your own comment

18 Comments on AMD and Samsung Said to Discuss 2 nm Foundry Deal for Future EPYC CPUs

#1
Philaphlous
We're getting into really interesting times... node shrinks are now going to be on the *.1nm level so going from 2nm to 1.9nm is likely going to be seen as innovation... Looks like 1.4nm isn't too far off? Maybe consumer level by 2030?
Posted on Reply
#2
Guwapo77
Saving a few dollars vs using battle tested TSMC never turns out well. "This would allow both companies to evaluate SF2P's performance and yields before committing to volume manufacturing. ", I wish them luck...
PhilaphlousWe're getting into really interesting times... node shrinks are now going to be on the *.1nm level so going from 2nm to 1.9nm is likely going to be seen as innovation... Looks like 1.4nm isn't too far off? Maybe consumer level by 2030?
We need a major breakthrough, I mean, we can't get much smaller with this current tech.
Posted on Reply
#3
Fishymachine
Guwapo77Saving a few dollars vs using battle tested TSMC never turns out well. "This would allow both companies to evaluate SF2P's performance and yields before committing to volume manufacturing. ", I wish them luck...


We need a major breakthrough, I mean, we can't get much smaller with this current tech.
I know IBM made an experimental 600MTr/mm2 chip a few years back... labelled as 3 nm, So we could get "2A/0.2nm" mass production processes that deliver about 1 billion. For reference, TSMC and Rapidus sit at about 300 theoretical, and about 240 for real chip measurement
Posted on Reply
#4
AnotherReader
PhilaphlousWe're getting into really interesting times... node shrinks are now going to be on the *.1nm level so going from 2nm to 1.9nm is likely going to be seen as innovation... Looks like 1.4nm isn't too far off? Maybe consumer level by 2030?
The node names have little to do with the actual feature sizes.

Posted on Reply
#5
Visible Noise
Guwapo77Saving a few dollars vs using battle tested TSMC never turns out well.
You’re assuming AMD has 2nm capacity reserved for CPUs at TSMC. Much larger pockets are chasing that capacity.

Would you allocate silicon to Epyc or Instinct in 2027-2030?
Posted on Reply
#6
DaemonForce
Both. Both is good. Maybe a 20/80 split on Epyc and dual Instinct products.
Just saying if I were steering the ship I would be way more cutthroat about it.
There's a long list of high $$$$$ Epyc customers and consumers in $$$ entry.
Instinct is the real money maker but Epyc is the doorway into them.
Everybody else is picking up old stuff in 2nd market.
Posted on Reply
#9
londiste
Guwapo77Saving a few dollars vs using battle tested TSMC never turns out well. "This would allow both companies to evaluate SF2P's performance and yields before committing to volume manufacturing. ", I wish them luck...
Nvidia with Ampere? That was pretty clearly motivated by both lower price and available volume.
It is definitely also a negotiating tactic to try and get better terms from TSMC.
Posted on Reply
#10
Guwapo77
londisteNvidia with Ampere? That was pretty clearly motivated by both lower price and available volume.
It is definitely also a negotiating tactic to try and get better terms from TSMC.
Maybe you forgot, this is right out of AI's answer.

Nvidia wasn't pleased with Samsung during the Ampere (RTX 30-series) era primarily because Samsung's 8nm process had lower yields and performance compared to TSMC's nodes, leading to supply disruptions and higher costs for Nvidia, who was trying to diversify from TSMC but ended up struggling with Samsung's manufacturing, fueling doubts about Samsung's foundry capabilities for high-performance chips. While Nvidia initially partnered with Samsung for cost benefits, they faced issues like low chip yields, forcing them back to TSMC for later Ampere refreshes, and even into recent HBM (High Bandwidth Memory) challenges with Samsung, showing a persistent gap in cutting-edge process tech, reports Reuters.

This is when AMD was its closest in performance in YEARs! - the 6800XT, 6900XT, and 6950XT were almost tied with Nvidia during that time.
Posted on Reply
#11
Prima.Vera
PhilaphlousWe're getting into really interesting times... node shrinks are now going to be on the *.1nm level so going from 2nm to 1.9nm is likely going to be seen as innovation... Looks like 1.4nm isn't too far off? Maybe consumer level by 2030?
Those values are just marketing inventions. The "2nm" label is marketing, not actual size; a "2nm" node transistor's physical gate length is much larger, around 12nm, with a gate pitch (distance between gates) of about 45nm, and metal pitch of 20nm, etc.
Posted on Reply
#12
Visible Noise
Guwapo77this is right out of AI's answer.
Did that AI give you the answer to my question?
Posted on Reply
#13
londiste
Guwapo77Maybe you forgot, this is right out of AI's answer.

Nvidia wasn't pleased with Samsung during the Ampere (RTX 30-series) era primarily because Samsung's 8nm process had lower yields and performance compared to TSMC's nodes, leading to supply disruptions and higher costs for Nvidia, who was trying to diversify from TSMC but ended up struggling with Samsung's manufacturing, fueling doubts about Samsung's foundry capabilities for high-performance chips. While Nvidia initially partnered with Samsung for cost benefits, they faced issues like low chip yields, forcing them back to TSMC for later Ampere refreshes, and even into recent HBM (High Bandwidth Memory) challenges with Samsung, showing a persistent gap in cutting-edge process tech, reports Reuters.

This is when AMD was its closest in performance in YEARs! - the 6800XT, 6900XT, and 6950XT were almost tied with Nvidia during that time.
Do I understand correctly that this is an AI answer? Sounds about right.

Nvidia did not go back to TSMC for Ampere refreshes. All Amperes were on Samsung's 8LPP. Nvidia did go back to TSMC for Ada but that is not the same decision and not the same nodes either. Ada was on some N4 variant.

Nvidia had a choice for Ampere between TSMC's N7 and Samsung's 8LPP with N7 being considerably more expensive at the time and it was suspected with worse yields. They went for Samsung seemingly for cost reasons but pretty sure showing TSMC that they can is also a part of it. Samsung's 8LPP is a 10nm class node, so a node or a half-node worse than N7.

I have not really seen any real mention of result being lower yields. The bigger chips were rumored to initially have problems but same was true for Navi 21 that was on N7. 8LPP had lower density vs N7 somewhere in neighborhood of 15-20% but that was at least initially evened out by N7 being a newer and more unproven node with these die sizes. Performance part is true enough but not necessarily directly performance but more of an efficiency problem. The last part of your post - closest in performance in years? Nvidia did that on a notably worse manufacturing process. AMD really caught up only with RDNA3/RDNA4.
Posted on Reply
#14
Visible Noise
londisteDo I understand correctly that this is an AI answer?
Calls into question all of their posts, if they are willing to copy paste AI generated slop as if it’s true and correct information.

Maybe an AI told them AMD has purchased 2nm cpu wafers from TSMC.
Posted on Reply
#17
Guwapo77
Visible NoiseThat’s an authoritative source, for sure :shadedshu:
...whatever broski. Merry Christmas.
Posted on Reply
#18
Visible Noise
Guwapo77...whatever broski. Merry Christmas.
I’m not your bro.

Merry Christmas to you also!
Posted on Reply
Add your own comment
Nov 14th, 2026 04:47 CST change timezone

New Forum Posts

Popular Reviews

TPU on YouTube

Controversial News Posts