Intel's Xeon 7 "Diamond Rapids" seems to have made its first public appearance as actual silicon. Intel had two packages on display at the Tencent Global Digital Ecosystem Conference in Shenzhen on October 29, one showing the heat spreader and the other flipped to show the contact side, though photos of them are only now making the rounds. These chips are meant for the massive LGA 9324 socket on Intel's Oak Stream platform, and the bottom side shows a huge pad area to match.

The specs themselves aren't new, since Intel detailed the package design at HOT CHIPS back in August. The flagship packs up to 256 Panther Cove P-cores without SMT, spread across 16 compute chiplets built on Intel 18A-P, along with 1.28 GB of last-level cache. It also gets 16 memory channels with MRDIMM support up to 12,800 MT/s and 128 PCIe Gen 6 lanes. At the event, Intel pitched Diamond Rapids as a CPU designed for agentic AI infrastructure and reportedly announced joint development with Tencent Cloud for its CVM instances. The new Tencent Cloud instances launched at the same event, however, run on Xeon 6+ "Clearwater Forest" chips.

Intel is moving some manufacturing capacity away from consumer chips to keep up with demand for its Xeon server processors. During its Q3 2026 earnings call, the company said it will convert some Intel 18A resources at its Oregon facilities to Intel 3, the node behind Xeon 6 "Granite Rapids." According to CFO Dave Zinsner, those 18A wafers "are generally going to build Panther Lake products." Zinsner also indicated that weaker PC demand gives Intel room to make the switch, as the company expects the PC slowdown to last at least through the first half of next year. CEO Lip-Bu Tan said the added Intel 3 capacity should be in production in the second half of 2027.

Intel CEO Lip-Bu TanThe industry continues to navigate one of the most significant supply shortages in the history, driven by the unprecedented demand for Super Intelligence. Against this backdrop, I am pleased by the progress we made growing our server supply in Q3. I'm mindful about the ongoing challenges we face in the future quarters to keep pace with the server demand.

Intel's global foundry operations are crucial to the company's revenue generation, and impacting any part of the supply chain directly harms the business. When explosions occurred at Fab 28 in Kiryat Gat, Israel, Intel's operations there briefly halted 10 nm node production for two weeks. During this time, the assessment of both equipment and production output is estimated to result in about $300 million of lost revenue in the upcoming Q4 2026, as well as another $300 million in Q1 2027. Just two weeks of downtime has destroyed a massive amount of 10 nm wafers that Fab 28 has been manufacturing.

Intel CFO David ZinsnerWe have been shut down for about two weeks. We feel like we are going to be starting up production here by the end of this week. While we are doing that, we are trying to assess all the wafers that are in the line and what is usable and what is not usable from those materials. This is somewhat of an early assessment, both really of 4Q and of 1Q. But I think the current thinking is that we will have about a $300 million impact to the fourth quarter. That is likely to be similar in the first quarter.

ASUS is expanding its AI infrastructure portfolio with the launch of the XA P2N-E2, a 2U NVIDIA MGX architecture-based server powered by NVIDIA Vera CPUs and designed for agentic AI and reinforcement learning workloads. Unveiled at OCP Global Summit 2026, this new ASUS server powered by the Vera CPU targets the execution layer of AI applications, handling workloads such as code execution, tool use, sandboxing, data processing and orchestration that extend beyond the AI model itself. The XA P2N-E2 supports up to two dual-slot NVIDIA RTX PRO 6000 Blackwell Server Edition GPUs, combining high-performance CPU computing with flexible GPU acceleration in a compact 2U platform. The high single-thread CPU performance and high-bandwidth, energy-efficient memory are designed to keep AI agents responsive during demanding execution and evaluation tasks.

At OCP, ASUS also showcases a broader portfolio covering rack-scale AI systems, accelerated computing, high-speed networking, context memory, low-latency inference and high-density storage. At the rack level, XA VR721-E3, the ASUS AI POD integrates 36 NVIDIA Vera CPUs and 72 NVIDIA Rubin GPUs through the NVIDIA Vera Rubin NVL72 platform, using a fully liquid-cooled architecture for large-scale AI training, post-training and inference. For a more flexible server configuration, the XR R1I12B-M1BHFS combines NVIDIA HGX Rubin NVL8 with direct-to-chip liquid cooling for the GPU baseboard and air cooling for Intel Xeon 6 processors. Together, the systems reflect the ASUS approach to scaling AI infrastructure across different compute densities, cooling architectures and deployment requirements, from individual servers to large-scale AI environments.

INNO3D announces the AGS-4UMGX-R1 NVIDIA MGX 4U GPU Server, a high-performance platform built for AI training, AI inference, large language models (LLMs), digital twins, and high-performance computing (HPC) workloads.

Powered by dual Intel Xeon 6 processors and supporting up to 32 DDR5 RDIMMs, the AGS-4UMGX-R1 delivers the scalability required for modern AI deployments. The system supports up to eight NVIDIA RTX PRO 6000 Blackwell Server Edition GPUs and features the NVIDIA ConnectX -8 SuperNIC with eight 400 Gbps QSFP ports for ultra-fast AI networking.

In recent years, Intel has shifted away from traditional multithreading in its CPU core designs. This change began with the 12th-Gen Core CPUs when Intel started moving away from Hyper-Threading. At the same time, the company transitioned to asymmetrical CPU designs, initially enabling SMT only on performance cores. On the consumer side, Intel completely abandoned Hyper-Threading with the Core Ultra 200 series but still maintains it in the P-Core Xeon 6 "Granite Rapids" CPU family, which features up to 128 P-Cores and 256 threads. Meanwhile, the "Clearwater Forest" E-Core Xeon 6 has 288 E-Cores without Hyper-Threading, and Intel's upcoming Xeon 7 "Diamond Rapids" P-Core SKUs will have 192 cores and 192 threads, meaning no Hyper-Threading. Intel plans to address this by reintroducing Hyper-Threading the following year with the Xeon 8 "Coral Rapids."

Intel CEO Lip-Bu TanWe have Clearwater Forest, Diamond Rapids, and also Coral Rapids with the SMT involved. I think we continue working on improving the competitiveness against our competitor. I think clearly it's very important to drive the improvement in the single thread and also multithreading. Multithreading will be coming in the Coral Rapids.

Intel announced that Xeon 6+ "Clearwater Forest" and Xeon 6 "Granite Rapids" processors now natively support DDR5-8000 RDIMMs. The company has been releasing microcode updates to server OEMs and server motherboard manufacturers to combine with UEFI firmware updates that add support for DDR5-8000 speed within product warranty, making it easy for end-users to pair the platforms with 8000 MT/s RDIMMs that the processors will natively support.

DDR5-8000 offers a 25% bandwidth increase over DDR5-6400, which has been the industry standard for DDR5-based processors for the past two years, before which the standard had been DDR5-4800. Xeon 6+ "Clearwater Forest" and "Granite Rapids" processors feature 12-channel DDR5 memory interfaces, and so do the latest AMD EPYC "Turin" processors. "Turin" supports DDR5-6400 RDIMMs natively, and so the introduction of native support for DDR5-8000 is expected to give Intel the upper hand in memory bandwidth, which is especially crucial for high-core count processors.

Intel today announced a €5 billion ($5.7 billion) capital investment at its Leixlip campus in Ireland, marking the next phase in the site's capacity expansion. Global demand for AI and high-performance computing is driving the need for advanced silicon to power AI Factories, and Intel is scaling capacity in Ireland to deliver Intel Xeon 6 and next gen Intel Xeon built on its Intel 3 node. This strategic investment expands current production output, advances research and development activities and utilises capacity across existing cleanroom space, strengthening Europe's semiconductor supply chain and serving industry need.

The expansion involves upgrading existing fabrication facilities and the installation of leading-edge manufacturing equipment. Key infrastructure enhancements include the expansion of the automated track system to integrate disparate campus modules into a singular, high-velocity production environment.

G.Skill in its Computex 2026 booth shows us an astounding memory setup for workstations—512 GB of OCTA-Channel DDR5-10000 ECC RDIMM. The setup uses eight 64 GB G.Skill DDR5-10000 RDIMMs, an Intel Xeon 658X "Granite Rapids" 24-core/48-thread processor, and an ASUS Pro WS W890E-SAGE SE motherboard. The setup was tested, providing 602.34 GB/s of memory reads, 487.45 GB/s memory writes, 537.33 GB/s memory copy, and a latency of 86 ns. The company also showed off an identical machine, but with 768 GB (96 GB ×8) DDR5-8800 RDIMM, both testaments to the excellent memory clock capabilities of Intel Xeons.

For AMD Ryzen Threadripper crowd, G.Skill showcased a 512 GB (64 GB ×8) setup with DDR5-7200 RDIMMs on an ASRock WRX80 WS EVO motherboard, with an AMD Ryzen Threadripper PRO 9985WX 64-core/128-thread processor. The memory has reasonably good timings of CL46-56-56-115. Perhaps the most interesting exhibit is where G.Skill paired a consumer Intel Core Ultra 7 270K Plus processor with an ASUS Pro WS W880-ACE SE motherboard, and maxed out its memory capability, giving it 256 GB (64 GB ×4) of DDR5-6400 ECC CUDIMM memory. ECC is functional on the 270K Plus, but it must be paired with the W880 platform to support it.

Intel today announced a series of data center advancements, including new Intel Xeon 6+ processors, an expanded 800 Series Ethernet portfolio featuring the Intel Ethernet E835 controllers and network adapters, and continued progress on its AI accelerator roadmap, including updates on Crescent Island. Together, these developments highlight a clear industry shift: as AI becomes more agentic, the CPU is re-emerging at the center of modern AI infrastructure. With Xeon serving as the control plane, Intel is taking a systems-level approach to performance and efficiency at scale—delivering platforms designed for increasingly agentic AI workloads, where orchestration, data movement, and sustained inference are critical across data center and network environments.

"AI doesn't scale as a collection of parts—it scales as a coordinated system," said Kevork Kechichan, executive vice president and general manager of Intel Data Center Group. "As AI becomes more agentic, the constraints shift to orchestration, concurrency, and data movement. That shift reinforces a core reality: the CPU remains the control plane for the modern AI infrastructure. With Xeon 6+ and Ethernet E835, we're tightly coupling compute and networking to reduce bottlenecks and enable efficient, secure scaling of real-world agentic workflows."

Phoronix conducted an exclusive round of testing with NVIDIA's latest "Vera" CPU, showcasing early benchmarks that highlight NVIDIA's advancements in custom CPU design. The initial results indicate that this Arm-based CPU platform is powerful enough to outperform the latest Intel Xeon and AMD EPYC models in the data center sector. The "Vera" CPU is equipped with 88 custom Armv9.2 "Olympus" cores, featuring 176 threads through physical resource partitioning. These custom cores support native FP8 processing, allowing certain AI workloads to be executed directly on the CPU with a 6x128-bit SVE2 implementation. The chip offers 1.2 TB/s of memory bandwidth and supports up to 1.5 TB of LPDDR5X memory in the SOCAMM2 format. A second-generation Scalable Coherency Fabric provides 3.4 TB/s of bisection bandwidth, connecting the cores across a unified monolithic die and eliminating the latency issues common in chiplet architectures.

For comparison, Phoronix tested single and dual Intel Xeon "Granite Rapids" 6980P CPUs, as well as AMD EPYC "Turin" and "Turin Dense" models like the AMD EPYC 9755, 9575F, and 9475F. They also included NVIDIA's first-generation "Grace" design based on Arm Neoverse V2 cores. NVIDIA allowed only a specific subset of tests on this pre-release chip, including standard workloads like code compilation, stream memory performance, video encoding, Python/Java, and database performance. In the geometric mean of all test results, NVIDIA's "Vera" topped the chart, performing nearly 11% better than AMD's most advanced designs and about 55.3% better than the best single-socket Intel Xeon. It also outperformed dual-socket configurations, suggesting that some workloads have scaling issues across multiple sockets. These limited results place "Vera" above any Arm-based design, with a 450 W TDP for the CPU and 50 W for the 768 GB memory pool.

Promise Technology, a global innovator in enterprise storage solutions, announced it will showcase its latest AI-optimized storage portfolio at COMPUTEX 2026, highlighting a strategic focus on performance, storage expansion, and energy efficiency. Taking place June 2-5 at the Taipei Nangang Exhibition Center, COMPUTEX 2026 is one of the world's premier technology exhibitions. Promise will host live demonstrations at Booth R0708 in Hall 2 (TaiNEX 2).

Promise's latest solutions are engineered for enterprise, AI datacenters, surveillance, and media & entertainment environments. The company will demonstrate how intelligent storage architectures can address key AI infrastructure challenges—particularly power constraints and capacity expansion—while sustaining the high performance required for next-generation workloads.

As artificial intelligence (AI) and data-intensive applications continue to drive demand for real-time processing and low-latency computing, high-performance computing (HPC) is rapidly expanding beyond traditional data centers to the edge. Addressing this growing trend, Avalue Technology has launched the HPS-GNRU1A 1U high-density server system and the HPM-GNRUP industrial server board, combining the latest Intel Xeon 6 platform, PCIe Gen 5 architecture, and high-density NVMe storage to deliver flexible and high-performance solutions for emerging Edge HPC applications.

Unlike conventional HPC platforms primarily designed for centralized data centers, Avalue's latest Edge HPC portfolio is optimized for on-site computing environments. In smart manufacturing, AOI inspection systems require real-time image processing to improve production yield and process stability. In healthcare, image-guided therapy depends on precise and low-latency image analysis, while smart city applications such as airport security screening demand rapid processing of high-frequency imaging data. In life sciences, next-generation sequencing (NGS) workloads also require intensive computing performance for large-scale data analysis. These applications share common challenges, including massive data throughput, real-time processing requirements, and deployment in space-constrained environments, making Edge HPC a critical market focus.

HPE (NYSE: HPE) today announced the availability of HPE Compute Scale-up Server 3250, a purpose-built server for in-memory databases, engineered to deliver scalability, resilience, performance, and security for critical business transactional and analytics workloads. Powered by Intel Xeon 6 processors, HPE Compute Scale-up Server 3250 delivers the highest memory available as the first scale-up server validated by the SAP BW Edition HANA benchmark with at least 48 terabytes (TB) of memory.

"HPE Compute Scale-up Server 3250 raises the bar for business-critical infrastructure," said Krista Satterthwaite, senior vice president and general manager, Compute at HPE. "Designed for complex business applications like enterprise resource planning and customer relationship management systems, this system helps customers in ways competitive offerings cannot - allowing them to run faster transactions, gain insights in real time, and support analytics without slowing down business. With simpler operations, always-on reliability, and chip-to-cloud security - we're redefining what scale looks like for workloads with zero-tolerance downtime."

We have been reporting on the intense demand in the CPU sector currently sweeping the industry. AMD and Intel have sold out their inventories, and lead times are now weeks long. However, Intel, which manufactures a large part of its CPU portfolio, has been handling the situation differently. According to Intel and confirmed by industry analyst Ben Bajarin, the company is repurposing some of the dies found on the very edge of the silicon wafer, which would have otherwise become silicon scrap, into products that customers are eager to buy. This approach allows even some SKUs, which may have been flawed due to various effects like silicon node yield, to find new life through repurposing. Intel's customers are so eager for CPUs that higher-end parts, which would typically be discarded, are now being sold as independent SKUs. No silicon is left behind.

For example, when Intel produces a Xeon 6 "Granite Rapids" CPU on the Intel 3 node, the CPU compute die can accommodate up to 44 cores per die, but some are disabled for yield and power reasons. When the yield fails, these compute dies are repurposed into SKUs with lower core counts, as it costs Intel money to manufacture the die, and wasting it would be a significant loss of resources. However, when the die doesn't achieve satisfactory yield on the Intel 3 production line, the company would usually discard it if it can't extract a reasonable number of working cores. Amidst one of the highest-ever recorded CPU shortages, Intel is doing the opposite. The company is using these defective or scrap dies and packaging them into lower-class SKUs to sell to its customers, as any CPU availability is crucial, and customers are eagerly purchasing them. Imagine a wafer edge, which is round, having only a few working P-Cores, and that being packaged into a CPU that a hyperscaler would integrate into their offering.

Intel Corporation (NASDAQ: INTC) and Google today announced a multiyear collaboration to advance the next generation of AI and cloud infrastructure, reinforcing the critical role of CPUs and custom infrastructure processing units (IPUs) in scaling modern, heterogeneous AI systems.

As AI adoption accelerates, infrastructure is becoming more complex and heterogeneous, driving increased reliance on CPUs for orchestration, data processing and system-level performance. Through this collaboration, Intel and Google will align across multiple generations of Intel Xeon processors to improve performance, energy efficiency and total cost of ownership across Google's global infrastructure.

SambaNova today announced the next phase of its collaboration with Intel: a heterogeneous hardware solution that combines GPUs for prefill, Intel Xeon 6 processors as both host and "action" CPUs, and SambaNova RDUs for decode to deliver premium inference for the most demanding Agentic AI applications. The design will be made available in H2 2026 to enterprises, cloud providers, and sovereign AI programs that want to run coding agents and other agentic workloads at scale.

"Agentic AI is moving into production - and the winning pattern we're seeing is GPUs to start the job, Intel Xeon 6 to run it, and SambaNova RDUs to finish it fast," said Rodrigo Liang, CEO and co-founder of SambaNova Systems. "Together with Intel, we're giving customers a blueprint they can deploy in existing air-cooled data centers, with broad x86 coverage for the coding agents and tools they already use today."

Today at NVIDIA GTC 2026, Intel announced that Intel Xeon 6 is being used as the processor for NVIDIA DGX Rubin NVL8 systems. This highlights Xeon's role in providing architectural continuity and scalability for GPU-accelerated AI systems as workloads shift toward massive, real-time inference.

"AI is shifting from large-scale training to real-time, everywhere inference-driven by agentic AI and reasoning systems," said Jeff McVeigh, corporate vice president and general manager, Data Center Strategic Programs at Intel. "In this new era, the host CPU is mission-critical. It governs orchestration, memory access, model security, and throughput across GPU-accelerated systems. Intel Xeon 6 delivers leadership performance, efficiency, and compatibility with the extensive x86 software ecosystem that customers rely on to scale inference workloads."

Intel used its MWC conference in Barcelona to showcase its most core-dense Xeon 6+ processor, codenamed "Clearwater Forest." As one of Intel's most complex chiplet designs, the package combines 12 compute chiplets manufactured on an Intel 18A node with three active base tiles on Intel 3 and two I/O tiles on Intel 7. In this configuration, each compute tile contains six modules of four "Darkmont" efficiency cores, providing 24 E-cores per tile and a maximum of 288 "Darkmont" E-cores on a single socket. A two-socket system, therefore, approaches 576 cores. The design connects clusters with a high-bandwidth on-chip fabric and stacks die using Foveros Direct 3D, while EMIB links connect multiple tiles in a 2.5D arrangement.

Each "Darkmont" E-core comes with a 64 KB instruction cache, a wider front end, and a larger out-of-order window to sustain more in-flight work. Execution resources and the number of execution ports have been increased to improve parallel integer and vector throughput. Physically, clusters are grouped in four-core units sharing about 4 MB of L2 cache per group, and the package-level last-level cache can exceed a gigabyte, with about 1,152 MB of combined last-level cache across the package. "Clearwater Forest" supports the existing Xeon server platform socket, 12 memory channels, and broad I/O, including 96 PCIe 5.0 lanes and 64 CXL 2.0 lanes. Memory speed targets push toward DDR5-8000.

As AI workloads, industrial digitalization, and edge data centers continue to scale, industrial manufacturers are facing a fundamental shift in how high-performance computing platforms must be designed. Today's systems must not only deliver extreme performance, but also ensure continuous uptime, remote operability, and long-term deployment stability in demanding production environment. In response to these demands, ASRock Industrial proudly announced the launch of IMB-X1904, a high-performance EATX motherboard powered by Intel Xeon 600 processors and the W890 chipset, designed to serve as a new backbone for AI computing, advanced industrial automation, and compute-intensive applications.

Designed for manufacturers that operate performance-critical systems, the IMB-X1904 delivers exceptional performance with robust-class processing power, high-speed DDR5 memory, extensive PCIe Gen 5 expansion, and next-generation I/O in a platform engineered for continuous operation, remote deployment, and secure lifecycle management.

OCBASE has updated its OCCT tool to include overclocking support for Intel's latest Xeon 600 "Granite Rapids-WS" workstation processors, designed for precise tuning of Intel's best HEDT offering. While OCCT is traditionally known for hardware stability testing, OCBASE aims to transform it into a universal platform that combines fine-tuning, including overclocking, with stability testing in a single application. The company has worked with Intel to create a special skin for the OCCT tool, featuring an Intel-like blue and white theme. Besides the visual makeover, lots of under the hood changes follow.

For instance, Intel's flagship Xeon 698X, with 86 cores and 172 threads and 336 MB of L3 cache, can be overclocked from the application UI. The processor operates at a 2.0 GHz base clock and can boost up to 4.8 GHz with Turbo Boost Max 3.0 or 4.6 GHz with Turbo Boost 2.0. Intel confirms that the 698X is fully unlocked, which is unusual for the Xeon processor family. With OCCT, users can now make per-core clock adjustments and live parameter edits while running continuous stress tests. Currently in a closed beta program, the public release is expected within weeks and will include Linux compatibility.

After a long wait, Intel has launched its Xeon 600 Series processors dedicated to workstations. Codenamed Granite Rapids-WS, the new lineup is targeting single-socket workstations, with a strong emphasis on high core counts, large memory capacity, and extensive I/O for multi-GPU and storage-heavy configurations. The new chip family will replace the existing Sapphire Rapids-based Xeon W-2500 and W-3500 Series workstation chips and will go up against AMD high-end workstation equivalent, the Ryzen Threadripper Pro 9000 Series. In total, Intel has 11 SKUs for Xeon 600 series and all are built around Redwood Cove P-cores, with no E-cores present. At the top of the stack sits the Xeon 698X, featuring 86 cores and 172 threads, backed by 336 MB of L3 cache. The chip runs at a 2.0 GHz base clock, boosting up to 4.8 GHz with Turbo Boost Max 3.0, or 4.6 GHz under Turbo Boost 2.0. Intel confirms that the 698X is fully unlocked, allowing overclocking, something still relatively rare in the Xeon workstation space.

They are paired with the Intel W890 chipset that offers up to 128 PCIe 5.0 lanes directly from the CPU. It features eight memory channels supporting DDR5-6400 RDIMMs, and up to 4 TB of system memory. Compared to the previous Xeon WS generation, Granite Rapids-WS brings larger L2 and L3 caches, CXL 2.0 support and updated platform features. Intel also highlights support for vPro Enterprise, as well as Intel Deep Learning Boost, including VNNI, AVX-512, and AMX, targeting AI inference and advanced compute workloads.

Yesterday, after the equity market closed, Intel announced its Q4 and full-year 2025 earnings, along with weaker-than-expected guidance for Q1 2026. As a result, Intel's stock is anticipated to open 11% lower today. During the Q4 earnings call, Intel's CFO, David Zinsner, explained the reasons behind the reduced outlook, despite the increasing demand for Intel products. The situation arose due to hyperscalers demanding more units. Intel's discussions with these customers indicated a preference for high core count solutions rather than increased unit shipments. Consequently, Intel adjusted its inventory and internal wafer supply to maintain reasonable stock levels while consistently shipping new units. However, hyperscalers have since been ordering larger quantities, leading to a temporary shortage of Xeon processors for the Data Center and AI (DCAI) group. To address this, Intel plans to redirect some resources from the Client Computing Group (CCG) to support Xeon CPU production.

Intel CFO David ZinsnerBoth (DCAI and CCG) will be down as a function of supply. Obviously, we're shifting as much as we can over to data center to meet the high demand, but we can't completely vacate the client market. So we're trying to support both as best we can and obviously work our way out of this supply issue. I do believe that the first quarter is the trough. We will improve supply in the second quarter. Part of the challenge is that in the third and fourth quarter of 2025, we lived off of supply, but we also had a reasonable chunk of finished goods inventory to also work through. Unfortunately, that is now down to kind of 40% of what it was at peak levels.

Intel Corporation today reported fourth-quarter and full-year 2025 financial results. "Our conviction in the essential role of CPUs in the AI era continues to grow," said Lip-Bu Tan, Intel CEO. "We delivered a solid finish to the year and made progress on our journey to build a new Intel. The introduction of our first products on Intel 18A - the most advanced process technology developed and manufactured in the United States - marks an important milestone, and we're working aggressively to grow supply to meet strong customer demand. Our priorities are clear: sharpen execution, reinvigorate engineering excellence, and fully capitalize on the vast opportunity AI presents across all of our businesses."

"We exceeded Q4 expectations across revenue, gross margin, and EPS even as we navigated industry-wide supply shortages," said David Zinsner, Intel CFO. "We expect our available supply to be at its lowest level in Q1 before improving in Q2 and beyond. Demand fundamentals across our core markets remain healthy as the rapid adoption of AI reinforces the importance of the x86 ecosystem as the world's most widely deployed high-performance compute architecture."

Intel's flagship "Granite Rapids-WS" processor has appeared on Geekbench, confirming the specifications that will power Intel's HEDT platform for the upcoming year. The tested model is a Xeon 698X CPU, featuring 86 cores and 172 threads, with a base frequency of 2.0 GHz and a boost frequency of 4.6 GHz. With 86 cores, it is unclear whether this boost frequency applies to all cores or only select ones. Nonetheless, the CPU achieved a score of 2,532 points in the single-core test and 21,030 points in the multicore test on Geekbench v6.5, running on the Ubuntu 24.04.3 LTS operating system. This CPU SKU also includes an impressive 336 MB of L3 cache. Built on Intel's XCC server compute dies, the design likely involves a multi-chip-module SoC working together to achieve the high core count. These specifications are not yet public, so the exact die configuration will be revealed when the platform launches.

For the W890 workstation platform hosting these CPUs, Intel has chosen a socket E2 design with 4,710 LGA pins, capable of supporting TDP ratings up to 350 watts. Intel is adopting a two-tier approach with distinct "Expert" and "Mainstream" configurations. The Expert-class offers 112 PCIe lanes (96 PCIe 5.0 lanes plus 16 PCIe 4.0 lanes), while the Mainstream tier provides 80 PCIe 5.0 lanes. As for pricing, these CPUs are expected to be expensive. Earlier listings indicated that the lineup peaks at a price point of $8,300 for the flagship Xeon 698X SKU.