Friday, August 23rd 2019

Alleged Leaked Details on Intel Comet Lake-S Platform Require... You Guessed It... A New Platform

Intel's development of their Core architecture in the post-Ryzen world has been slow, with solutions slowly creeping up in core counts with every new CPU release - but much slowly than rival AMD's efforts. Before Intel can capitalize on a new, more scalable and power-efficient architecture, though, it has to deliver performance and core count increases across its product line to stay as relevant as possible against a much revitalized rival. Enter Comet Lake-S: the desktop parts of Intel's new round of consumer CPUs, which will reportedly see an increase in the maximum core count to a 10-core design. This 10-core design, however, comes with an increase in power consumption (up to 135 W), and the need, once again, for beefier power delivery systems in a new, LGA 1200 package (with 9 more pins that the current LGA 1151).

The move to a new socket and the more stringent power requirements give Intel the opportunity to refresh its chipset offerings once again. If everything stays the same (and there's no reason it should change), new Z470 and Z490 chipsets should be some of the higher tier offerings for builders to pair with their motherboards. The new Comet Lake-S CPUs will still be built in the now extremely refined 14 nm process, and allegedly keep the same 16 PCIe 3.0 lanes as current Coffee Lake Refresh offerings. The new CPU offerings from Intel are expected to roll out in Q1 2020.
Sources: XFastest, via Tom's Hardware
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205 Comments on Alleged Leaked Details on Intel Comet Lake-S Platform Require... You Guessed It... A New Platform

#1
Aquinus
Resident Wat-man
Raevenlord, post: 4103215, member: 166527"
This 10-core design, however, comes with an increase in power consumption (up to 135 W)
How the mighty have fallen.
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#3
AnarchoPrimitiv
Aquinus, post: 4103218, member: 102461"
How the mighty have fallen.
Today's empires are tomorrow's ashes...
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#4
Gungar
juiseman, post: 4103220, member: 182553"
No PCIE 4.0?...hmmmm
They already told us they will go directly to PCIE 5.0 in 2021.
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#5
Crackong
10 cores 135W ?
we knew the 9900k is 95W and eats > 170W when overclocking
so this 10 core will eat 240W ?
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#6
Octavean
In all fairness, can we even call it a leak when they clearly wanted us to know,.....?
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#7
juiseman
Gungar, post: 4103222, member: 163163"
They already told us they will go directly to PCIE 5.0 in 2021.
Right, cuz 10nm was on schedule also.
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#8
trparky
Raevenlord, post: 4103215, member: 166527"
keep the same 16 PCIe 3.0 lanes as current Coffee Lake Refresh offerings
What the hell Intel?!?!

Intel is really cheating us here. I'm not really pissed about the fact that it's still PCIe Gen 3 but more pissed about the limited number of lanes especially when AMD offers 24 of them. Again... What the hell Intel?!?!
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#9
GlacierNine
juiseman, post: 4103226, member: 182553"
Right, cuz 10nm was on schedule also.
Please don't confuse Intel's personal manufacturing process upgrade, with their desire to utilise a general standard created and maintained by over 900 companies.

10nm is:
1 - A manufacturing process
2 - Specced out by Intel
3 - Developed by Intel in Intel labs
4 - To make Intel hardware at Intel facilities using Intel-designed equipment.
Intel are are the only party responsible for their 10nm processes success or failure.

In comparison, PCI-E is:
1 - A specification
2 - Specced out by PCI-SIG
3 - Developed with their partners across the entire computing industry, in their facilities, using collaborative expertise
4 - To make industry-standard hardware at the facilities of anyone who wants to make that hardware.

There are over 900 companies in PCI-SIG and when that many businesses are involved, and rely on, the correct engineering of an upcoming standard, you can bet your ass that none of them are going to let a specification or a standard out of the door that they aren't able to practically guarantee will actually work and can actually be built.
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#10
kapone32
Gungar, post: 4103222, member: 163163"
They already told us they will go directly to PCIE 5.0 in 2021.
For the data centre not consumer level

10 cores with 16 PCI_E lanes. Dare i say whelmed :)
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#11
john_
A new platform in 2020 with PCIe 3.0 support. Nice.

The fun part will be next year when cheap PCIe 4.0 x2 SSD models will be offering the speeds of more expensive PCIe 3.0 x4 models.
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#12
Turmania
I said it before and I say it again, The TDP and Turbo Boost ratings for both CPU manufacturers are false and misleading and I'm using the most politically correct wordings to express it. And to AMD well yeah they have upped their game after many years but guess what they are still behind at both CPU and GPU even after using the 7nm die shrink process and considering the others have not one can only imagine how far they are actually behind.I must say I like the new ryzen 3600 CPU at least it does 4.2 boost on all cores.
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#13
Frick
Fishfaced Nincompoop
Mah FPSess will explode!

Turmania, post: 4103238, member: 182201"
I said it before and I say it again, The TDP and Turbo Boost ratings for both CPU manufacturers are false and misleading and I'm using the most politically correct wordings to express it. And to AMD well yeah they have upped their game after many years but guess what they are still behind at both CPU and GPU even after using the 7nm die shrink process and considering the others have not one can only imagine how far they are actually behind.I must say I like the new ryzen 3600 CPU at least it does 4.2 boost on all cores.
Behind ... in games.
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#14
Berfs1
Crackong, post: 4103224, member: 185495"
10 cores 135W ?
we knew the 9900k is 95W and eats > 170W when overclocking
so this 10 core will eat 240W ?
Keep in mind, the 9900K stock is rated for 210W under turbo. 240W is a pretty good estimate.
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#15
fynxer
GlacierNine, post: 4103233, member: 174559"
There are over 900 companies in PCI-SIG and when that many businesses are involved, and rely on, the correct engineering of an upcoming standard, you can bet your ass that none of them are going to let a specification or a standard out of the door that they aren't able to practically guarantee will actually work and can actually be built.
Don't get it, what are you saying. You trying to say that PCIe 4.0 standard is not ready to be released.

Been ready for a while now, other companies already using it since a year back, only Intel dragging their asses.

Intel just thought they where safe from competition so why hurry developing cpus with PCIe 4.0, now they are paying for it.
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#16
r.h.p
My two cents , these names are just getting better coffee lake , comet lake- s , Icey lake , shiny river , …...

anyway they are still awesome cpus but they cost a lot more than AMD
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#17
Fabio Bologna
Raevenlord, post: 4103215, member: 166527"
LGA 1200 package (with 9 more pins that the current LGA 1151).
So either the LGA 1200 is in reality a 1160 pins socket or there is an error :confused:
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#18
GlacierNine
fynxer, post: 4103243, member: 103789"
Don't get it, what are you saying. You trying to say that PCIe 4.0 standard is not ready to be released.

Been ready for a while now, other companies already using it since a year back, only Intel dragging their asses.

Intel just thought they where safe from competition so why hurry developing cpus with PCIe 4.0, now they are paying for it.
What @juiseman was implying with THEIR post, was that because Intel couldn't do 10nm on time, he didn't trust Intel to implement PCI-E 5.0 when they said they were going to.

My point was that Intel controls when 10nm is ready. They screwed up by announcing it long before they were ready to ship it, and they got hurt by that.

But Intel doesn't control when PCI-E 5.0 is ready. PCI-SIG does that. And if Intel announces (or leaks) that they're going to implement PCI-E 5.0 in future, then that means they (and PCI-SIG) are both sure that PCI-E 5.0 will be ready to go at that time.

Why am I sure of that? Because there are 900 other companies all involved in the decision making here, and the announcement of PCI-E 5.0 being ready to go, would have only happened after those 900 companies all agreed that PCI-E 5.0 was ready to launch and could be delivered on time.
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#19
Divide Overflow
Intel is really embarrassing themselves. This news only makes me more confident in my decision to go with a 3900X for my recent upgrade.
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#20
theoneandonlymrk
GlacierNine, post: 4103257, member: 174559"
What @juiseman was implying with THEIR post, was that because Intel couldn't do 10nm on time, he didn't trust Intel to implement PCI-E 5.0 when they said they were going to.

My point was that Intel controls when 10nm is ready. They screwed up by announcing it long before they were ready to ship it, and they got hurt by that.

But Intel doesn't control when PCI-E 5.0 is ready. PCI-SIG does that. And if Intel announces (or leaks) that they're going to implement PCI-E 5.0 in future, then that means they (and PCI-SIG) are both sure that PCI-E 5.0 will be ready to go at that time.

Why am I sure of that? Because there are 900 other companies all involved in the decision making here, and the announcement of PCI-E 5.0 being ready to go, would have only happened after those 900 companies all agreed that PCI-E 5.0 was ready to launch and could be delivered on time.
Intel does control their design of the Phy pciex controller and lane assignments , for all your assurances that intel are On their game they are not showing products to back that up Imho.
Their are Gpus and Ssds that can use pciex4 and owners who want to use it too.
Intel just sent those customers elsewhere for two years.
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#21
juiseman
I guess I rustled some feathers; sorry

I be trollin', trollin', trollin' again
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#22
GlacierNine
theoneandonlymrk, post: 4103261, member: 82332"
Intel does control their design of the Phy pciex controller and lane assignments , for all your assurances that intel are On their game they are not showing products to back that up Imho.
Their are Gpus and Ssds that can use pciex4 and owners who want to use it too.
Intel just sent those customers elsewhere for two years.
All of this is true, but, again, @juiseman was implying that because Intel fucked up the engineering of 10nm, that intel would therefore be incapable of implementing PCI-E 5.0 on time.

Would you, @theoneandonlymrk, please like to explain to me, exactly how juiseman's point is true, bearing in mind that:

1 - designing a controller to implement an existing standard is nowhere near as complicated as building a new semiconductor manufacturing process from scratch
2 - PCI-SIG doesn't release standards that aren't ready to be implemented, whereas Intel *did* announce a 10nm technology that was nowhere near implementation.
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#23
TheGuruStud
Gungar, post: 4103222, member: 163163"
They already told us they will go directly to PCIE 5.0 in 2021.
So...another new platform to buy? Lol
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#24
yakk
This release will need impressive Intel Marketing PR spin. Sad part is just throwing enough money into Marketing will confuse consumers enough to still be quite profitable.
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#25
kapone32
yakk, post: 4103269, member: 158293"
This release will need impressive Intel Marketing PR spin. Sad part is just throwing enough money into Marketing will confuse consumers enough to still be quite profitable.
That's why they hired people from the online tech channels mostly editors.
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