Monday, May 24th 2021

Cadence Announces New Low-Power IP for PCI Express 5.0 Specification on TSMC N5 Process

Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced immediate availability of Cadence IP supporting the PCI Express (PCIe ) 5.0 specification on TSMC N5 process technology. The next follow-on version on TSMC N3 process technology is expected to be taped out in early 2022. Collaboration with major customers is ongoing for N5 SoC designs targeting hyperscale computing and networking applications. The Cadence IP for PCIe 5.0 technology consists of a PHY, companion controller and Verification IP (VIP) targeted at SoC designs for very high-bandwidth hyperscale computing, networking and storage applications. With Cadence's PHY and Controller Subsystem for PCIe 5.0 architecture, customers can design extremely power-efficient SoCs with accelerated time to market.

The Cadence IP for PCIe 5.0 architecture offers a highly power-efficient implementation of the standard, with several evaluations from leading customers indicating it provides industry best-in-class power at the maximum data transfer rate of 32GT/s and worst-case insertion loss. Leveraging Cadence's existing N7/N6 silicon validated offering, the N5 design provides a full 512GT/s (gigatransfers per second) power-optimized solution across the full range of operating conditions with a single clock lane.
In conjunction with Cadence's low-latency Controller IP for Compute Express Link (CXL ), the Cadence PHY IP for PCIe 5.0 technology enables a new class of applications for cache-coherent interconnects for processors, workload accelerators and memory expanders, as well as support for a wide range of Ethernet protocols. This provides flexible use cases for systems that need to leverage the same IP for the networking class of applications. Cadence is at the forefront of PCIe 5.0 subsystem interoperability testing, working with all major PCIe test equipment vendors for protocol and electrical compliance.

"We are pleased to see Cadence expanding its IP family to support the PCIe 5.0 protocol on TSMC's advanced processes," said Suk Lee, vice president of the Design Infrastructure Management Division at TSMC. "Our close collaboration with Cadence will help our mutual customers meet the stringent power and performance requirements and accelerate silicon innovation with leading-edge design solutions benefiting from TSMC's advanced technologies."

"Increasingly, our customers are demanding not just point IP, but total solutions that provide an edge by shortening development timeline and accelerating end-product deployment. The addition of the ultra-low power PCIe 5.0 solution to our portfolio of high-performance IP on the TSMC N7/N6, N5 and N3 technologies fulfills this need," said Sanjive Agarwala, corporate vice president and general manager of the IP Group at Cadence. "Our close collaboration with TSMC ensures that we can continue to develop advanced IP on TSMC's most advanced processes. We've been a key provider of leading-edge PHY IP for more than 10 years and have one of the most experienced PHY design teams in the industry. Developing a solution with such low power for PCIe 5.0 architecture is a testament to the innovation our engineering teams can bring to bear to support our high-performance customer base."

"Cadence's PHY and controller test chips for PCIe 5.0 showed robust performance in compliance tests on our Xgig exerciser and analyzer platform," said Tom Fawcett, vice president and general manager, Lab & Production Business Unit, VIAVI Solutions. "Collaboration with industry leaders and visionaries like Cadence is the key to building ecosystem confidence in—and rapid adoption of—the new protocol."

"As a long-standing PCI-SIG member, Cadence has played a role in promoting the adoption of PCIe technology," said Al Yanes, president and chairman of PCI-SIG. "With its continued investment and innovation in PCIe IP, Cadence is one of the member companies enabling the latest standards to be available for widespread deployment."

The Cadence IP for PCIe 5.0 architecture supports the company's Intelligent System Design strategy, which enables advanced-node SoC design excellence. Cadence's comprehensive portfolio of design IP solutions in the TSMC advanced processes also includes 112G, 56G, die-to-die (D2D) and advanced memory IP solutions. For more information on the Cadence IP for PCIe 5.0 technology, please visit www.cadence.com/go/pcie5pr.
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3 Comments on Cadence Announces New Low-Power IP for PCI Express 5.0 Specification on TSMC N5 Process

#1
Tardian
As someone who can remember the 1970s when the school computer (DEC PDP-11) would sit for minutes processing my program, input on punch cards (pencil), I find the trend referred to in the article really worrying. Automation, artificial intelligence, and technology, in general, are proceeding at such an exponential pace the future looks bright for the few and grim for the many. As I attempt to type this comment the App which can spell and sense grammatical errors is both a source of wonder and concern. Humans are at risk of making themselves redundant. Will the Trillionaire barons be able to keep Ai under control, or will they rely on self-driving/flying vehicles? I am fairly sure the young technocrats on this site will troll this comment to death. Those formerly employed in banking, finance, manufacturing, etc might have some understanding of how automation replaces human jobs. Even China, India, and the Third World are not immune to this trend. Both humans and computers are vulnerable to viruses but COVID-19 is a game-changer. Computers don't need to work from home and don't have children or pets seeking their attention. Only self-interest prevents Ai from writing a more chilling narrative of the dystopian future our children and grandchildren inherit. The Terminator movie series is an exercise in sugar-coating or rose-colored glasses. Humans would lose.
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#2
JAB Creations
I wonder how long they'll be able to double bandwidth, most especially on a three year cycle because there are going to be limits eventually however I think they've done a good job overall with compatibility (from my limited perspective, I haven't had to mix a PCI-Express 1.0 and 4.0 device/bus so I can't say).
TardianAs someone who can remember the 1970s when the school computer (DEC PDP-11) would sit for minutes processing my program, input on punch cards (pencil), I find the trend referred to in the article really worrying. Automation, artificial intelligence, and technology, in general, are proceeding at such an exponential pace the future looks bright for the few and grim for the many. As I attempt to type this comment the App which can spell and sense grammatical errors is both a source of wonder and concern. Humans are at risk of making themselves redundant. Will the Trillionaire barons be able to keep Ai under control, or will they rely on self-driving/flying vehicles? I am fairly sure the young technocrats on this site will troll this comment to death. Those formerly employed in banking, finance, manufacturing, etc might have some understanding of how automation replaces human jobs. Even China, India, and the Third World are not immune to this trend. Both humans and computers are vulnerable to viruses but COVID-19 is a game-changer. Computers don't need to work from home and don't have children or pets seeking their attention. Only self-interest prevents Ai from writing a more chilling narrative of the dystopian future our children and grandchildren inherit. The Terminator movie series is an exercise in sugar-coating or rose-colored glasses. Humans would lose.
AI or it's early iterations are the products of those who create them and it ultimately comes down to the individual and a plethora of circumstances. In regards to trolls, yeah, the powers that be have been very effective at reducing overall intelligence of people, you don't have to spend too much time reading comments on news articles though I am happy to be able to say that not everyone has the limited capacity of a frustrated 14 year old.
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#3
DeathtoGnomes
TardianAs someone who can remember the 1970s when the school computer (DEC PDP-11) would sit for minutes processing my program, input on punch cards (pencil), I find the trend referred to in the article really worrying. Automation, artificial intelligence, and technology, in general, are proceeding at such an exponential pace the future looks bright for the few and grim for the many. As I attempt to type this comment the App which can spell and sense grammatical errors is both a source of wonder and concern. Humans are at risk of making themselves redundant. Will the Trillionaire barons be able to keep Ai under control, or will they rely on self-driving/flying vehicles? I am fairly sure the young technocrats on this site will troll this comment to death. Those formerly employed in banking, finance, manufacturing, etc might have some understanding of how automation replaces human jobs. Even China, India, and the Third World are not immune to this trend. Both humans and computers are vulnerable to viruses but COVID-19 is a game-changer. Computers don't need to work from home and don't have children or pets seeking their attention. Only self-interest prevents Ai from writing a more chilling narrative of the dystopian future our children and grandchildren inherit. The Terminator movie series is an exercise in sugar-coating or rose-colored glasses. Humans would lose.
Great Tinhat comment, some of us can agree that Skynet will still happen sooner or later. It really does depend on human input.
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