Friday, August 2nd 2024

Intel "Meteor Lake" CPUs Face Yield Issues, Company Running "Hot Lots" to Satisfy Demand

In a conversation with Intel's CEO Pat Gelsinger, industry analyst Patrick Moorhead revealed that Intel's Meteor Lake CPU platform suffers from some production issues. More specifically, Intel has been facing some yield and/or back-end production issues with its Meteor Lake platform, resulting in a negative impact on Intel's margins when producing the chip. The market is showing great demand for these chips, and Intel has been forced to run productions of "hot lots"-- batch production of silicon with the highest priority that gets moved to the front of the production line so they can get packaged as fast as possible. While this is a good sign that the demand is there, running hot lots increases production costs overall as some other wafers have to go back so Meteor Lake can pass.

The yield issues associated with Meteor Lake could be stemming from the only tile made by Intel in the MTL package: the compute tile made on the Intel 4 process. Intel 4 process is specific to Meteor Lake. No other Intel product uses it, not even the Xeon 6, which uses Intel 3, or any of the upcoming CPUs like Arrow Lake, which uses the Intel 20A node. So, Intel is doing multiple nodes for multiple generations of processors, further driving up costs as typical high-volume production with a single node for multiple processors yields lower costs. Additionally, the company is left with lots of "wafers to burn" with Intel 4 node, so even with Meteor Lake having yield issues, the production is ultimately fine, while the operating costs and margins take a hit.
Sources: Patrick Moorhead on X, via AnandTech
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18 Comments on Intel "Meteor Lake" CPUs Face Yield Issues, Company Running "Hot Lots" to Satisfy Demand

#1
kondamin
I thought arrowlake was intel 3
Posted on Reply
#2
Ferrum Master
Stock tanked so much...

Gelsinger should pack his stuff... quit the clown parade.

My condolences to US Tax payers.
Posted on Reply
#3
kondamin
Ferrum MasterStock tanked so much...

Gelsinger should pack his stuff... quit the clown parade.

My condolences to US Tax payers.
He’s only been ceo for 3 years, to me it looks like intel is flipping a new leaf progressing trough the nodes at a decent pace So he’s delivering on the chipsact thing.

Considering the amount of time chip development goes trough I doubt raptor lake had much of his influence as it was released a couple of months after he became ceo.
Posted on Reply
#4
Ferrum Master
kondaminHe’s only been ceo for 3 years, to me it looks like intel is flipping a new leaf progressing trough the nodes at a decent pace So he’s delivering on the chipsact thing.

Considering the amount of time chip development goes trough I doubt raptor lake had much of his influence as it was released a couple of months after he became ceo.
But AMD is in his rear view mirror.

3 years is enough to see the "fruits" of work. In this particular case he should have insisted on axing many many things and quit bleeding money.
Posted on Reply
#5
LittleBro
Ferrum MasterStock tanked so much...

Gelsinger should pack his stuff... quit the clown parade.

My condolences to US Tax payers.
IMHO, Ol' Gelsy must be getting pretty awkward feedback from the board. Looks like there is no one with big enough balls to replace him in such a disastrous moments.
Posted on Reply
#6
Bones
Ferrum MasterStock tanked so much...

Gelsinger should pack his stuff... quit the clown parade.

My condolences to US Tax payers.
Don't worry, CEO's always have their golden parachute strapped on and ready to deploy.
He'll be fine.
Posted on Reply
#7
phints
Can’t imagine any demand for Meteor Lake they are garbage CPUs. The worst performance per watt compared to competition since Bulldozer.
Posted on Reply
#8
pressing on
phintsCan’t imagine any demand for Meteor Lake they are garbage CPUs. The worst performance per watt compared to competition since Bulldozer.
Intel say they have sold 15 million plus of them since December 2023, which is it says is far more than all of its competitors combined. I genuinely would like to see some sales figures from AMD for their mobile processors.
Posted on Reply
#9
Carillon
I remember hearing something about making designs easy to port between processes, can't intel port the CPU tile to a TSMC node?
Posted on Reply
#10
pressing on
CarillonI remember hearing something about making designs easy to port between processes, can't intel port the CPU tile to a TSMC node?
That's more or less what it has done with Lunar Lake which is all TSMC silicon so Intel will only need to do the packaging. ML is Intel's first tile based mobile processor and I think that producing it in quantity has proved both more costly and difficult than expected.
Posted on Reply
#11
tfp
Ferrum MasterBut AMD is in his rear view mirror.

3 years is enough to see the "fruits" of work. In this particular case he should have insisted on axing many many things and quit bleeding money.
It's easy to have someone in your rear view mirror if you are driving the other way. :D

3 years is no where near long enough to address the cluster that was and still is Intel. Even the money the US and other gov are throwing at will only have real impact years down the road out side of construction jobs today because they are more about building new fabs not fixing the the current process issues. Intel, in my opinion, is trading high cost people in order to keep building fabs thought likely at a slower rate but faster then they would with out the US and other governments propping them up. If cutting R&D bites them in the future we'll have to see, that budget has been huge in the past with out a lot of progress for a number of year but with cuts that large companies normally throw out the good with the bad.
Posted on Reply
#12
pcminirace
BonesDon't worry, CEO's always have their golden parachute strapped on and ready to deploy.
He'll be fine.
ha haha hahahaha
Posted on Reply
#13
N/A
kondaminI thought arrowlake was intel 3
Rumored 20A for the 6+8 Core tile and N3 for the 8+16

20A restores parity between nodes. eg N2. 16% denser than N3, on it's turn at least 30% denser than N4

Intel 4 and 3 were supposed to be the ++ of the same 7nm node and now they claim the 5 nm ++ 20 and 18A are going well and ramping up when intel 4 struggles. How is 5nm doing better than 7nm only makes sense if they were overly optimistic like the feasibility of 13th 14th at 6+ Ghz.
Posted on Reply
#14
Minus Infinity
N/ARumored 20A for the 6+8 Core tile and N3 for the 8+16

20A restores parity between nodes. eg N2. 16% denser than N3, on it's turn at least 30% denser than N4

Intel 4 and 3 were supposed to be the ++ of the same 7nm node and now they claim the 5 nm ++ 20 and 18A are going well and ramping up when intel 4 struggles. How is 5nm doing better than 7nm only makes sense if they were overly optimistic like the feasibility of 13th 14th at 6+ Ghz.
Intel 4 was always going to be a short-lived stop gap, and Intel 3 was going to be the much improved refinement. But Intel isn't even using it for Arrow Lake that is how much faith they have. Why is the much better on paper 20A being used in the lower end product while Intel uses IIRC the pretty poor TSMC N3B for i7 and i9, not even N3E.
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#15
phanbuey
the problem is the chips act gave intel as bucket of money... but those fabs are sitting empty. Without incentives for ppl to actually manufacture there it's half a solution
Posted on Reply
#16
tfp
Those fabs aren't even built yet.
Posted on Reply
#17
Scrizz
phanbueythe problem is the chips act gave intel as bucket of money... but those fabs are sitting empty. Without incentives for ppl to actually manufacture there it's half a solution
Like tfp said, those fabs haven't been built yet. How long do you think it takes to build a fab? :D
Posted on Reply
#18
phanbuey
aaa
ScrizzLike tfp said, those fabs haven't been built yet. How long do you think it takes to build a fab? :D
True - Their current 10nm fabs** are sitting empty

That's really the main reason for the stock drop. I imagine their new fabs, once built, will have the same issue.
Posted on Reply
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